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Commit 1ff602f

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author
hyojongk
committed
added support bank groups
1 parent 45d0d33 commit 1ff602f

11 files changed

+218
-100
lines changed

‎BankState.cpp

Lines changed: 4 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -28,24 +28,11 @@
2828
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2929
*********************************************************************************/
3030

31-
32-
33-
34-
35-
36-
37-
38-
//BankState.cpp
39-
//
40-
//Class file for bank state object
41-
//
42-
4331
#include "BankState.h"
4432

4533
using namespace std;
4634
using namespace DRAMSim;
4735

48-
//All banks start precharged
4936
BankState::BankState():
5037
currentBankState(Idle),
5138
openRowAddress(0),
@@ -61,20 +48,13 @@ BankState::BankState():
6148
void BankState::print()
6249
{
6350
PRINT(" == Bank State ");
64-
if (currentBankState == Idle)
65-
{
51+
if (currentBankState == Idle) {
6652
PRINT(" State : Idle" );
67-
}
68-
else if (currentBankState == RowActive)
69-
{
53+
} else if (currentBankState == RowActive) {
7054
PRINT(" State : Active" );
71-
}
72-
else if (currentBankState == Refreshing)
73-
{
55+
} else if (currentBankState == Refreshing) {
7456
PRINT(" State : Refreshing" );
75-
}
76-
else if (currentBankState == PowerDown)
77-
{
57+
} else if (currentBankState == PowerDown) {
7858
PRINT(" State : Power Down" );
7959
}
8060

‎BankState.h

Lines changed: 17 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -28,53 +28,40 @@
2828
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2929
*********************************************************************************/
3030

31-
32-
33-
34-
35-
36-
37-
3831
#ifndef BANKSTATE_H
3932
#define BANKSTATE_H
4033

41-
//BankState.h
42-
//
43-
//Header file for bank state class
44-
//
45-
4634
#include "SystemConfiguration.h"
4735
#include "BusPacket.h"
4836

49-
namespace DRAMSim
50-
{
37+
namespace DRAMSim {
5138
enum CurrentBankState
5239
{
5340
Idle,
5441
RowActive,
5542
Precharging,
5643
Refreshing,
44+
SelfRefreshing,
5745
PowerDown
5846
};
5947

6048
class BankState
6149
{
62-
public:
63-
//Fields
64-
CurrentBankState currentBankState;
65-
unsigned openRowAddress;
66-
uint64_t nextRead;
67-
uint64_t nextWrite;
68-
uint64_t nextActivate;
69-
uint64_t nextPrecharge;
70-
uint64_t nextPowerUp;
71-
72-
BusPacketType lastCommand;
73-
unsigned stateChangeCountdown;
74-
75-
//Functions
76-
BankState();
77-
void print();
50+
public:
51+
CurrentBankState currentBankState;
52+
unsigned openRowAddress;
53+
uint64_t nextRead;
54+
uint64_t nextWrite;
55+
uint64_t nextActivate;
56+
uint64_t nextPrecharge;
57+
uint64_t nextPowerUp;
58+
59+
BusPacketType lastCommand;
60+
unsigned stateChangeCountdown;
61+
62+
public:
63+
BankState();
64+
void print();
7865
};
7966
}
8067

‎BusPacket.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,7 @@ BusPacket::BusPacket(BusPacketType packtype, uint64_t physicalAddr,
3939
column(col),
4040
row(rw),
4141
bank(b),
42+
bankGroup(b/NUM_BANKS_PER_BANKGROUP),
4243
rank(r),
4344
physicalAddress(physicalAddr),
4445
data(dat)

‎BusPacket.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,8 @@ enum BusPacketType
4242
WRITE_P,
4343
ACTIVATE,
4444
PRECHARGE,
45-
REFRESH,
45+
REFRESH, // REFRESH ALL BANKS
46+
REFRESH_SB, // REFRESH SINGLE BANK
4647
DATA,
4748
INVALID
4849
};
@@ -65,6 +66,7 @@ class BusPacket
6566
unsigned column;
6667
unsigned row;
6768
unsigned bank;
69+
unsigned bankGroup;
6870
unsigned rank;
6971
uint64_t physicalAddress;
7072
void *data;

‎HBMDevice.ini

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,8 @@ tWR=8
3131
tFAW=20
3232
tCKE=5
3333
tCMD=1
34-
tRRD=5 ;tRRDS=4, tRRDL=5
34+
tRRDS=4
35+
tRRDL=5
3536
tCCD=3 ;tCCDS=2, tCCDL=3
3637
tWTR=4 ;tWTRS=2, tWTRL=4
3738
tXP=5 ;Power-down exit time

‎HBMSystem.ini

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,8 @@ ADDRESS_MAPPING_SCHEME=RoBaRaCoCh
2020
SCHEDULING_POLICY=rank_then_bank_round_robin
2121
;legacy_mode or pseudo_channel_mode
2222
OPERATION_MODE=legacy_mode
23+
;enable or disable bank groups
24+
BANK_GROUPS_ENABLED=true
2325

2426
;for true/false, all lowercase
2527
DEBUG_TRANS_Q=false

‎IniReader.cpp

Lines changed: 17 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,7 @@ using namespace std;
3535
// these are the values that are extern'd in SystemConfig.h so that they
3636
// have global scope even though they are set by IniReader
3737

38+
unsigned NUM_BANKGROUPS;
3839
unsigned NUM_BANKS;
3940
unsigned NUM_BANKS_LOG;
4041
unsigned NUM_CHANS;
@@ -55,12 +56,15 @@ unsigned AL;
5556
unsigned BL;
5657
unsigned tRAS;
5758
unsigned tRCD;
58-
unsigned tRRD;
59+
unsigned tRRDS;
60+
unsigned tRRDL;
5961
unsigned tRC;
6062
unsigned tRP;
61-
unsigned tCCD;
63+
unsigned tCCDS;
64+
unsigned tCCDL;
6265
unsigned tRTP;
63-
unsigned tWTR;
66+
unsigned tWTRS;
67+
unsigned tWTRL;
6468
unsigned tWR;
6569
unsigned tRTRS;
6670
unsigned tRFC;
@@ -87,6 +91,7 @@ string ROW_BUFFER_POLICY;
8791
string SCHEDULING_POLICY;
8892
string ADDRESS_MAPPING_SCHEME;
8993
string OPERATION_MODE;
94+
bool BANK_GROUPS_ENABLED;
9095

9196
bool DEBUG_TRANS_Q;
9297
bool DEBUG_CMD_Q;
@@ -110,6 +115,7 @@ OperationMode operationMode;
110115
static ConfigMap configMap[] =
111116
{
112117
//DEFINE_UINT_PARAM -- see IniReader.h
118+
DEFINE_UINT_PARAM(NUM_BANKGROUPS,DEV_PARAM),
113119
DEFINE_UINT_PARAM(NUM_BANKS,DEV_PARAM),
114120
DEFINE_UINT_PARAM(NUM_ROWS,DEV_PARAM),
115121
DEFINE_UINT_PARAM(NUM_COLS,DEV_PARAM),
@@ -122,12 +128,15 @@ static ConfigMap configMap[] =
122128
DEFINE_UINT_PARAM(BL,DEV_PARAM),
123129
DEFINE_UINT_PARAM(tRAS,DEV_PARAM),
124130
DEFINE_UINT_PARAM(tRCD,DEV_PARAM),
125-
DEFINE_UINT_PARAM(tRRD,DEV_PARAM),
131+
DEFINE_UINT_PARAM(tRRDS,DEV_PARAM),
132+
DEFINE_UINT_PARAM(tRRDL,DEV_PARAM),
126133
DEFINE_UINT_PARAM(tRC,DEV_PARAM),
127134
DEFINE_UINT_PARAM(tRP,DEV_PARAM),
128-
DEFINE_UINT_PARAM(tCCD,DEV_PARAM),
135+
DEFINE_UINT_PARAM(tCCDS,DEV_PARAM),
136+
DEFINE_UINT_PARAM(tCCDL,DEV_PARAM),
129137
DEFINE_UINT_PARAM(tRTP,DEV_PARAM),
130-
DEFINE_UINT_PARAM(tWTR,DEV_PARAM),
138+
DEFINE_UINT_PARAM(tWTRS,DEV_PARAM),
139+
DEFINE_UINT_PARAM(tWTRL,DEV_PARAM),
131140
DEFINE_UINT_PARAM(tWR,DEV_PARAM),
132141
DEFINE_UINT_PARAM(tRTRS,DEV_PARAM),
133142
DEFINE_UINT_PARAM(tRFC,DEV_PARAM),
@@ -149,6 +158,8 @@ static ConfigMap configMap[] =
149158
DEFINE_STRING_PARAM(SCHEDULING_POLICY,SYS_PARAM),
150159
DEFINE_STRING_PARAM(ADDRESS_MAPPING_SCHEME,SYS_PARAM),
151160
DEFINE_STRING_PARAM(OPERATION_MODE,SYS_PARAM),
161+
DEFINE_BOOL_PARAM(BANK_GROUPS_ENABLED,SYS_PARAM),
162+
152163
// debug flags
153164
DEFINE_BOOL_PARAM(DEBUG_TRANS_Q,SYS_PARAM),
154165
DEFINE_BOOL_PARAM(DEBUG_CMD_Q,SYS_PARAM),

‎MemoryController.cpp

Lines changed: 60 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -279,10 +279,26 @@ void MemoryController::update()
279279
bankStates[i][j].nextWrite);
280280
}
281281
} else {
282-
bankStates[i][j].nextRead = max(currentClockCycle + max(tCCD, BL/2),
283-
bankStates[i][j].nextRead);
284-
bankStates[i][j].nextWrite = max(currentClockCycle + READ_TO_WRITE_DELAY,
285-
bankStates[i][j].nextWrite);
282+
if (BANK_GROUPS_ENABLED) {
283+
if (poppedBusPacket->bankGroup == j / NUM_BANKS_PER_BANKGROUP) {
284+
// Accesses within the same bank group
285+
bankStates[i][j].nextRead = max(currentClockCycle + max(tCCDL, BL/2),
286+
bankStates[i][j].nextRead);
287+
bankStates[i][j].nextWrite = max(currentClockCycle + READ_TO_WRITE_DELAY,
288+
bankStates[i][j].nextWrite);
289+
} else {
290+
// Accesses to different bank groups
291+
bankStates[i][j].nextRead = max(currentClockCycle + max(tCCDS, BL/2),
292+
bankStates[i][j].nextRead);
293+
bankStates[i][j].nextWrite = max(currentClockCycle + READ_TO_WRITE_DELAY,
294+
bankStates[i][j].nextWrite);
295+
}
296+
} else { // BANK_GROUPS_DISABLED
297+
bankStates[i][j].nextRead = max(currentClockCycle + max(tCCDS, BL/2),
298+
bankStates[i][j].nextRead);
299+
bankStates[i][j].nextWrite = max(currentClockCycle + READ_TO_WRITE_DELAY,
300+
bankStates[i][j].nextWrite);
301+
}
286302
}
287303
}
288304
}
@@ -319,18 +335,34 @@ void MemoryController::update()
319335
bankStates[i][j].nextRead);
320336
}
321337
} else {
322-
bankStates[i][j].nextWrite = max(currentClockCycle + max(BL/2, tCCD),
323-
bankStates[i][j].nextWrite);
324-
bankStates[i][j].nextRead = max(currentClockCycle + WRITE_TO_READ_DELAY_B,
325-
bankStates[i][j].nextRead);
338+
if (BANK_GROUPS_ENABLED) {
339+
if (poppedBusPacket->bankGroup == j / NUM_BANKS_PER_BANKGROUP) {
340+
// Accesses within the same bank group
341+
bankStates[i][j].nextWrite = max(currentClockCycle + max(BL/2, tCCDL),
342+
bankStates[i][j].nextWrite);
343+
bankStates[i][j].nextRead = max(currentClockCycle + WL + BL/2 + tWTRL,
344+
bankStates[i][j].nextRead);
345+
} else {
346+
// Accesses to different bank groups
347+
bankStates[i][j].nextWrite = max(currentClockCycle + max(BL/2, tCCDS),
348+
bankStates[i][j].nextWrite);
349+
bankStates[i][j].nextRead = max(currentClockCycle + WL + BL/2 + tWTRS,
350+
bankStates[i][j].nextRead);
351+
}
352+
} else { // BANK_GROUPS_DISABLED
353+
bankStates[i][j].nextWrite = max(currentClockCycle + max(BL/2, tCCDS),
354+
bankStates[i][j].nextWrite);
355+
bankStates[i][j].nextRead = max(currentClockCycle + WL + BL/2 + tWTRS,
356+
bankStates[i][j].nextRead);
357+
}
326358
}
327359
}
328360
}
329361

330362
if (poppedBusPacket->busPacketType == WRITE_P) {
331-
//set nextRead and nextWrite to nextActivate so the state table will prevent a read or
332-
//write from being issued before the bank state has been changed because of the
333-
//auto-precharge associated with this command
363+
// set nextRead and nextWrite to nextActivate so the state table will prevent a read or
364+
// write from being issued before the bank state has been changed because of the
365+
// auto-precharge associated with this command
334366
bankStates[rank][bank].nextRead = bankStates[rank][bank].nextActivate;
335367
bankStates[rank][bank].nextWrite = bankStates[rank][bank].nextActivate;
336368
}
@@ -345,16 +377,29 @@ void MemoryController::update()
345377
bankStates[rank][bank].nextPrecharge = max(currentClockCycle + tRAS,
346378
bankStates[rank][bank].nextPrecharge);
347379

348-
//if we are using posted-CAS, the next column access can be sooner than normal operation
380+
// if we are using posted-CAS, the next column access can be sooner than normal operation
349381
bankStates[rank][bank].nextRead = max(currentClockCycle + (tRCD-AL),
350382
bankStates[rank][bank].nextRead);
351383
bankStates[rank][bank].nextWrite = max(currentClockCycle + (tRCD-AL),
352384
bankStates[rank][bank].nextWrite);
353385

354386
for (unsigned i = 0; i < NUM_BANKS; ++i) {
355-
if (i != poppedBusPacket->bank)
356-
bankStates[rank][i].nextActivate = max(currentClockCycle + tRRD,
357-
bankStates[rank][i].nextActivate);
387+
if (BANK_GROUPS_ENABLED) {
388+
if (i != poppedBusPacket->bank) {
389+
if (poppedBusPacket->bankGroup == i / NUM_BANKS_PER_BANKGROUP)
390+
// Accesses within the same bank group
391+
bankStates[rank][i].nextActivate = max(currentClockCycle + tRRDL,
392+
bankStates[rank][i].nextActivate);
393+
else
394+
// Accesses to different bank groups
395+
bankStates[rank][i].nextActivate = max(currentClockCycle + tRRDS,
396+
bankStates[rank][i].nextActivate);
397+
}
398+
} else { // BANK_GROUPS_DISABLED
399+
if (i != poppedBusPacket->bank)
400+
bankStates[rank][i].nextActivate = max(currentClockCycle + tRRDS,
401+
bankStates[rank][i].nextActivate);
402+
}
358403
}
359404
break;
360405

‎MemorySystem.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,7 @@ using namespace std;
3636

3737
unsigned NUM_RANKS;
3838
unsigned NUM_RANKS_LOG;
39+
unsigned NUM_BANKS_PER_BANKGROUP;
3940

4041
namespace DRAMSim {
4142

@@ -73,6 +74,7 @@ MemorySystem::MemorySystem(unsigned sid, unsigned cid) :
7374
}
7475

7576
NUM_RANKS_LOG = log2(NUM_RANKS);
77+
NUM_BANKS_PER_BANKGROUP = NUM_BANKS / NUM_BANKGROUPS;
7678

7779
memoryController = new MemoryController(stackID, channelID, this);
7880

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