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Merge pull request #1805 from nicolasnoble/64bits-counters
Moving cycle counters to 64-bits.
2 parents 33b7ec3 + fb4eb9e commit 1587118

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11 files changed

+44
-50
lines changed

11 files changed

+44
-50
lines changed

src/core/DynaRec_aa64/recompiler.cc

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -304,9 +304,9 @@ DynarecCallback DynaRecCPU::recompile(DynarecCallback* callback, uint32_t pc, bo
304304
m_linkedPC = std::nullopt;
305305
}
306306

307-
gen.Ldr(w0, MemOperand(contextPointer, CYCLE_OFFSET)); // Fetch cycle count from memory
308-
gen.Add(w0, w0, count * PCSX::Emulator::BIAS); // Add block cycles
309-
gen.Str(w0, MemOperand(contextPointer, CYCLE_OFFSET)); // Store cycles back to memory
307+
gen.Ldr(x0, MemOperand(contextPointer, CYCLE_OFFSET)); // Fetch cycle count from memory
308+
gen.Add(x0, x0, count * PCSX::Emulator::BIAS); // Add block cycles
309+
gen.Str(x0, MemOperand(contextPointer, CYCLE_OFFSET)); // Store cycles back to memory
310310

311311
// Link block else return to dispatcher
312312
if (m_linkedPC && ENABLE_BLOCK_LINKING && m_linkedPC.value() != startingPC) {

src/core/DynaRec_x64/recompiler.cc

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -450,7 +450,7 @@ DynarecCallback DynaRecCPU::recompile(uint32_t pc, bool fullLoadDelayEmulation,
450450
endProfiling();
451451
}
452452

453-
gen.add(dword[contextPointer + CYCLE_OFFSET], count * PCSX::Emulator::BIAS); // Add block cycles;
453+
gen.add(qword[contextPointer + CYCLE_OFFSET], count * PCSX::Emulator::BIAS); // Add block cycles;
454454
if (m_linkedPC && ENABLE_BLOCK_LINKING && m_linkedPC.value() != startingPC) {
455455
handleLinking();
456456
} else {

src/core/DynaRec_x64/symbols.cc

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,7 @@ void DynaRecCPU::makeSymbols() {
8585
REGISTER_VARIABLE(m_regs.CP2C.r[i], COP2_controlRegs[i], 4);
8686
}
8787

88-
REGISTER_VARIABLE(m_regs.cycle, "m_cycles", 4);
88+
REGISTER_VARIABLE(m_regs.cycle, "m_cycles", 8);
8989
REGISTER_VARIABLE(m_regs.pc, "m_pc", 4);
9090

9191
for (int i = 0; i < 16; i++) { // Register host register cache

src/core/cdrom.cc

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -580,7 +580,9 @@ class CDRomImpl : public PCSX::CDRom {
580580

581581
if (m_irqRepeated) {
582582
m_irqRepeated = 0;
583-
if (m_eCycle > PCSX::g_emulator->m_cpu->m_regs.cycle) {
583+
auto &regs = PCSX::g_emulator->m_cpu->m_regs;
584+
auto diff = regs.intTargets[PCSX::PSXINT_CDR] - regs.cycle;
585+
if (m_eCycle > diff) {
584586
scheduleCDIRQ(m_eCycle);
585587
goto finish;
586588
}

src/core/psxcounters.cc

Lines changed: 10 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ inline void PCSX::Counters::writeCounterInternal(uint32_t index, uint32_t value)
5555
}
5656

5757
inline uint32_t PCSX::Counters::readCounterInternal(uint32_t index) {
58-
uint32_t count;
58+
uint64_t count;
5959

6060
count = PCSX::g_emulator->m_cpu->m_regs.cycle;
6161
count -= m_rcnts[index].cycleStart;
@@ -71,17 +71,17 @@ inline uint32_t PCSX::Counters::readCounterInternal(uint32_t index) {
7171

7272
void PCSX::Counters::set() {
7373
m_psxNextCounter = PCSX::g_emulator->m_cpu->m_regs.cycle;
74-
uint32_t next = 0x7fffffff;
74+
uint64_t next = 0x7fffffffffffffff;
7575

7676
for (int i = 0; i < CounterQuantity; ++i) {
77-
int32_t countToUpdate = m_rcnts[i].cycle - (m_psxNextCounter - m_rcnts[i].cycleStart);
77+
int64_t countToUpdate = m_rcnts[i].cycle - (m_psxNextCounter - m_rcnts[i].cycleStart);
7878

7979
if (countToUpdate < 0) {
8080
next = 0;
8181
break;
8282
}
8383

84-
if (countToUpdate < (int32_t)next) {
84+
if (countToUpdate < (int64_t)next) {
8585
next = countToUpdate;
8686
}
8787
}
@@ -90,7 +90,7 @@ void PCSX::Counters::set() {
9090
}
9191

9292
void PCSX::Counters::reset(uint32_t index) {
93-
uint32_t count;
93+
uint64_t count;
9494

9595
if (m_rcnts[index].counterState == CountToTarget) {
9696
if (m_rcnts[index].mode & RcCountToTarget) {
@@ -138,19 +138,11 @@ void PCSX::Counters::reset(uint32_t index) {
138138
}
139139

140140
void PCSX::Counters::update() {
141-
const uint32_t cycle = PCSX::g_emulator->m_cpu->m_regs.cycle;
141+
const uint64_t cycle = PCSX::g_emulator->m_cpu->m_regs.cycle;
142142

143143
{
144-
uint32_t prev = g_emulator->m_cpu->m_regs.previousCycles;
145-
uint64_t diff;
146-
if (cycle > prev) {
147-
diff = cycle - prev;
148-
} else {
149-
diff = std::numeric_limits<uint32_t>::max();
150-
diff += cycle + 1;
151-
diff -= prev;
152-
diff &= 0xffffffff;
153-
}
144+
uint64_t prev = g_emulator->m_cpu->m_regs.previousCycles;
145+
uint64_t diff = cycle - prev;
154146
diff *= 4410000;
155147
diff /= g_emulator->settings.get<Emulator::SettingScaler>();
156148
diff /= g_emulator->m_psxClockSpeed;
@@ -297,8 +289,8 @@ uint32_t PCSX::Counters::readCounter(uint32_t index) {
297289
*affected).
298290
*/
299291
static uint32_t clast = 0xffff;
300-
static uint32_t cylast = 0;
301-
uint32_t count1 = count;
292+
static uint64_t cylast = 0;
293+
uint64_t count1 = count;
302294
count /= PCSX::Emulator::BIAS;
303295
verboseLog(4, "[RCNT %i] rcountpe2: %x %x %x (%u)\n", index, count, count1, clast,
304296
(PCSX::g_emulator->m_cpu->m_regs.cycle - cylast));

src/core/psxcounters.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@ class Counters {
4040
struct Rcnt {
4141
uint16_t mode, target;
4242
uint32_t rate, irq, counterState, irqState;
43-
uint32_t cycle, cycleStart;
43+
uint64_t cycle, cycleStart;
4444
};
4545

4646
enum {
@@ -86,7 +86,7 @@ class Counters {
8686

8787
uint32_t m_HSyncTotal[PCSX::Emulator::PSX_TYPE_PAL + 1]; // 2
8888
public:
89-
uint32_t m_psxNextCounter;
89+
uint64_t m_psxNextCounter;
9090
bool m_pollSIO1 = false;
9191
void init();
9292
void update();

src/core/r3000a.cc

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -350,25 +350,25 @@ void PCSX::R3000Acpu::branchTest() {
350350
}
351351
#endif
352352

353-
const uint32_t cycle = m_regs.cycle;
353+
const uint64_t cycle = m_regs.cycle;
354354

355355
if (cycle >= g_emulator->m_counters->m_psxNextCounter) g_emulator->m_counters->update();
356356

357357
if (m_regs.spuInterrupt.exchange(false)) g_emulator->m_spu->interrupt();
358358

359359
const uint32_t interrupts = m_regs.interrupt;
360360

361-
int32_t lowestDistance = std::numeric_limits<int32_t>::max();
362-
uint32_t lowestTarget = cycle;
363-
uint32_t* targets = m_regs.intTargets;
361+
int32_t lowestDistance = std::numeric_limits<int64_t>::max();
362+
uint64_t lowestTarget = cycle;
363+
uint64_t* targets = m_regs.intTargets;
364364

365-
if ((interrupts != 0) && (((int32_t)(m_regs.lowestTarget - cycle)) <= 0)) {
365+
if ((interrupts != 0) && (m_regs.lowestTarget < cycle)) {
366366
#define checkAndUpdate(irq, act) \
367367
{ \
368368
constexpr uint32_t mask = 1 << irq; \
369369
if ((interrupts & mask) != 0) { \
370-
uint32_t target = targets[irq]; \
371-
int32_t dist = target - cycle; \
370+
uint64_t target = targets[irq]; \
371+
int64_t dist = target - cycle; \
372372
if (dist > 0) { \
373373
if (lowestDistance > dist) { \
374374
lowestDistance = dist; \

src/core/r3000a.h

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -199,12 +199,12 @@ struct psxRegisters {
199199
psxCP2Ctrl CP2C; // COP2 control registers
200200
uint32_t pc; // Program counter
201201
uint32_t code; // The current instruction
202-
uint32_t cycle;
203-
uint32_t previousCycles;
202+
uint64_t cycle;
203+
uint64_t previousCycles;
204204
uint32_t interrupt;
205205
std::atomic<bool> spuInterrupt;
206-
uint32_t intTargets[32];
207-
uint32_t lowestTarget;
206+
uint64_t intTargets[32];
207+
uint64_t lowestTarget;
208208
uint8_t iCacheAddr[0x1000];
209209
uint8_t iCacheCode[0x1000];
210210
};
@@ -317,12 +317,12 @@ class R3000Acpu {
317317

318318
void scheduleInterrupt(unsigned interrupt, uint32_t eCycle) {
319319
PSXIRQ_LOG("Scheduling interrupt %08x at %08x\n", interrupt, eCycle);
320-
const uint32_t cycle = m_regs.cycle;
321-
uint32_t target = uint32_t(cycle + eCycle * m_interruptScales[interrupt]);
320+
const uint64_t cycle = m_regs.cycle;
321+
uint64_t target = uint64_t(cycle + eCycle * m_interruptScales[interrupt]);
322322
m_regs.interrupt |= (1 << interrupt);
323323
m_regs.intTargets[interrupt] = target;
324-
int32_t lowest = m_regs.lowestTarget - cycle;
325-
int32_t maybeNewLowest = target - cycle;
324+
int64_t lowest = m_regs.lowestTarget - cycle;
325+
int64_t maybeNewLowest = target - cycle;
326326
if (maybeNewLowest < lowest) m_regs.lowestTarget = target;
327327
}
328328

src/core/sio.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -233,7 +233,7 @@ class SIO {
233233

234234
bool isReceiveIRQReady();
235235
bool isTransmitReady();
236-
static inline void scheduleInterrupt(uint32_t eCycle) {
236+
static inline void scheduleInterrupt(uint64_t eCycle) {
237237
g_emulator->m_cpu->scheduleInterrupt(PSXINT_SIO, eCycle);
238238
#if 0
239239
// Breaks Twisted Metal 2 intro

src/core/sstate.cc

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -182,8 +182,8 @@ std::string PCSX::SaveStates::save() {
182182
SaveState state = constructSaveState();
183183
SaveStateWrapper wrapper(state);
184184

185-
state.get<SaveStateInfoField>().get<VersionString>().value = "PCSX-Redux SaveState v3";
186-
state.get<SaveStateInfoField>().get<Version>().value = 3;
185+
state.get<SaveStateInfoField>().get<VersionString>().value = "PCSX-Redux SaveState v4";
186+
state.get<SaveStateInfoField>().get<Version>().value = 4;
187187

188188
g_emulator->m_gpu->serialize(&wrapper);
189189
g_emulator->m_spu->save(state.get<SPUField>());
@@ -288,7 +288,7 @@ bool PCSX::SaveStates::load(std::string_view data) {
288288
return false;
289289
}
290290

291-
if (state.get<SaveStateInfoField>().get<Version>().value != 3) {
291+
if (state.get<SaveStateInfoField>().get<Version>().value != 4) {
292292
return false;
293293
}
294294

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