Incorrect descriptions for PDM delay register arrays on `sai_v3_4pdm`

[tomaz-suller]

stm32-data/data/registers/sai_v3_4pdm.yaml

Lines 285 to 298 in 7c20d20

	- name: DLYML
	description: Delay line adjust for first microphone of pair 1
	bit_offset: 0
	bit_size: 3
	array:
	len: 4
	stride: 8
	- name: DLYMR
	description: Delay line adjust for second microphone of pair 1
	bit_offset: 4
	bit_size: 3
	array:
	len: 4
	stride: 8

The description was clearly kept from the original, but each one of these arrays controls all of the 4 pair delays, not just that of pair 1.