-
Notifications
You must be signed in to change notification settings - Fork 369
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Software emulation OpenCL runtime error, Xilinx/Vitis #173
Comments
Please check the Vitis installation and enviroment settings. |
Hello, I would like to ask, if I am using the U200 platform, does this place in the makefile need to be modified? #set the Linux related tools
#EDGE_COMMON_SW := /opt/petalinux/2020.1
EDGE_COMMON_SW := /home/fpga/Xilinx/petalinux/2020.1ZCU102
#EDGE_COMMON_SW := /home/fpga/Xilinx/petalinux/2020.1ZC706``` |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
We are getting the following error when running software emulation
make emu
with Xilinx Vivado and Vitis - what could be the cause?The text was updated successfully, but these errors were encountered: