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zxsec.c
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zxsec.c
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// ###### # # #### ###### #### ------------------------- //
// """"#" "# #" #"""" #""""" #""""# ZXSEC, barebones Sinclair //
// #" "##" "#### ##### # " Spectrum emulator written //
// #" ## """"# #"""" # on top of CPCEC's modules //
// #" #""# # # # # # by Cesar Nicolas-Gonzalez //
// ###### #" "# "####" ###### "####" since 2019-02-24 till now //
// """""" " " """" """""" """" ------------------------- //
#define MY_CAPTION "ZXSEC"
#define my_caption "zxsec"
#define MY_LICENSE "Copyright (C) 2019-2024 Cesar Nicolas-Gonzalez"
/* This notice applies to the source code of CPCEC and its binaries.
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
Contact information: <mailto:[email protected]> */
// The goal of this emulator isn't to provide a precise emulation of
// the ZX Spectrum family (although it sure is desirable) but to show
// that the modular design of the Amstrad CPC emulator CPCEC is good
// on its own and it allows easy reusing of its composing parts.
// This file focuses on the Spectrum-specific features: configuration,
// ULA logic+video, Z80 timings and support, snapshots, options...
#include <stdio.h> // printf()...
#include <stdlib.h> // strtol()...
#include <string.h> // strcpy()...
// ZX Spectrum metrics and constants defined as general types ------- //
#define VIDEO_PLAYBACK 50
#define VIDEO_LENGTH_X (56<<4)
#define VIDEO_LENGTH_Y (39<<4)
#define VIDEO_OFFSET_X (14<<4)
#define VIDEO_OFFSET_Y ( 5<<4) // Pentagon: ( 3<<4)
#define VIDEO_PIXELS_X (40<<4)
#define VIDEO_PIXELS_Y (30<<4) // Pentagon: (34<<4)
//#define VIDEO_OFFSET_X (18<<4) // show the original 512x384 screen without the border
//#define VIDEO_OFFSET_Y ( 8<<4)
//#define VIDEO_PIXELS_X (32<<4)
//#define VIDEO_PIXELS_Y (24<<4)
#define VIDEO_RGB2Y(r,g,b) ((r)*3+(g)*6+(b)) // generic RGB-to-Y expression
#if defined(SDL2)||!defined(_WIN32)
unsigned short session_icon32xx16[32*32] = {
#include "zxsec-a4.h"
};
#endif
// The Spectrum 48K keyboard; later models add pairs such as BREAK = CAPS SHIFT + SPACE
// +---------------------------------------------------------------------+
// | 1 18 | 2 19 | 3 1A | 4 1B | 5 1C | 6 24 | 7 23 | 8 22 | 9 21 | 0 20 |
// +------+------+------+------+------+------+------+------+------+------+
// | Q 10 | W 11 | E 12 | R 13 | T 14 | Y 2C | U 2B | I 2A | O 29 | P 28 |
// +------+------+------+------+------+------+------+------+------+------+
// | A 08 | S 09 | D 0A | F 0B | G 0C | H 34 | J 33 | K 32 | L 31 | * 30 | * 30 RETURN
// +------+------+------+------+------+------+------+------+------+------+ + 00 CAPS SHIFT
// | + 00 | Z 01 | X 02 | C 03 | V 04 | B 3C | N 3B | M 3A | - 39 | / 38 | / 38 SPACE
// +---------------------------------------------------------------------+ - 39 SYMBOL SHIFT
#define KBD_JOY_UNIQUE 5 // four sides + one fire
unsigned char kbd_joy[]= // ATARI norm: up, down, left, right, fire1-4
{ 0,0,0,0,0,0,0,0 }; // variable instead of constant, there are several joystick types
#define MAUS_EMULATION // emulation can examine the mouse
#define MAUS_LIGHTGUNS // lightguns are emulated with the mouse
#define VIDEO_LO_X_RES // no "half" (hi-res) pixels are ever drawn
#define INFLATE_RFC1950 // reading SZX files requires inflating RFC1950 data
#define DEFLATE_RFC1950 // writing SZX files may need deflating RFC1950 data
#define DEFLATE_NOSTORE // deflating must either succeed or fail; it can't fall back to store!
#define POWER_BOOST1 3 // power_boost default value (enabled)
#define POWER_BOOST0 8
#define DEBUG_LONGEST 4 // Z80 opcodes can be up to 4 bytes long
#include "cpcec-rt.h" // emulation framework!
BYTE joy1_type=1; // i.e. 9867+0 Interface II
BYTE joy1_types[][8]={ // virtual button is repeated for all joystick buttons
{ 0X43,0X42,0X41,0X40,0X44,0X44,0X44,0X44 }, // Kempston ("fake" keyboard row 8)
{ 0X21,0X22,0X24,0X23,0X20,0X20,0X20,0X20 }, // 9867+0: Sinclair 1, Interface II
{ 0X1B,0X1A,0X18,0X19,0X1C,0X1C,0X1C,0X1C }, // 4312+5: Sinclair 2
{ 0X23,0X24,0X1C,0X22,0X20,0X20,0X20,0X20 }, // 7658+0: Cursor, Protek, AGF
{ 0X10,0X08,0X29,0X28,0X38,0X38,0X38,0X38 }, // QAOP+Space
};
int litegun=0; // 0 = standard joystick, 1 = Gunstick (MHT)
const unsigned char kbd_map_xlt[]=
{
// control keys
KBCODE_F1 ,0x81, KBCODE_F2 ,0x82, KBCODE_F3 ,0x83, KBCODE_F4 ,0x84,
KBCODE_F5 ,0x85, KBCODE_F6 ,0x86, KBCODE_F7 ,0x87, KBCODE_F8 ,0x88,
KBCODE_F9 ,0x89, KBCODE_HOLD ,0x8F, KBCODE_F11 ,0x8B, KBCODE_F12 ,0x8C,
KBCODE_X_ADD ,0x91, KBCODE_X_SUB ,0x92, KBCODE_X_MUL ,0x93, KBCODE_X_DIV ,0x94,
#ifdef DEBUG
KBCODE_PRIOR ,0x95, KBCODE_NEXT ,0x96, KBCODE_HOME ,0x97, KBCODE_END ,0x98,
#endif
// actual keys
KBCODE_1 ,0x18, KBCODE_Q ,0x10, KBCODE_A ,0x08, KBCODE_L_SHIFT ,0x00,
KBCODE_2 ,0x19, KBCODE_W ,0x11, KBCODE_S ,0x09, KBCODE_Z ,0x01,
KBCODE_3 ,0x1A, KBCODE_E ,0x12, KBCODE_D ,0x0A, KBCODE_X ,0x02,
KBCODE_4 ,0x1B, KBCODE_R ,0x13, KBCODE_F ,0x0B, KBCODE_C ,0x03,
KBCODE_5 ,0x1C, KBCODE_T ,0x14, KBCODE_G ,0x0C, KBCODE_V ,0x04,
KBCODE_6 ,0x24, KBCODE_Y ,0x2C, KBCODE_H ,0x34, KBCODE_B ,0x3C,
KBCODE_7 ,0x23, KBCODE_U ,0x2B, KBCODE_J ,0x33, KBCODE_N ,0x3B,
KBCODE_8 ,0x22, KBCODE_I ,0x2A, KBCODE_K ,0x32, KBCODE_M ,0x3A,
KBCODE_9 ,0x21, KBCODE_O ,0x29, KBCODE_L ,0x31, KBCODE_L_CTRL ,0x39,
KBCODE_0 ,0x20, KBCODE_P ,0x28, KBCODE_ENTER ,0x30, KBCODE_SPACE ,0x38,
// key mirrors
KBCODE_R_SHIFT ,0x00, KBCODE_R_CTRL ,0x39,
KBCODE_X_7 ,0x23, KBCODE_X_8 ,0x22, KBCODE_X_9 ,0x21,
KBCODE_X_4 ,0x1B, KBCODE_X_5 ,0x1C, KBCODE_X_6 ,0x24,
KBCODE_X_1 ,0x18, KBCODE_X_2 ,0x19, KBCODE_X_3 ,0x1A,
KBCODE_X_0 ,0x20, KBCODE_X_ENTER ,0x30,
// built-in combinations
// composite key row 9: CAPS SHIFT + row 3
KBCODE_TAB ,0x48, // CAPS SHIFT + "1" (0x18)
KBCODE_CAPSLOCK ,0x49, // CAPS SHIFT + "2" (0x19)
KBCODE_LEFT ,0x4C, // CAPS SHIFT + "5" (0x1C) CURSOR LEFT
// composite key row 10: CAPS SHIFT + row 4
KBCODE_BKSPACE ,0x50, // CAPS SHIFT + "0" (0x20) BACKSPACE
KBCODE_UP ,0x53, // CAPS SHIFT + "7" (0x23) CURSOR UP
KBCODE_DOWN ,0x54, // CAPS SHIFT + "6" (0x24) CURSOR DOWN
KBCODE_RIGHT ,0x52, // CAPS SHIFT + "8" (0x22) CURSOR RIGHT
//KBCODE_INSERT ,0x51, // CAPS SHIFT + "9" (0x21) GRAPH?
// composite key row 11: CAPS SHIFT + row 7
KBCODE_ESCAPE ,0x58, // CAPS SHIFT + SPACE (0x38)
// composite key row 12: SYMBOL SHIFT + row 0
KBCODE_CHR3_1 ,0X61, // SYMBOL SHIFT + "Z" (0x01) = ":"
KBCODE_CHR4_3 ,0X64, // SYMBOL SHIFT + "V" (0x03) = "/"
KBCODE_CHR4_5 ,0X63, // SYMBOL SHIFT + "C" (0x03) = "?"
KBCODE_CHR4_4 ,0X63, // SYMBOL SHIFT + "C" (0x03) ditto; KBCODE_CHR4_4 105-K!
// composite key row 13: SYMBOL SHIFT + row 3
// composite key row 14: SYMBOL SHIFT + row 4
// composite key row 15: SYMBOL SHIFT + row 7
KBCODE_CHR4_1 ,0x7B, // SYMBOL SHIFT + "N" (0x3B) = ","
KBCODE_CHR4_2 ,0x7A, // SYMBOL SHIFT + "M" (0x3A) = "."
KBCODE_X_DOT ,0x7A, // SYMBOL SHIFT + "M" (0x3A) ditto
};
const VIDEO_UNIT video_table[16+8+8+4]= // colour table, 0xRRGGBB style, followed by the 8-8-4 components of ULAPLUS
{
#if 1 // linear RGB
0X000000,0X0000B6,0XB60000,0XB600B6,
0X00B600,0X00B6B6,0XB6B600,0XB6B6B6,
0X000000,0X0000FF,0XFF0000,0XFF00FF,
0X00FF00,0X00FFFF,0XFFFF00,0XFFFFFF,
// ULAPLUS subcomponents: 8G,8R,4B
0X000000,0X002400,0X004900,0X006D00,
0X009200,0X00B600,0X00DB00,0X00FF00,
0X000000,0X240000,0X490000,0X6D0000,
0X920000,0XB60000,0XDB0000,0XFF0000,
0X000000,0X00006D,0X0000B6,0X0000FF,
#else // gamma: 1.6
0X000000,0X0000A5,0XA50000,0XA500A5,
0X00A500,0X00A5A5,0XA5A500,0XA5A5A5,
0X000000,0X0000FF,0XFF0000,0XFF00FF,
0X00FF00,0X00FFFF,0XFFFF00,0XFFFFFF,
// ULAPLUS subcomponents: 8G,8R,4B
0X000000,0X004000,0X006000,0X008000,
0X00A000,0X00C000,0X00E000,0X00FF00,
0X000000,0X400000,0X600000,0X800000,
0XA00000,0XC00000,0XE00000,0XFF0000,
0X000000,0X000080,0X0000C0,0X0000FF,
#endif
// n.b.: ULAPLUS GREY (5-5-2) must match its original counterpart!
};
VIDEO_UNIT video_xlat[16]; // static colours only (dynamic ULAPLUS colours go elsewhere)
// GLOBAL DEFINITIONS =============================================== //
int TICKS_PER_FRAME;// ((VIDEO_LENGTH_X*VIDEO_LENGTH_Y)>>3);
int TICKS_PER_SECOND;// (TICKS_PER_FRAME*VIDEO_PLAYBACK);
// Everything in the ZX Spectrum is tuned to a 3.5 MHz clock,
// using simple binary divisors to adjust the devices' timings;
// the "3.5 MHz" isn't neither exact or the same on each machine:
// 50*312*224= 3494400 Hz on 48K, 50*311*228= 3545400 Hz on 128K.
// (and even the 50Hz screen framerate isn't the exact PAL value!)
int multi_t=0,multi_u=0; // overclocking shift+bitmask
// HARDWARE DEFINITIONS ============================================= //
BYTE mem_ram[10<<14],mem_rom[4<<14]; // memory: 10*16K RAM and 4*16K ROM
BYTE *mmu_ram[4],*mmu_rom[4]; // memory is divided in 4x 16K banks
#define mem_16k (&mem_ram[8<<14]) // dummy bank: write-only area for ROM writes
#define mem_32k (&mem_ram[9<<14]) // dummy bank: read-only area filled with 255
#define PEEK(x) mmu_rom[(x)>>14][x] // WARNING, x cannot be `x=EXPR`!
#define POKE(x) mmu_ram[(x)>>14][x] // WARNING, x cannot be `x=EXPR`!
BYTE type_id=1; // 0=48K, 1=128K, 2=PLUS2, 3=PLUS3
BYTE disc_disabled=0; // disables the disc drive altogether as well as its related logic; +1 = manual, +2 = automatic
BYTE disc_filemode=1; // +1 = read-only by default instead of read-write; +2 = relaxed disc write errors instead of strict
VIDEO_UNIT video_clut[65]; // precalculated colour palette, 16 attr + 48-colour ULAPLUS extra palette + border
// Z80 registers: the hardware and the debugger must be allowed to "spy" on them!
HLII z80_af,z80_bc,z80_de,z80_hl; // Accumulator+Flags, BC, DE, HL
HLII z80_af2,z80_bc2,z80_de2,z80_hl2,z80_ix,z80_iy; // AF', BC', DE', HL', IX, IY
HLII z80_pc,z80_sp,z80_iff,z80_ir; // Program Counter, Stack Pointer, Interrupt Flip-Flops, IR pair
BYTE z80_imd,z80_r7; // Interrupt Mode // low 7 bits of R, required by several `IN X,(Y)` operations
// the Dandanator cartridge system can spy on the Z80 and trap its operations
#define Z80_DANDANATOR
BYTE *mem_dandanator=NULL; char dandanator_path[STRMAX]="";
WORD dandanator_trap,dandanator_temp; // Dandanator-Z80 watchdogs
BYTE dandanator_cfg[8]; // CONFIG + OPCODE + PARAM1 + PARAM2 + active + return + asleep + EEPROM
int dandanator_canwrite=0,dandanator_dirty,dandanator_base; // R/W status
// the BETA128 disc interface can spy on the Z80, too!
#define TRDOS_AVGTRACKS 80 // typical discs are 640K long...
#define TRDOS_MAXTRACKS 86 // but some discs are up to 688K
#define DISKETTE_PAGE 256
#define DISKETTE_TRACK99 99
#define DISKETTE_SECTORS 16
#define DISKETTE_PC (z80_pc.w)
#define diskette_filemode disc_filemode // shared by FDC765 and WD1793
#define diskette_drives 2
#include "cpcec-wd.h"
FILE *trdos[4]={NULL,NULL,NULL,NULL}; char trdos_path[STRMAX]=""; // file handles and current path
int trdos_mapped=0; BYTE trdos_rom[1<<14],diskette_system=0;
#define trdos_setup() diskette_setup()
#define trdos_closeall() (trdos_close(0),trdos_close(1))
int trdos_load(char *s) // load BETA128 TR-DOS BIOS. `s` path; 0 OK, !0 ERROR
{
*trdos_rom=0; // tag ROM as empty
FILE *f=fopen(strcat(strcpy(session_substr,session_path),s),"rb"); if (!f) return 1; // fail!
int i=fread1(trdos_rom,1<<14,f); i+=fread1(trdos_rom,1<<14,f);
return fclose(f),i!=(1<<14); //||!equalsmmmm(&trdos_rom[0X3D03],0X00181400); // TR-DOS fingerprint
}
#define trdos_reset() (diskette_reset(),diskette_system=4) // reset BETA128 logic; beware, don't touch `trdos_mapped`!
void trdos_close(int d) // close BETA128 disc in drive `d`(0 = A:), if any
{
if (diskette_size[d]<0)
fseek(trdos[d],0,SEEK_SET),fwrite1(diskette_mem[d],-diskette_size[d],trdos[d]),fsetsize(trdos[d],-diskette_size[d]);
if (diskette_mem[d])
free(diskette_mem[d]),diskette_mem[d]=NULL;
if (trdos[d])
puff_fclose(trdos[d]),trdos[d]=NULL;
diskette_size[d]=0;
}
int trdos_create(char *s) // create a blank BETA128 disc in path `s`; !0 ERROR
{
FILE *f=fopen(s,"wb"); if (!f)
return 1; // cannot create disc!
BYTE t[1<<8]; // a whole sector
MEMZERO(t);
for (int i=8;i;--i) fwrite1(t,sizeof(t),f);
//t[0XE1]=0; // first sector
t[0XE2]=1; // first track
t[0XE3]=0X16; // 80 tracks, 2 sides
//t[0XE4]=0; // no files
t[0XE5]=240;
t[0XE6]=9;
t[0XE7]=0X10; // TR-DOS filesystem
memset(&t[0XEA],' ',9);
strcpy(&t[0XF5],"SINCLAIR");
fwrite1(t,sizeof(t),f);
MEMZERO(t);
for (int i=TRDOS_AVGTRACKS*32-9;i;--i) fwrite1(t,sizeof(t),f);
return fclose(f);
}
int trdos_open(char *s,int d,int q) // insert a BETA128 disc from path `s` in drive `d`; !0 ERROR
{
trdos_close(d); //if (!*trdos_rom) return 1; // no TR-DOS ROM!
if (!(diskette_mem[d]=malloc(TRDOS_MAXTRACKS*2*DISKETTE_SECTORS*DISKETTE_PAGE)))
return 1; // memory error!
if (!(trdos[d]=puff_fopen(s,(diskette_canwrite[d]=q)?"rb+":"rb")))
return trdos_close(d),1; // file error!
int i=fread1(diskette_mem[d],9,trdos[d]);
if (!memcmp(diskette_mem[d],"SINCLAIR",8)&&diskette_mem[d][8]<'B') // valid SCL header?
{
int j,k=diskette_mem[d][8];
memset(diskette_mem[d],0,4096);
for (i=16,j=0;j<k;++j) // build file list (the first 4k)
{
fread1(&diskette_mem[d][16*j],14,trdos[d]);
diskette_mem[d][16*j+14]=i&15;
diskette_mem[d][16*j+15]=i>>4;
i+=diskette_mem[d][16*j+13];
}
cprintf("SCL header: %d files and %d sectors.\n",k,i);
diskette_mem[d][0X008E1]=i&15;
diskette_mem[d][0X008E2]=i>>4;
diskette_mem[d][0X008E3]=0X16; // 80 tracks, 2 sides
diskette_mem[d][0X008E4]=k;
diskette_mem[d][0X008E5]=j=(2560-16-i); // skip the first 4k
diskette_mem[d][0X008E6]=j>>8;
diskette_mem[d][0X008E7]=0X10; // TR-DOS filesystem
memset(&diskette_mem[d][0X008EA],' ',9);
strcpy(&diskette_mem[d][0X008F5],"SINCLAIR"); //memset(&diskette_mem[d][0X008F5],' ',8);
i=4096; diskette_canwrite[d]=0; // SCL files are read-only
}
// either TRD or SCL, read the remainder of the file
i+=fread1(&diskette_mem[d][i],(TRDOS_MAXTRACKS*2*DISKETTE_SECTORS*DISKETTE_PAGE)-i,trdos[d]);
i+=fread1(diskette_mem[d],(TRDOS_MAXTRACKS*2*DISKETTE_SECTORS*DISKETTE_PAGE),trdos[d]);
if (i<8192||i>(TRDOS_MAXTRACKS*2*DISKETTE_SECTORS*DISKETTE_PAGE)||diskette_mem[d][0X008E7]!=0X10||(diskette_mem[d][0X31]>0&&diskette_mem[d][0X31]<3))
return trdos_close(d),1; // not a valid TR-DOS disc!
if (i<(TRDOS_MAXTRACKS*2*DISKETTE_SECTORS*DISKETTE_PAGE))
memset(&diskette_mem[d][i],0,(TRDOS_MAXTRACKS*2*DISKETTE_SECTORS*DISKETTE_PAGE)-i); // sanitize unused space
diskette_sides[d]=(diskette_mem[d][0X008E3]&8)?1:2;
diskette_tracks[d]=TRDOS_AVGTRACKS>>(diskette_mem[d][0X008E3]&1); // i.e. 40 if true, 80 if false
cprintf("TRDOS format: %d tracks and %d sides.\n",diskette_tracks[d],diskette_sides[d]);
STRCOPY(trdos_path,s);
return diskette_size[d]=diskette_tracks[d]*diskette_sides[d]*DISKETTE_SECTORS*DISKETTE_PAGE,0;
}
// 0x??FE,0x7FFD,0x1FFD: ULA 48K,128K,PLUS3 ------------------------- //
BYTE ula_v1,ula_v2,ula_v3; // 48K, 128K and PLUS3 respectively
#define ULA_V1_ISSUE3 16 // the Issue-3 ULA port base value
#define ULA_V1_ISSUE2 24 // ditto, on Issue-2
BYTE psg_disabled=0,ula_v1_issue=ULA_V1_ISSUE3,ula_v1_cache=0; // auxiliar ULA variables
BYTE *ula_screen; int ula_bitmap,ula_attrib; // VRAM pointers
BYTE ula_clash[2][1<<16],*ula_clash_mreq[5],*ula_clash_iorq[5]; // the fifth entry stands for constant clashing
int ula_clash_z; // the in-frame T counter, a 17-bit cursor that follows the ULA clash map
int ula_start_x,ula_limit_x,ula_start_y,ula_limit_y,ula_irq_0_x; // horizontal+vertical limits
char ula_fix_chr,ula_fix_out; // ULA timing adjustments for attribute and border effects
char ula_sixteen=0,ula_pentagon=0,ula_latetiming=1; // 16K mode, Pentagon logic and IRQ type
void ula_setup_clash(int j,int l,int x0,int x1,int x2,int x3,int x4,int x5,int x6,int x7)
{
MEMZERO(ula_clash); // non-contended areas lack clash
for (int y=0;y<192;j+=l-128,++y)
for (int x=0;x<16;++x)
ula_clash[1][j++]=x0,
ula_clash[1][j++]=x1,
ula_clash[1][j++]=x2,
ula_clash[1][j++]=x3,
ula_clash[1][j++]=x4,
ula_clash[1][j++]=x5,
ula_clash[1][j++]=x6,
ula_clash[1][j++]=x7;
}
#define ula_setup() ((void)0)
void ula_update(void) // update ULA settings according to model
{
// the non-Pentagon models' contention timing tables can be precalculated
if (type_id<1)
ula_setup_clash(14335,224,6,5,4,3,2,1,0,0); // ULA v1: 48K
else if (type_id<3)
ula_setup_clash(14361,228,6,5,4,3,2,1,0,0); // ULA v2: 128K,PLUS2
else
ula_setup_clash(14365,228,1,0,7,6,5,4,3,2); // ULA v3: PLUS3
// the Pentagon timings were measured with the beamracing-heavy demos "ACROSS THE EDGE" and "KPACKU DELUXE"
ula_fix_out=ula_pentagon? 7:type_id? 2: 0; // contention tests ULA48, ULA128, ULA128P3, FPGA48ALL and FPGA128
ula_fix_chr=ula_pentagon? 42:type_id? 1: 0; // NIRVANA games DREAMWALKER, MULTIDUDE, SUNBUCKET, STORMFINCH...
ula_start_x=ula_pentagon? 38:type_id? 39: 38; // HBLANK position
ula_limit_x=ula_pentagon? 56:type_id? 57: 56; // characters per scanline
ula_start_y=ula_pentagon?-17:type_id? 1: 0; // vertical offset
ula_irq_0_x=ula_pentagon||(type_id>0&&type_id<3)?9:8; // 48K and +3/+2A, 32T; 128K/+2 and Pentagon, 36T
ula_limit_y=ula_pentagon?303:312; // VBLANK position (not frame height)
TICKS_PER_SECOND=(TICKS_PER_FRAME=(ula_limit_y-ula_start_y)*ula_limit_x*4)*VIDEO_PLAYBACK;
if (!type_id&&ula_sixteen)
memset(mem_32k,-1,1<<14); // used by 16K models, where POKE must do nothing and PEEK must not return ZERO
}
const int mmu_ram_mode[4][4]= // relative offsets of every bank for each PLUS3 RAM mode
{
{ 0x00000-0x0000,0x04000-0x4000,0x08000-0x8000,0x0C000-0xC000 }, // V3=1: 0 1 2 3
{ 0x10000-0x0000,0x14000-0x4000,0x18000-0x8000,0x1C000-0xC000 }, // V3=3: 4 5 6 7
{ 0x10000-0x0000,0x14000-0x4000,0x18000-0x8000,0x0C000-0xC000 }, // V3=5: 4 5 6 3
{ 0x10000-0x0000,0x1C000-0x4000,0x18000-0x8000,0x0C000-0xC000 }, // V3=7: 4 7 6 3
};
void mmu_update(void) // update the MMU tables with all the new offsets
{
// Contention applies to the banks:
// - V1 (48K): area 4000-7FFF (equivalent to 128K bank 5)
// - V2 (128K,PLUS2): banks 1,3,5,7
// - V3 (PLUS3): banks 4,5,6,7
// In other words:
// - banks 5 and 7 are always contended;
// - banks 1 and 3 are contended on V2;
// - banks 4 and 6 are contended on V3.
if (ula_pentagon||type_id>3||multi_t>0) // models and configurations without contention
{
ula_clash_mreq[0]=ula_clash_mreq[1]=ula_clash_mreq[2]=ula_clash_mreq[3]=ula_clash_mreq[4]=
ula_clash_iorq[0]=ula_clash_iorq[1]=ula_clash_iorq[2]=ula_clash_iorq[3]=ula_clash_iorq[4]=ula_clash[0];
}
else
{
ula_clash_mreq[4]=ula_clash[1];
ula_clash_mreq[0]=ula_clash_mreq[2]=(type_id==3&&(ula_v3&7)==1)?ula_clash_mreq[4]:ula_clash[0];
ula_clash_mreq[1]=(type_id<3||(ula_v3&7)!=1)?ula_clash_mreq[4]:ula_clash[0];
ula_clash_mreq[3]=type_id&&(type_id==3?ula_v3&1?(ula_v3&7)==3:ula_v2&4:ula_v2&1)?ula_clash_mreq[4]:ula_clash[0];
if (type_id==3)
ula_clash_iorq[0]=ula_clash_iorq[1]=ula_clash_iorq[2]=ula_clash_iorq[3]=ula_clash_iorq[4]=ula_clash[0]; // IORQ doesn't clash at all on PLUS3 and PLUS2A!
else
ula_clash_iorq[0]=ula_clash_iorq[2]=ula_clash_iorq[3]=ula_clash[0],ula_clash_iorq[1]=ula_clash_iorq[4]=ula_clash_mreq[4]; // clash on 0x4000-0x7FFF only
}
if (ula_v3&1) // PLUS3 custom mode?
{
int i=(ula_v3>>1)&3;
mmu_rom[0]=mmu_ram[0]=&mem_ram[mmu_ram_mode[i][0]]; // 0000-3FFF
mmu_rom[1]=mmu_ram[1]=&mem_ram[mmu_ram_mode[i][1]]; // 4000-7FFF
mmu_rom[2]=mmu_ram[2]=&mem_ram[mmu_ram_mode[i][2]]; // 8000-BFFF
mmu_rom[3]=mmu_ram[3]=&mem_ram[mmu_ram_mode[i][3]]; // C000-FFFF
}
else // normal 48K + 128K modes
{
mmu_rom[0]=&mem_rom[((ula_v2&16)<<10)+((ula_v3&4)<<13)-0x0000]; // i.e. ROM ID=((ula_v3&4)/2)+((ula_v2&16)/16)
if (/*mmu_rom[0]==&mem_rom[0xC000-0x0000]&&*/(trdos_mapped&*trdos_rom)) // 0XF3 in TRDOS.ROM
mmu_rom[0]=&trdos_rom[-0x0000]; // TR-DOS appears in place of the 48K BIOS
mmu_ram[0]=mem_16k-0x0000; // 0000-3FFF is a dummy 16K for ROM writes (special case: Dandanator)
mmu_rom[1]=mmu_ram[1]=&mem_ram[(5<<14)-0x4000]; // 4000-7FFF is always bank 5
if (ula_sixteen&&!type_id) // 16K mode
mmu_rom[2]=mem_32k-0x8000,mmu_rom[3]=mem_32k-0xC000,
mmu_ram[2]=mem_16k-0x8000,mmu_ram[3]=mem_16k-0xC000;
else
mmu_rom[2]=mmu_ram[2]=&mem_ram[(2<<14)-0x8000], // 8000-BFFF is always bank 2
mmu_rom[3]=mmu_ram[3]=&mem_ram[((ula_v2&7)<<14)-0xC000]; // C000-FFFF is only limited to bank 0 on 48K
}
ula_screen=&mem_ram[(ula_v2&8)?0x1C000:0x14000]; // bit 3: VRAM is bank 5 (OFF) or 7 (ON)
#ifdef Z80_DANDANATOR // Dandanator is always the last part of the MMU update
if (mem_dandanator) // emulate the Dandanator (and more exactly its Spectrum memory map) only when a card is loaded
if (dandanator_cfg[4]<32)
mmu_rom[0]=&mem_dandanator[(dandanator_cfg[4]<<14)-0x0000];
}
#define dandanator_clear() (dandanator_cfg[0]=dandanator_cfg[1]=dandanator_cfg[2]=dandanator_cfg[3]=dandanator_temp=0)
void dandanator_update(void) // parse and run Dandanator commands, if any
{
if (mem_dandanator) // ignore if empty
{
if (dandanator_cfg[0]==46) // wake up!
{
if (dandanator_cfg[1]==dandanator_cfg[2]) // parameters must match
{
cprintf("DAN! %08X: 046,%03d\n",z80_pc.w,dandanator_cfg[1]);
if (dandanator_cfg[1]==1) dandanator_cfg[6]|=4; // go to sleep
else if (dandanator_cfg[1]==16) dandanator_cfg[6]&=~4; // wake up
else if (dandanator_cfg[1]==31) dandanator_cfg[6]|=8; // sleep till reset
}
}
else if (!dandanator_cfg[6]) // ignore if asleep
{
cprintf("DAN! %08X: %03d,%03d,%03d,%03d\n",z80_pc.w,dandanator_cfg[0],dandanator_cfg[1],dandanator_cfg[2],dandanator_cfg[3]);
if (dandanator_cfg[0]>0&&dandanator_cfg[0]<34) // immediate bank change
dandanator_cfg[4]=dandanator_cfg[0]-1;
else switch(dandanator_cfg[0])
{
case 34: // vanish and sleep!
dandanator_cfg[4]=32,dandanator_cfg[6]|=4; break;
case 36: // reset Z80!
z80_iff.w=z80_pc.w=0; break;
case 40: // bank + flags
{
if (dandanator_cfg[2]&3) // reset or NMI? changes are immediate!
dandanator_cfg[4]=dandanator_cfg[1]-1,z80_iff.w=0,z80_pc.w=/*(dandanator_cfg[2]&1)?*/0/*:0x66*/; // is the NMI ever used?
else // changes aren't immediate, wait till next RET
dandanator_cfg[5]=dandanator_cfg[1];
dandanator_cfg[6]=dandanator_cfg[2]&12; break; // +4 wakes up with command 46, +8 sleeps till reset
}
case 48: // EEPROM: uses the dummy 16K bank as a bridge
{
if (dandanator_cfg[1]==16)
dandanator_base=-1; // get ready for bridge setup with a later LD (HL),A
else if (dandanator_cfg[1]==32) // request EEPROM sector for writing
if (dandanator_cfg[7]=dandanator_cfg[2]&127) // keep EEPROM sector 0 read-only
;//if (dandanator_canwrite&&mem_dandanator)
//memset(mem_16k,-1,4<<12),dandanator_dirty=1; // reset dummy bank
break;
}
}
mmu_update(); // nudge the MMU even if there are no changes; this is summoned on dandanator_reset()!
}
}
dandanator_clear(); // update MMU and reset command queue
}
void dandanator_eeprom(void) // modify the cartridge, if allowed
{
if (dandanator_cfg[7]) // before doing RET, "SWORD OF IANNA" sends 4K to 0000-0FFF and "BOBBY CARROT" sends 4K to 3000-3FFF
{
cprintf("DAN! %08X: %02X,%04X: %02X%02X%02X%02X%02X%02X%02X%02X...\n",z80_pc.w,dandanator_cfg[7],dandanator_base
,mem_16k[dandanator_base+0],mem_16k[dandanator_base+1],mem_16k[dandanator_base+2],mem_16k[dandanator_base+3]
,mem_16k[dandanator_base+4],mem_16k[dandanator_base+5],mem_16k[dandanator_base+6],mem_16k[dandanator_base+7]
);
if (dandanator_canwrite&&mem_dandanator&&!(dandanator_base&0x0FFF))
{
memcpy(&mem_dandanator[dandanator_cfg[7]<<12],mem_16k+dandanator_base,1<<12); // dump dummy 16K bank onto the EEPROM sector
dandanator_dirty=dandanator_base=1;
}
dandanator_cfg[7]=0;
}
}
#define Z80_DNTR_0X10(w) do{ if (!--dandanator_trap) { if (dandanator_temp&1) ++dandanator_temp; \
if (w<0x4000) dandanator_trap=1; else if (dandanator_temp>3*2||(dandanator_cfg[0]>0&&dandanator_cfg[0]<40)) dandanator_update(); } }while(0)
//#define Z80_DNTR_0X02(w,b) do{ if (mem_16k[0x1555]==0xAA) dandanator_base=w,mem_16k[0x1555]=0; }while(0) // no known Dandanator titles need this, but nothing keeps them from needing it!
#define Z80_DNTR_0X12(w,b) do{ if (mem_16k[0x1555]==0xAA) dandanator_base=w,mem_16k[0x1555]=0; }while(0)
#define Z80_DNTR_0X32(w,b) do{ if (w<4) { ++dandanator_cfg[(dandanator_temp|=1)/2]; \
if (dandanator_temp<=3*2) dandanator_trap=1; else dandanator_update(); } }while(0)
#define Z80_DNTR_0X77(w,b) do{ if (mem_16k[0x1555]==0xAA) dandanator_base=w,mem_16k[0x1555]=0; \
else if (w<4) ++dandanator_cfg[(dandanator_temp|=1)/2],dandanator_trap=1; }while(0)
#define Z80_DNTR_0XC9() do{ if (mem_16k[0x1555]==0xA0) dandanator_eeprom(),mem_16k[0x1555]=0; \
else if (dandanator_cfg[5]) dandanator_cfg[4]=dandanator_cfg[5]-1,dandanator_cfg[5]=0,mmu_update(); }while(0)
#define Z80_DNTR_0XFB() (dandanator_clear()) // we trap EI because interrupt handling implies timeouts
void dandanator_reset(void)
{
MEMZERO(dandanator_cfg); dandanator_trap=dandanator_temp=0;
dandanator_update();
#endif
}
#define ula_v1_send(i) (ula_v1=i,(ulaplus_table[64]&ulaplus_enabled)||(video_clut[64]=video_xlat[ula_v1&7]))
#define ula_v2_send(i) (ula_v2=i,mmu_update())
#define ula_v3_send(i) (ula_v3=i,mmu_update())
BYTE ulaplus_enabled=1,ulaplus_index,ulaplus_table[65]; // ULAPLUS 64-colour palette + configuration byte (default 0, disabled)
#define ulaplus_clut_calc(i) (video_xlat_rgb(video_table[16+(i>>5)]+video_table[24+((i>>2)&7)]+video_table[32+(i&3)]))
VIDEO_UNIT ula_clut[2][256];
void ula_clut_flash(void) // swap the FLASH-enabled entries in the CLUT
{
VIDEO_UNIT t; for (int i=128;i<256;++i)
t=ula_clut[0][i],ula_clut[0][i]=ula_clut[1][i],ula_clut[1][i]=t;
}
void ula_clut_send(int i) // update a valid ULAPLUS entry in the precalc'd table
{
int l=i&7,h=(i&48)<<2;
if (i&8)
h+=l*8,
ula_clut[0][0+h]=ula_clut[0][1+h]=
ula_clut[0][2+h]=ula_clut[0][3+h]=
ula_clut[0][4+h]=ula_clut[0][5+h]=
ula_clut[0][6+h]=ula_clut[0][7+h]=
video_clut[i];
else
h+=l,
ula_clut[1][ 0+h]=ula_clut[1][ 8+h]=
ula_clut[1][16+h]=ula_clut[1][24+h]=
ula_clut[1][32+h]=ula_clut[1][40+h]=
ula_clut[1][48+h]=ula_clut[1][56+h]=
video_clut[i];
}
void ula_clut_update(void) // build a lookup table of ALL precalc'd colours
{
if (ulaplus_table[64]&ulaplus_enabled) // ULAPLUS?
for (int h=0;h<64;h+=16)
for (int l=0;l<8;++l)
{
ula_clut[0][0+h*4+l*8]=ula_clut[0][1+h*4+l*8]=
ula_clut[0][2+h*4+l*8]=ula_clut[0][3+h*4+l*8]=
ula_clut[0][4+h*4+l*8]=ula_clut[0][5+h*4+l*8]=
ula_clut[0][6+h*4+l*8]=ula_clut[0][7+h*4+l*8]=
video_clut[h+l+8];
ula_clut[1][ 0+h*4+l]=ula_clut[1][ 8+h*4+l]=
ula_clut[1][ 16+h*4+l]=ula_clut[1][ 24+h*4+l]=
ula_clut[1][ 32+h*4+l]=ula_clut[1][ 40+h*4+l]=
ula_clut[1][ 48+h*4+l]=ula_clut[1][ 56+h*4+l]=
video_clut[h+l+0];
}
else // original ULA
for (int i=0;i<8;++i)
{
ula_clut[1][ 0+i]=ula_clut[0][ 0+i*8]=
ula_clut[1][ 8+i]=ula_clut[0][ 1+i*8]=
ula_clut[1][ 16+i]=ula_clut[0][ 2+i*8]=
ula_clut[1][ 24+i]=ula_clut[0][ 3+i*8]=
ula_clut[1][ 32+i]=ula_clut[0][ 4+i*8]=
ula_clut[1][ 40+i]=ula_clut[0][ 5+i*8]=
ula_clut[1][ 48+i]=ula_clut[0][ 6+i*8]=
ula_clut[1][ 56+i]=ula_clut[0][ 7+i*8]=
ula_clut[1][128+i]=ula_clut[0][128+i*8]=
ula_clut[1][136+i]=ula_clut[0][129+i*8]=
ula_clut[1][144+i]=ula_clut[0][130+i*8]=
ula_clut[1][152+i]=ula_clut[0][131+i*8]=
ula_clut[1][160+i]=ula_clut[0][132+i*8]=
ula_clut[1][168+i]=ula_clut[0][133+i*8]=
ula_clut[1][176+i]=ula_clut[0][134+i*8]=
ula_clut[1][184+i]=ula_clut[0][135+i*8]=
video_clut[ 0+i];
ula_clut[1][ 64+i]=ula_clut[0][ 64+i*8]=
ula_clut[1][ 72+i]=ula_clut[0][ 65+i*8]=
ula_clut[1][ 80+i]=ula_clut[0][ 66+i*8]=
ula_clut[1][ 88+i]=ula_clut[0][ 67+i*8]=
ula_clut[1][ 96+i]=ula_clut[0][ 68+i*8]=
ula_clut[1][104+i]=ula_clut[0][ 69+i*8]=
ula_clut[1][112+i]=ula_clut[0][ 70+i*8]=
ula_clut[1][120+i]=ula_clut[0][ 71+i*8]=
ula_clut[1][192+i]=ula_clut[0][192+i*8]=
ula_clut[1][200+i]=ula_clut[0][193+i*8]=
ula_clut[1][208+i]=ula_clut[0][194+i*8]=
ula_clut[1][216+i]=ula_clut[0][195+i*8]=
ula_clut[1][224+i]=ula_clut[0][196+i*8]=
ula_clut[1][232+i]=ula_clut[0][197+i*8]=
ula_clut[1][240+i]=ula_clut[0][198+i*8]=
ula_clut[1][248+i]=ula_clut[0][199+i*8]=
video_clut[ 8+i];
}
}
void video_xlat_clut(void) // precalculate palette following `video_type`; part of it is managed by the ULAPLUS palette
{
if (ulaplus_table[64]&ulaplus_enabled)
{
for (int i=0;i<64;++i)
video_clut[i]=ulaplus_clut_calc(ulaplus_table[i]);
video_clut[64]=video_clut[8]; // border is CLUT #8
}
else
{
for (int i=0;i<16;++i)
video_clut[i]=video_xlat[i];
ula_v1_send(ula_v1); // border is CLUT #64 (ULA V1)
}
ula_clut_update();
}
#define ulaplus_table_select(i) (ulaplus_index=(i<=64?i:ulaplus_index))
#define ulaplus_table_recv() (ulaplus_table[ulaplus_index])
void ulaplus_table_send(int i)
{
if (ulaplus_table[ulaplus_index]!=i)
{
ulaplus_table[ulaplus_index]=i;
//cprintf("%08X: ULAPLUS %02X=%02X:%06X\n",z80_pc.w,ulaplus_index,i,video_clut[ulaplus_index]);
if (ulaplus_index>=64)
video_xlat_clut(); // recalculate whole palette on mode change
else if (ulaplus_table[64]&ulaplus_enabled)
{
video_clut[ulaplus_index]=ulaplus_clut_calc(i);
if (ulaplus_index==8) video_clut[64]=video_clut[ulaplus_index]; // border is CLUT #8
ula_clut_send(ulaplus_index); // modify just one entry
}
}
}
int z80_irq; // IRQ status: +1 IRQ (ULA frame event)
int z80_int; // Z80 INT flag (IFF1 latch + HALT mode)
void ula_reset(void) // reset the ULA
{
ula_v1=ula_v2=ula_v3=ulaplus_index=ulaplus_table[64]=0;
video_xlat_clut();
ula_update(),mmu_update();
ula_bitmap=0; ula_attrib=0x1800;
}
// 0xBFFD,0xFFFD: PSG AY-3-8910 ------------------------------------- //
// sound table, 16 static levels + 1 dynamic level, 16-bit sample style
int psg_outputs[17]={0,85,121,171,241,341,483,683,965,1365,1931,2731,3862,5461,7723,10922,0};
#define PSG_TICK_STEP 16 // 3.5 MHz /2 /16 = 109375 Hz
#define PSG_KHZ_CLOCK 1750 // compare with the 2000 kHz YM3 standard
#define PSG_MAIN_EXTRABITS 0 // "QUATTROPIC" [http://randomflux.info/1bit/viewtopic.php?id=21] improves weakly with >0
#define PSG_PLAYCITY 1 // the TURBO SOUND card contains one chip...
#define PSG_PLAYCITY_XLAT // ...playing at the PSG's same intensity
#define playcity_hiclock TICKS_PER_SECOND // the TURBO SOUND clock is pegged to the main clock
#define playcity_loclock (AUDIO_PLAYBACK*16)
#define PSG_PLAYCITY_RESET (playcity_active=0) // the TURBO SOUND card uses a switch
int playcity_disabled=1,playcity_active=0; // this chip is an extension (disabled by default)
int dac_disabled=1; // Covox $FB DAC, enabled by default on almost every Pentagon 128, but missing everywhere else :-(
#include "cpcec-ay.h"
#include "cpcec-ym.h"
void ym3_write(void) { ym3_write_ay(psg_table,&psg_hard_log,PSG_KHZ_CLOCK); }
// behind the ULA and the PSG: PRINTERS ----------------------------- //
FILE *printer=NULL; int printer_p=0; BYTE printer_t[256+2]; // the buffer MUST be at least 258 bytes long!!
void printer_flush(void) { fwrite1(printer_t,printer_p,printer),printer_p=0; }
void printer_close(void) { printer_flush(),fclose(printer),printer=NULL; }
// each model has its own printer interface: the PLUS3 printer is a 8-bit data port;
int printer_8,printer_1; // the 128K printer is based on a 1-bit serial port;
void printer_line(void) // the 48K ZX Printer is 100% graphical (but we can cheat)
{
if (printer_p) // we must skip the first byte and trim useless spaces
{
while (printer_p>1&&printer_t[printer_p-1]==' ') --printer_p;
printer_t[printer_p]='\n'; // put LINE FEED after the last dot!
fwrite1(&printer_t[1],printer_p,printer); printer_p=0;
}
}
// behind the ULA: TAPE --------------------------------------------- //
int tape_enabled=0; // tape playback length, in frames
#define tape_disabled (!tape_enabled) // the machine cannot disable the tape when we enable it
#define TAPE_MAIN_TZX_STEP (35<<0) // amount of T units per packet, must be a divisor of 3500000!
#define TAPE_ZXS_MODE // required!
//#define TAPE_MSX_MODE // useless outside MSX
//#define TAPE_KANSAS_CITY // useless outside MSX AFAIK, are there any non-MSX protections using this method?
#define FASTTAPE_STABLE // overkill!
#include "cpcec-k7.h"
// 0x1FFD,0x2FFD,0x3FFD: FDC 765 ------------------------------------ //
#define DISC_PARMTR_UNIT (disc_parmtr[1]&1) // CPC hardware is limited to two drives;
#define DISC_PARMTR_UNITHEAD (disc_parmtr[1]&5) // however, it allows two-sided discs.
#define DISC_TIMER_INIT ( 4<<6) // rough approximation: cfr. CPCEC for details. "GAUNTLET 3" works fine.
#define DISC_TIMER_BYTE ( 2<<6) // rough approximation, too
#define DISC_WIRED_MODE 0 // PLUS3 FDC is unwired, like the CPC; "HATE.DSK" proves it.
#define DISC_PER_FRAME (312<<6) // = 1 MHz / 50 Hz ; compare with TICKS_PER_FRAME
#define DISC_R_P_M 300 // revolutions/minute
#define DISC_CURRENT_PC (z80_pc.w)
#define DISC_NEW_SIDES 1
#define DISC_NEW_TRACKS 40
#define DISC_NEW_SECTORS 9
BYTE DISC_NEW_SECTOR_IDS[]={0xC1,0xC6,0xC2,0xC7,0xC3,0xC8,0xC4,0xC9,0xC5};
#define DISC_NEW_SECTOR_SIZE_FDC 2
#define DISC_NEW_SECTOR_GAPS 82
#define DISC_NEW_SECTOR_FILL 0xE5
#include "cpcec-d7.h"
// CPU-HARDWARE-VIDEO-AUDIO INTERFACE =============================== //
char audio_dirty; int audio_queue=0; // used to clump audio updates together to gain speed
#define Z80_DNTR_0X3A(w,b) do{ if (w>=0X4000&&w<=0X7FFF) ula_bus3=b; }while(0) // this isn't Dandanator logic, but it operates the same way
int ula_bus,ula_bus3; // floating bus: -1 if we're beyond the bitmap, latest ATTRIB otherwise; notice that PLUS3 uses a different contended bus
int ula_count_x=0,ula_count_y=0; // horizontal+vertical sync counters
int ula_shown_x,ula_shown_y=192; // horizontal+vertical bitmap/attrib counters
int ula_snow_disabled=1,ula_snow_a; // the ULA snow flags and parameters
BYTE *ula_stormy=&mem_ram[0X14000]; // the ULA snow bank+offset, default = (5<<14)+0
int ula_count_z=0; // current T within a character (0..3)
#define ULA_GET_T() (((ula_count_y-ula_start_y)*ula_limit_x+ula_count_x)*4+ula_count_z) // current T within a frame, f.e. 0..69887 in a Spectrum 48K
void ULA_SET_T(int x) // sets the internal ULA clock: `x` is a value between 0 and 69887 (48K), 70907 (128K) or whatever the current machine is using
{
ula_count_z=x&3; x>>=2;
ula_count_x=(x%ula_limit_x);
int i=ula_count_y; ula_count_y=(x/ula_limit_x)+ula_start_y; i=ula_count_y-i;
video_pos_y+=i*=2; frame_pos_y+=i; video_target+=i*VIDEO_LENGTH_X; // adjust!
}
INLINE void video_main(int t) // render video output for `t` clock ticks; t is always nonzero!
{
int a=ula_bus,b; // `ula_bus` is required because the video loop may fail if the Z80 is overclocked
for (ula_count_z+=t;ula_count_z>=4;ula_count_z-=4)
{
if (UNLIKELY(ula_shown_x==ula_start_x)) // HBLANK? (the Pentagon timings imply this test is done in advance)
{
if (frame_pos_y>=VIDEO_OFFSET_Y&&frame_pos_y<VIDEO_OFFSET_Y+VIDEO_PIXELS_Y&&frame_pos_y==video_pos_y) video_drawscanline();
video_nextscanline(0); // scanline event!
}
if ((video_pos_y>=VIDEO_OFFSET_Y&&video_pos_y<VIDEO_OFFSET_Y+VIDEO_PIXELS_Y)&&(video_pos_x>VIDEO_OFFSET_X-16&&video_pos_x<VIDEO_OFFSET_X+VIDEO_PIXELS_X))
{
if ((ula_shown_y>=0&&ula_shown_y<192)&&(ula_shown_x>=0&&ula_shown_x<32))
{
if (ula_shown_x&1)
a=ula_screen[ula_attrib++],b=ula_screen[ula_bitmap++];
else
a=ula_stormy[ula_attrib++],b=ula_stormy[ula_bitmap++],ula_bus3=ula_screen[ula_attrib]; // the PLUS3 floating bus is special
}
else
a=-1; // border! (no matter how badly we do, the bitmap is always inside the visible screen)
if (!video_framecount)
{
static BYTE a0,b0;
if (a<0) // BORDER
{
VIDEO_UNIT p=video_clut[64];
VIDEO_NEXT=p; VIDEO_NEXT=p; VIDEO_NEXT=p; VIDEO_NEXT=p; VIDEO_NEXT=p; VIDEO_NEXT=p; VIDEO_NEXT=p; VIDEO_NEXT=p;
VIDEO_NEXT=p; VIDEO_NEXT=p; VIDEO_NEXT=p; VIDEO_NEXT=p; VIDEO_NEXT=p; VIDEO_NEXT=p; VIDEO_NEXT=p; VIDEO_NEXT=p;
video_pos_x+=16;
}
else if (ula_shown_x&1) // BITMAP, 2nd character
{
VIDEO_UNIT p,v1=ula_clut[1][a0],v0=ula_clut[0][a0];
VIDEO_NEXT=p=b0&128?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b0& 64?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b0& 32?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b0& 16?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b0& 8?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b0& 4?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b0& 2?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b0& 1?v1:v0; VIDEO_NEXT=p;
v1=ula_clut[1][a],v0=ula_clut[0][a];
VIDEO_NEXT=p=b&128?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b& 64?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b& 32?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b& 16?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b& 8?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b& 4?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b& 2?v1:v0; VIDEO_NEXT=p;
VIDEO_NEXT=p=b& 1?v1:v0; VIDEO_NEXT=p;
video_pos_x+=32;
}
else // BITMAP, 1st character
a0=a,b0=b;
}
}
else
video_pos_x+=16,video_target+=16;
if (UNLIKELY(++ula_shown_x==ula_limit_x)) // end of bitmap?
{
ula_shown_x=0; ++ula_shown_y;
if (ula_shown_y>=0&&ula_shown_y<192)
{
ula_bitmap=((ula_shown_y&192)<<5)+((ula_shown_y&56)<<2)+((ula_shown_y&7)<<8);
ula_attrib=0x1800+((ula_shown_y&248)<<2);
if (!ula_snow_a)
ula_stormy=ula_screen; // no snow, both VRAM blocks are one and the same
else if (type_id)
{
// https://spectrumcomputing.co.uk/forums/viewtopic.php?p=114736#p114736 (Weiv);
// Upper Page: | Screen 0 (p5) | Screen 1 (p7)
// 1/3/5/7 | 1/1/5/5 | 3/3/7/7
// see also the videos by Iceknight featuring snow in the 128K versions of "The Ninja Warriors"
ula_stormy=&mem_ram[(z80_ir.b.l&ula_snow_a)+0X04000];
if (ula_v2&4) ula_stormy+=0X10000;
if (ula_v2&8) ula_stormy+=0X08000;
}
else
ula_stormy=&ula_screen[z80_ir.b.l&ula_snow_a]; // 48K snow falls within the same block
}
}
if (UNLIKELY(++ula_count_x>=ula_limit_x)) // end of scanline?
{
ula_count_x=0;
// for lack of a more precise timer, the scanline is used to refresh the ULA's unstable input bit 6:
// - Issue-2 systems (the first batch of 48K) make the bit depend on ULA output bits 3 and 4.
// - Issue-3 systems (later batches of 48K) make the bit depend on ULA output bit 4.
// - Whatever the issue ID, 48K doesn't update the unstable bit at once; it takes a while.
// - 128K and later systems always mask the bit out.
ula_v1_cache=type_id?64:ula_v1&ula_v1_issue?0:64;
// "Abu Simbel Profanation" (menu doesn't obey keys; in-game is stuck jumping to the right) and "Rasputin" (menu fails to play the music) rely on this on 48K.
if (++ula_count_y>=ula_limit_y) // end of frame?
{
if (!(video_pos_z&15)) // FLASH update?
if (!(ulaplus_table[64]&ulaplus_enabled))
ula_clut_flash(); // ULAPLUS lacks FLASH!
ula_shown_x=ula_fix_chr; // renew frame vars
ula_shown_y=(ula_count_y=ula_start_y)-64; // lines of BORDER above the bitmap
video_newscanlines(video_pos_x,(ula_start_y+(ula_fix_chr>ula_start_x))*2); // end of frame!
z80_irq=1; // snap_load() must be able to reset `z80_irq` to avoid nasty surprises, f.e. COSANOSA.SNA
}
}
}
ula_bus=a; // -1 in border, 0..255 (ATTRIB) in bitmap; cfr. z80_recv_ula()
if (ula_count_x>=ula_irq_0_x) z80_irq=0; // "TIMING TESTS 128K" relies on LATE TIMINGS (-1..31 T), but we stick to EARLY TIMINGS (0..32 T): they're stable!
}
int dac_level=0,tape_loud=1,tape_song=0;
#define dac_level_byte(x) dac_level=(x)<<7
#define dac_level_zero() (dac_level=dac_level*3/4) // soften signal as time passes
void audio_main(int t) // render audio output for `t` clock ticks; t is always nonzero!
{ psg_main(t,((tape_status&tape_loud)<<12)+((ula_v1&16)<<10)+((ula_v1&8)<<8)+dac_level); } // ULA MIXER: tape input (BIT 2) + beeper (BIT 4) + tape output (BIT 3; "Manic Miner" song, "Cobra's Arc" speech)
// autorun runtime logic -------------------------------------------- //
BYTE snap_done; // avoid accidents with ^F2, see all_reset()
char autorun_path[STRMAX]="",autorun_line[STRMAX]; int autorun_mode=0,autorun_t=0;
BYTE autorun_kbd[16]; // automatic keypresses
#define autorun_kbd_set(k) (autorun_kbd[k>>3]|=1<<(k&7))
#define autorun_kbd_res(k) (autorun_kbd[k>>3]&=~(1<<(k&7)))
int autorun_kbd_bit(int k) // combined autorun+keyboard+joystick bits
{
if (autorun_mode)
return autorun_kbd[k];
#define kbd_bit_gunstick(button,sensor) (session_maus_z?button+((video_litegun&0x00C000)?sensor:0):0) // GUNSTICK detects bright pixels
if (k==8&&litegun) return kbd_bit_gunstick(16,4); // GUNSTICK on KEMPSTON
if (k==4&&litegun) return kbd_bit_gunstick(1,4); // GUNSTICK on SINCLAIR 1 ("SOLO")
//if (k==3&&litegun) return kbd_bit_gunstick(16,4); // GUNSTICK on SINCLAIR 2
switch (k) // handle composite keys
{
case 0: // CAPS SHIFT is [0]&1
return ((kbd_bit[9]|kbd_bit[10]|kbd_bit[11])?1:0)|kbd_bit[12]|kbd_bit[0]|joy_bit[0];
case 3:
return kbd_bit[ 9]|kbd_bit[13]|kbd_bit[3]|joy_bit[3];
case 4:
return kbd_bit[10]|kbd_bit[14]|kbd_bit[4]|joy_bit[4];
case 7: // SYMBOL SHIFT is [7]&2
return ((kbd_bit[12]|kbd_bit[13]|kbd_bit[14]|kbd_bit[15])?2:0)|kbd_bit[11]|kbd_bit[15]|kbd_bit[7]|joy_bit[7];
}
return kbd_bit[k]|joy_bit[k];
}
INLINE void autorun_next(void) // handle AUTORUN
{
switch (autorun_mode)
{
case 1: // 48K and menu-less 128K: type 'LOAD ""' and press RETURN
case 2: // BETA128: type 'RANDOMIZE USR 15619: REM: RUN"filename"' and press RETURN
if (diskette_mem[0])
{
BYTE *t=NULL,s[]={249,192,'1','5','6','1','9',58,234,58,247,34,'b','o','o','t',32,32,32,32,34,13,128};
MEMSAVE(&POKE(0X5CCC),s); POKE(0X5C61)=0XCC+sizeof(s);
for (int i=0;i<0x0800;i+=16)
if (diskette_mem[0][i+8]=='B') // found a BASIC file?
{
if (!memcmp(&diskette_mem[0][i],&s[12],8))
{ t=NULL; break; } // found the autoboot file!
if (diskette_mem[0][i]&&!t)
t=&diskette_mem[0][i]; // remember this BASIC file, but keep looking for autoboot files
}
if (t) memcpy(&POKE(0X5CD8),t,8); // overwrite the filename
}
else
{
BYTE s[]={239,34,34,13,128};
MEMSAVE(&POKE(0X5CCC),s); POKE(0X5C61)=0XCC+sizeof(s);
}
// no `break`!
case 3: // menu-ready 128K: hit RETURN
autorun_kbd_set(0x30); // PRESS RETURN
autorun_mode=4; autorun_t=3;
break;
case 4: // release RETURN
autorun_kbd_res(0x30); // RELEASE RETURN
disc_disabled&=1,autorun_mode=0; // end of AUTORUN
break;
}
}
// Z80-hardware procedures ------------------------------------------ //
// the Spectrum hands the Z80 a mainly empty data bus value
#define Z80_IRQ_BUS 255
// the Spectrum doesn't obey the Z80 IRQ ACK signal
#define Z80_IRQ_ACK ((void)0)
void z80_sync(int t) // the Z80 asks the hardware/video/audio to catch up
{
static int r=0; main_t+=t;
if (type_id==3) //if (!disc_disabled) // redundant, in most cases disc_main() does nothing
disc_main(t);
if (tape_enabled&&tape)
audio_dirty|=tape_loud,tape_main(t); // echo the tape signal thru sound!
t=(r+=t)>>multi_t; r&=multi_u; // calculate base value of `t` and keep remainder
if (t>0)
{
if (audio_queue+=t,audio_dirty&&audio_required)
audio_main(audio_queue),audio_dirty=audio_queue=0;
video_main(t);
}
}
// the emulator includes two methods to speed tapes up:
// * tape_skipload controls the physical method (disabling realtime, raising frameskip, etc. during tape operation)
// * tape_fastload controls the logical method (detecting tape loaders and feeding them data straight from the tape)
char tape_skipload=1,tape_fastload=0; int tape_skipping=0;
void z80_send(WORD p,BYTE b) // the Z80 sends a byte to a hardware port
{
if (!(~p&31)) // BETA128 interface
{
if (trdos_mapped)
if (p&128) // 0x??FF: SYSTEM
{
if (4&b&~diskette_system) diskette_send_busy(0); // setting bit 2 resets the drive status (!?)
diskette_system=b; // bits 0 and 1 select the drive, bit 4 selects the side
diskette_side=!(b&16); diskette_drive=b&3;
}
else if (p&64) if (p&32) // 0x??7F: DATA
diskette_send_data(b);
else // 0x??5F: SECTOR
diskette_send_sector(b);
else if (p&32) // 0x??3F: TRACK
diskette_send_track(b);
else // 0x??1F: COMMAND
{
diskette_motor=1; // *!* motor is always on!?
diskette_send_command(b);
}
// else ... // is the KEMPSTON port writeable!?
return; // the following conditions cannot be true if we got here
}
if (!(p&1)) // 0x??FE, ULA 48K
{
ula_v1_send(b),tape_output=tape_type<0&&(b&8); // tape record signal
if (ula_bus*ula_pentagon<0&&frame_pos_y>=VIDEO_OFFSET_Y&&frame_pos_y<VIDEO_OFFSET_Y+VIDEO_PIXELS_Y
&&video_pos_x>VIDEO_OFFSET_X&&video_pos_x<VIDEO_OFFSET_X+VIDEO_PIXELS_X+16) // special case: Pentagon border?
switch (ula_count_z&3) // editing the bitmap from here is a dirty kludge, but the performance hit is lower
{
case 0: video_target[-12]=video_target[-11]=video_target[-10]=video_target[- 9]=video_clut[64]; // no `break`!
case 1: video_target[- 8]=video_target[- 7]=video_target[- 6]=video_target[- 5]=video_clut[64]; // no `break`!
case 2: video_target[- 4]=video_target[- 3]=video_target[- 2]=video_target[- 1]=video_clut[64]; // no `break`!
}
if (z80_pc.w==0X11D0&&equalsmmmm(&mmu_rom[0][0X11D0],0X3E3FED47)&&power_boosted) // 48K: power-up boost
{
memset(&mmu_ram[1][1<<14],0,1<<14),memset(&mmu_ram[2][2<<14],0,1<<14),memset(&mmu_ram[3][3<<14],0,1<<14);
z80_pc.w=0X11EF; z80_ir.b.h=0X3F; z80_hl.w=(ula_sixteen&&!type_id)?0X8000:0X0000; // skip test and fill registers
}
}
if (!(p&2)) // 0x??FD, MULTIPLE DEVICES
{
if (type_id&&!(ula_v2&32)) // 48K mode forbids further changes!
{
if ((type_id!=3)?!(p&0x8000):((p&0xC000)==0x4000)) // 0x7FFD: ULA 128K
{
if (b==7&&z80_pc.w==(type_id==3?0x0119:0x00D1)) // warm reset?
if (snap_done=0,power_boosted&&mmu_rom[0]==(type_id==3?mem_rom:&mem_rom[0X8000])) // 128K 2/2: power-up boost
MEMZERO(mem_ram),z80_pc.w=type_id==3?0X0129:0X00ED,b=0;
ula_v2_send(b);
session_dirty|=b&32; // show memory mode change on window
}
if (type_id==3) // PLUS3 only!