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#ifndef MONGOOSE_H
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#define MONGOOSE_H
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- #define MG_VERSION " 7.15 "
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+ #define MG_VERSION " 7.16 "
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#ifdef __cplusplus
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extern " C" {
@@ -3147,22 +3147,14 @@ struct mg_tcpip_driver_tms570_data {
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- #if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_XMC ) && MG_ENABLE_DRIVER_XMC
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+ #if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_W5500 ) && MG_ENABLE_DRIVER_W5500
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- struct mg_tcpip_driver_xmc_data {
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- // 13.2.8.1 Station Management Functions
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- // MDC clock divider (). MDC clock is derived from ETH MAC clock
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- // It must not exceed 2.5MHz
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- // ETH Clock range DIVIDER mdc_cr VALUE
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- // --------------------------------------------
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- // -1 <-- tell driver to guess the value
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- // 60-100 MHz ETH Clock/42 0
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- // 100-150 MHz ETH Clock/62 1
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- // 20-35 MHz ETH Clock/16 2
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- // 35-60 MHz ETH Clock/26 3
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- // 150-250 MHz ETH Clock/102 4
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- // 250-300 MHz ETH Clock/124 5
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- // 110, 111 Reserved
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+ #endif
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+
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+
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+ #if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_XMC7) && MG_ENABLE_DRIVER_XMC7
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+
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+ struct mg_tcpip_driver_xmc7_data {
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int mdc_cr; // Valid values: -1, 0, 1, 2, 3, 4, 5
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uint8_t phy_addr;
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};
@@ -3172,31 +3164,45 @@ struct mg_tcpip_driver_xmc_data {
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#endif
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#ifndef MG_DRIVER_MDC_CR
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- #define MG_DRIVER_MDC_CR 4
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+ #define MG_DRIVER_MDC_CR 3
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#endif
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#define MG_TCPIP_DRIVER_INIT (mgr ) \
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do { \
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- static struct mg_tcpip_driver_xmc_data driver_data_; \
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+ static struct mg_tcpip_driver_xmc7_data driver_data_; \
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static struct mg_tcpip_if mif_; \
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driver_data_.mdc_cr = MG_DRIVER_MDC_CR; \
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driver_data_.phy_addr = MG_TCPIP_PHY_ADDR; \
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mif_.ip = MG_TCPIP_IP; \
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mif_.mask = MG_TCPIP_MASK; \
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mif_.gw = MG_TCPIP_GW; \
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- mif_.driver = &mg_tcpip_driver_xmc ; \
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+ mif_.driver = &mg_tcpip_driver_xmc7 ; \
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mif_.driver_data = &driver_data_; \
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MG_SET_MAC_ADDRESS (mif_.mac ); \
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mg_tcpip_init (mgr, &mif_); \
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- MG_INFO ((" Driver: xmc , MAC: %M" , mg_print_mac, mif_.mac )); \
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+ MG_INFO ((" Driver: xmc7 , MAC: %M" , mg_print_mac, mif_.mac )); \
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} while (0 )
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#endif
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- #if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_XMC7) && MG_ENABLE_DRIVER_XMC7
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- struct mg_tcpip_driver_xmc7_data {
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+ #if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_XMC) && MG_ENABLE_DRIVER_XMC
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+
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+ struct mg_tcpip_driver_xmc_data {
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+ // 13.2.8.1 Station Management Functions
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+ // MDC clock divider (). MDC clock is derived from ETH MAC clock
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+ // It must not exceed 2.5MHz
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+ // ETH Clock range DIVIDER mdc_cr VALUE
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+ // --------------------------------------------
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+ // -1 <-- tell driver to guess the value
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+ // 60-100 MHz ETH Clock/42 0
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+ // 100-150 MHz ETH Clock/62 1
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+ // 20-35 MHz ETH Clock/16 2
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+ // 35-60 MHz ETH Clock/26 3
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+ // 150-250 MHz ETH Clock/102 4
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+ // 250-300 MHz ETH Clock/124 5
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+ // 110, 111 Reserved
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int mdc_cr; // Valid values: -1, 0, 1, 2, 3, 4, 5
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uint8_t phy_addr;
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};
@@ -3206,28 +3212,27 @@ struct mg_tcpip_driver_xmc7_data {
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#endif
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#ifndef MG_DRIVER_MDC_CR
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- #define MG_DRIVER_MDC_CR 3
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+ #define MG_DRIVER_MDC_CR 4
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#endif
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#define MG_TCPIP_DRIVER_INIT (mgr ) \
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do { \
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- static struct mg_tcpip_driver_xmc7_data driver_data_; \
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+ static struct mg_tcpip_driver_xmc_data driver_data_; \
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static struct mg_tcpip_if mif_; \
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driver_data_.mdc_cr = MG_DRIVER_MDC_CR; \
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driver_data_.phy_addr = MG_TCPIP_PHY_ADDR; \
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mif_.ip = MG_TCPIP_IP; \
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mif_.mask = MG_TCPIP_MASK; \
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mif_.gw = MG_TCPIP_GW; \
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- mif_.driver = &mg_tcpip_driver_xmc7 ; \
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+ mif_.driver = &mg_tcpip_driver_xmc ; \
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mif_.driver_data = &driver_data_; \
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MG_SET_MAC_ADDRESS (mif_.mac ); \
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mg_tcpip_init (mgr, &mif_); \
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- MG_INFO ((" Driver: xmc7 , MAC: %M" , mg_print_mac, mif_.mac )); \
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+ MG_INFO ((" Driver: xmc , MAC: %M" , mg_print_mac, mif_.mac )); \
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} while (0 )
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#endif
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-
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#ifdef __cplusplus
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}
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#endif
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