@@ -32,7 +32,6 @@ localparam bit unsigned [127:0] Gain_max = (CIC_R * CIC_M) ** CIC_N;
32
32
localparam B_max = clog2_l (Gain_max) + INP_DW ;
33
33
localparam truncated_bits = B_max - OUT_DW ;
34
34
localparam dw_out = B_max - get_prune_bits (2 * CIC_N );
35
- localparam bit unsigned [127 : 0 ] base2 = 2 ;
36
35
/* ********************************************************************************************/
37
36
38
37
function integer get_prune_bits (input integer i);
@@ -52,7 +51,7 @@ localparam SCALING_FACTOR_WIDTH = clog2_l(clog2_l(CIC_R)*CIC_N)+1;
52
51
localparam SCALING_FACTOR_SHIFT = 5 * CIC_N ;
53
52
localparam EXACT_SCALING_FACTOR_WIDTH = clog2_l (clog2_l (CIC_R )* CIC_N )+ SCALING_FACTOR_SHIFT + 1 ;
54
53
reg unsigned [SCALING_FACTOR_WIDTH - 1 : 0 ] current_scaling_factor = 0 ;
55
- reg unsigned [EXACT_SCALING_FACTOR_WIDTH - 1 : 0 ] current_exact_scaling_factor = ((base2 ** clog2_l (Gain_max))<< SCALING_FACTOR_SHIFT )/ Gain_max;
54
+ reg unsigned [EXACT_SCALING_FACTOR_WIDTH - 1 : 0 ] current_exact_scaling_factor = ((( 128 '( 2 )) ** clog2_l (Gain_max))<< SCALING_FACTOR_SHIFT )/ Gain_max;
56
55
57
56
if (VARIABLE_RATE ) begin
58
57
(* ram_style = " distributed" * ) reg unsigned [SCALING_FACTOR_WIDTH - 1 : 0 ] LUT [1 : CIC_R ];
@@ -82,22 +81,21 @@ if (VARIABLE_RATE) begin
82
81
initial begin
83
82
// this LUT calculation in verilog is limited, it works for R=4095, N=6, M=1
84
83
// if larger values are needed, do LUT calculation outside verilog, ie python
85
- bit unsigned [127 : 0 ] k;
86
- localparam bit unsigned [127 : 0 ] R_extended = CIC_R ;
87
84
reg unsigned [127 : 0 ] gain_diff;
88
85
reg unsigned [31 : 0 ] pre_shift;
89
86
reg unsigned [EXACT_SCALING_FACTOR_WIDTH - 1 : 0 ] post_mult;
87
+ integer k;
90
88
reg unsigned [clog2_l (CIC_R ): 0 ] small_k;
91
89
for (k= 1 ;k<= CIC_R ;k= k+ 1 ) begin
92
90
small_k = k[clog2_l (CIC_R ): 0 ];
93
- gain_diff = (((R_extended << (SCALING_FACTOR_SHIFT / CIC_N ))/ k)** CIC_N );
91
+ gain_diff = (((128 '( CIC_R ) << (SCALING_FACTOR_SHIFT / CIC_N ))/ k)** CIC_N );
94
92
pre_shift = flog2_l (gain_diff>> (SCALING_FACTOR_SHIFT ));
95
93
LUT [small_k] = pre_shift[SCALING_FACTOR_WIDTH - 1 : 0 ];
96
94
if (EXACT_SCALING ) begin
97
95
post_mult = (gain_diff >> pre_shift);
98
96
LUT2 [small_k] = post_mult[EXACT_SCALING_FACTOR_WIDTH - 1 : 0 ];
99
97
end
100
- $display (" scaling_factor[%d ] = %d factor rounded = %d factor exact = %d mult = %d " , k, LUT [small_k], base2 ** pre_shift, gain_diff>> SCALING_FACTOR_SHIFT , LUT2 [small_k]);
98
+ $display (" scaling_factor[%d ] = %d factor rounded = %d factor exact = %d mult = %d " , k, LUT [small_k], 128 '( 2 ) ** pre_shift, gain_diff>> SCALING_FACTOR_SHIFT , LUT2 [small_k]);
101
99
end
102
100
end
103
101
end
@@ -246,18 +244,18 @@ reg [CIC_N : 0] comb_inp_str_d;
246
244
generate
247
245
248
246
for (j = 0 ; j < CIC_N ; j = j + 1 ) begin : comb_stage
249
- localparam B_m_j_m1 = get_prune_bits (CIC_N + j);
250
- localparam B_m_j = get_prune_bits (CIC_N + j + 1 );
251
- localparam idw_cur = B_max - B_m_j_m1;
252
- localparam odw_cur = B_max - B_m_j;
247
+ localparam B_m_j_m1 = get_prune_bits (CIC_N + j);
248
+ localparam B_m_j = get_prune_bits (CIC_N + j + 1 );
249
+ localparam idw_cur = B_max - B_m_j_m1;
250
+ localparam odw_cur = B_max - B_m_j;
253
251
wire signed [idw_cur - 1 : 0 ] comb_in;
254
252
wire signed [idw_cur - 1 : 0 ] comb_inst_out;
255
253
wire signed [odw_cur - 1 : 0 ] comb_out;
256
254
if (j == 0 ) assign comb_in = ds_out_samp_data;
257
255
else assign comb_in = comb_stage[j - 1 ].comb_out;
258
256
assign comb_out = comb_inst_out[idw_cur - 1 - : odw_cur]; // throw away some LSBs
259
257
260
- wire comb_in_str;
258
+ wire comb_in_str;
261
259
if (j == 0 ) assign comb_in_str = ds_out_samp_str;
262
260
else assign comb_in_str = comb_stage[j - 1 ].comb_dv;
263
261
@@ -283,13 +281,13 @@ generate
283
281
end
284
282
endgenerate
285
283
/* ********************************************************************************************/
286
- reg signed [OUT_DW - 1 + SCALING_FACTOR_SHIFT : 0 ] comb_out_samp_data_reg;
287
- reg comb_out_samp_str_reg;
288
- reg unsigned [EXACT_SCALING_FACTOR_WIDTH - 1 : 0 ] current_exact_scaling_factor_reg;
284
+ reg signed [OUT_DW - 1 + SCALING_FACTOR_SHIFT : 0 ] comb_out_samp_data_reg;
285
+ reg comb_out_samp_str_reg;
286
+ reg unsigned [EXACT_SCALING_FACTOR_WIDTH - 1 : 0 ] current_exact_scaling_factor_reg;
289
287
290
288
always @ (posedge clk)
291
289
begin
292
- if (~ reset_n) begin
290
+ if (~ reset_n) begin
293
291
comb_out_samp_data_reg <= '0 ;
294
292
comb_out_samp_str_reg <= '0 ;
295
293
end
0 commit comments