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请教下 #3

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wjf19911004 opened this issue Apr 21, 2023 · 5 comments
Open

请教下 #3

wjf19911004 opened this issue Apr 21, 2023 · 5 comments

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@wjf19911004
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你好,请问这个和zynqmp_cam_isp_demo差别仅仅是平台不同吗? ISP算法是一样的吧?
另外请教下zynqmp这个项目可以完美移植到ZCU102(XCZU9EG)上吗?
谢谢~

@orangezishuai
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大佬,你还有其他类似的verilog 实现 isp pipeline的资料吗?

@Benisonpin
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你好
可以拿到您手上目前含有ISP PIPELINE FPGA的板子來試試嗎?
Ben

@bxinquan
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你好,请问这个和zynqmp_cam_isp_demo差别仅仅是平台不同吗? ISP算法是一样的吧? 另外请教下zynqmp这个项目可以完美移植到ZCU102(XCZU9EG)上吗? 谢谢~

支持了mipi-rx 有些模块做了bug fix等,支持了linux,模块算法什么的没啥区别

@Benisonpin
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算法幾乎一樣,但平台目前是lattice FPGA上

@sankysaber
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想问问我在vitis上跑C的时候为啥一只报错,一直Error: unknown pseudo-op: `.ent',profole_mcount_mb.s这个文件一直报错

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5 participants