-
Notifications
You must be signed in to change notification settings - Fork 16
/
Copy pathmotor_module.sch
819 lines (819 loc) · 15 KB
/
motor_module.sch
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
v 20130925 2
C 40000 40000 0 0 0 title-B.sym
C 50600 41600 1 0 0 motor_driver.sym
{
T 51595 43700 5 10 1 1 0 0 1
refdes=Y
T 50995 41700 5 10 1 1 0 0 1
source=motor_driver.sch
}
C 54600 44400 1 0 0 motor_driver.sym
{
T 55695 46500 5 10 1 1 0 0 1
refdes=Z
T 54995 44500 5 10 1 1 0 0 1
source=motor_driver.sch
}
C 54600 41600 1 0 0 motor_driver.sym
{
T 55695 43700 5 10 1 1 0 0 1
refdes=A
T 54995 41700 5 10 1 1 0 0 1
source=motor_driver.sch
}
T 50000 40700 9 10 1 0 0 0 3
Motor Modules
Copyright (c) 2016-2021, Buildbotics LLC
Licensed under CERN-OHL-S v2
T 53900 40100 9 10 1 0 0 0 1
Doug & Joe Coffland
T 53800 40400 9 10 1 0 0 0 1
15.0
C 53800 43700 1 0 0 input.sym
{
T 54050 43700 5 10 0 0 0 6 1
device=OUTPUT
T 54050 43700 5 10 1 1 0 6 1
net=cs_a:1
}
C 53800 43500 1 0 0 input.sym
{
T 54050 43500 5 10 0 0 0 6 1
device=INPUT
T 54050 43500 5 10 1 1 0 6 1
net=drv_clk:1
}
C 53800 43300 1 0 0 input.sym
{
T 54050 43300 5 10 0 0 0 6 1
device=INPUT
T 54050 43300 5 10 1 1 0 6 1
net=drv_mosi:1
}
C 54600 43100 1 0 1 output.sym
{
T 54050 43100 5 10 0 0 0 6 1
device=OUTPUT
T 54050 43100 5 10 1 1 0 6 1
net=drv_miso:1
}
C 53800 42700 1 0 0 input.sym
{
T 54050 42700 5 10 0 0 0 6 1
device=OUTPUT
T 54050 42700 5 10 1 1 0 6 1
net=drv_dir_a:1
}
C 53800 42500 1 0 0 input.sym
{
T 54050 42500 5 10 0 0 0 6 1
device=OUTPUT
T 54050 42500 5 10 1 1 0 6 1
net=drv_step_a:1
}
C 49800 46500 1 0 0 input.sym
{
T 50050 46500 5 10 0 0 0 6 1
device=OUTPUT
T 50050 46500 5 10 1 1 0 6 1
net=cs_x:1
}
C 49800 46300 1 0 0 input.sym
{
T 50050 46300 5 10 0 0 0 6 1
device=INPUT
T 50050 46300 5 10 1 1 0 6 1
net=drv_clk:1
}
C 49800 46100 1 0 0 input.sym
{
T 50050 46100 5 10 0 0 0 6 1
device=INPUT
T 50050 46100 5 10 1 1 0 6 1
net=drv_mosi:1
}
C 50600 45900 1 0 1 output.sym
{
T 50050 45900 5 10 0 0 0 6 1
device=OUTPUT
T 50050 45900 5 10 1 1 0 6 1
net=drv_miso:1
}
C 49800 45500 1 0 0 input.sym
{
T 50050 45500 5 10 0 0 0 6 1
device=OUTPUT
T 50050 45500 5 10 1 1 0 6 1
net=drv_dir_x:1
}
C 49800 45700 1 0 0 input.sym
{
T 50050 45700 5 10 0 0 0 6 1
device=OUTPUT
T 50050 45700 5 10 1 1 0 6 1
net=drv_enable_5V:1
}
C 49800 45300 1 0 0 input.sym
{
T 50050 45300 5 10 0 0 0 6 1
device=OUTPUT
T 50050 45300 5 10 1 1 0 6 1
net=drv_step_x:1
}
C 50600 44900 1 0 1 output.sym
{
T 50050 44900 5 10 0 0 0 6 1
device=INPUT
T 50050 44900 5 10 1 1 0 6 1
net=drv_fault:1
}
C 49800 43700 1 0 0 input.sym
{
T 50050 43700 5 10 0 0 0 6 1
device=OUTPUT
T 50050 43700 5 10 1 1 0 6 1
net=cs_y:1
}
C 49800 43500 1 0 0 input.sym
{
T 50050 43500 5 10 0 0 0 6 1
device=INPUT
T 50050 43500 5 10 1 1 0 6 1
net=drv_clk:1
}
C 49800 43300 1 0 0 input.sym
{
T 50050 43300 5 10 0 0 0 6 1
device=INPUT
T 50050 43300 5 10 1 1 0 6 1
net=drv_mosi:1
}
C 50600 43100 1 0 1 output.sym
{
T 50050 43100 5 10 0 0 0 6 1
device=OUTPUT
T 50050 43100 5 10 1 1 0 6 1
net=drv_miso:1
}
C 49800 42700 1 0 0 input.sym
{
T 50050 42700 5 10 0 0 0 6 1
device=OUTPUT
T 50050 42700 5 10 1 1 0 6 1
net=drv_dir_y:1
}
C 49800 42500 1 0 0 input.sym
{
T 50050 42500 5 10 0 0 0 6 1
device=OUTPUT
T 50050 42500 5 10 1 1 0 6 1
net=drv_step_y:1
}
C 53800 46500 1 0 0 input.sym
{
T 54050 46500 5 10 0 0 0 6 1
device=OUTPUT
T 54050 46500 5 10 1 1 0 6 1
net=cs_z:1
}
C 53800 46300 1 0 0 input.sym
{
T 54050 46300 5 10 0 0 0 6 1
device=INPUT
T 54050 46300 5 10 1 1 0 6 1
net=drv_clk:1
}
C 53800 46100 1 0 0 input.sym
{
T 54050 46100 5 10 0 0 0 6 1
device=INPUT
T 54050 46100 5 10 1 1 0 6 1
net=drv_mosi:1
}
C 54600 45900 1 0 1 output.sym
{
T 54050 45900 5 10 0 0 0 6 1
device=OUTPUT
T 54050 45900 5 10 1 1 0 6 1
net=drv_miso:1
}
C 53800 45500 1 0 0 input.sym
{
T 54050 45500 5 10 0 0 0 6 1
device=OUTPUT
T 54050 45500 5 10 1 1 0 6 1
net=drv_dir_z:1
}
C 53800 45300 1 0 0 input.sym
{
T 54050 45300 5 10 0 0 0 6 1
device=OUTPUT
T 54050 45300 5 10 1 1 0 6 1
net=drv_step_z:1
}
C 50600 45100 1 0 1 output.sym
{
T 50050 45100 5 10 0 0 0 6 1
device=INPUT
T 50050 45100 5 10 1 1 0 6 1
net=stall_x:1
}
C 49800 42900 1 0 0 input.sym
{
T 50050 42900 5 10 0 0 0 6 1
device=OUTPUT
T 50050 42900 5 10 1 1 0 6 1
net=drv_enable_5V:1
}
C 53800 42900 1 0 0 input.sym
{
T 54050 42900 5 10 0 0 0 6 1
device=OUTPUT
T 54050 42900 5 10 1 1 0 6 1
net=drv_enable_5V:1
}
C 53800 45700 1 0 0 input.sym
{
T 54050 45700 5 10 0 0 0 6 1
device=OUTPUT
T 54050 45700 5 10 1 1 0 6 1
net=drv_enable_5V:1
}
C 50600 42100 1 0 1 output.sym
{
T 50050 42100 5 10 0 0 0 6 1
device=INPUT
T 50050 42100 5 10 1 1 0 6 1
net=drv_fault:1
}
C 50600 42300 1 0 1 output.sym
{
T 50050 42300 5 10 0 0 0 6 1
device=INPUT
T 50050 42300 5 10 1 1 0 6 1
net=stall_y:1
}
C 54600 44900 1 0 1 output.sym
{
T 54050 44900 5 10 0 0 0 6 1
device=INPUT
T 54050 44900 5 10 1 1 0 6 1
net=drv_fault:1
}
C 54600 45100 1 0 1 output.sym
{
T 54050 45100 5 10 0 0 0 6 1
device=INPUT
T 54050 45100 5 10 1 1 0 6 1
net=stall_z:1
}
C 54600 42100 1 0 1 output.sym
{
T 54050 42100 5 10 0 0 0 6 1
device=INPUT
T 54050 42100 5 10 1 1 0 6 1
net=drv_fault:1
}
C 54600 42300 1 0 1 output.sym
{
T 54050 42300 5 10 0 0 0 6 1
device=INPUT
T 54050 42300 5 10 1 1 0 6 1
net=stall_a:1
}
C 47300 43100 1 0 0 connector6-2.sym
{
T 47600 45150 5 10 0 0 0 0 1
device=CONNECTOR_6
T 47600 45350 5 10 0 0 0 0 1
footprint=JUMPER6
T 47300 43100 5 10 0 0 0 0 1
description=Unpopulated test point, label on board
T 47300 43100 5 10 0 0 0 0 1
documentation=Do not popluate
T 47300 43100 5 10 0 0 0 0 1
value=N/A
T 47300 43100 5 10 0 0 0 0 1
model=N/A
T 47900 46000 5 10 1 1 0 6 1
refdes=J1
}
C 46500 44600 1 0 0 input.sym
{
T 46750 44600 5 10 0 0 0 6 1
device=INPUT
T 46750 44600 5 10 1 1 0 6 1
net=motor_clk:1
}
C 47300 43800 1 0 1 output.sym
{
T 46750 43800 5 10 0 0 0 6 1
device=OUTPUT
T 46750 43800 5 10 1 1 0 6 1
net=motor_miso:1
}
C 46500 44200 1 0 0 input.sym
{
T 46750 44200 5 10 0 0 0 6 1
device=INPUT
T 46750 44200 5 10 1 1 0 6 1
net=motor_mosi:1
}
C 47000 43600 1 270 0 gnd.sym
C 46500 45000 1 0 0 input.sym
{
T 46750 45000 5 10 0 0 0 6 1
device=INPUT
T 46750 45000 5 10 1 1 0 6 1
net=motor_fault:1
}
C 46500 45400 1 0 0 input.sym
{
T 46750 45400 5 10 0 0 0 6 1
device=INPUT
T 46750 45400 5 10 1 1 0 6 1
net=motor_enable:1
}
C 50600 44400 1 0 0 motor_driver.sym
{
T 51495 46600 5 10 1 1 0 0 1
refdes=X
T 50995 44500 5 10 1 1 0 0 1
source=motor_driver.sch
}
C 41000 50100 1 0 0 input.sym
{
T 41250 50100 5 10 0 0 0 6 1
device=OUTPUT
T 41250 50100 5 10 1 1 0 6 1
net=step_x:1
}
C 42600 50100 1 0 0 output.sym
{
T 43150 50100 5 10 0 0 0 0 1
device=OUTPUT
T 43150 50100 5 10 1 1 0 0 1
net=drv_step_x:1
}
C 41000 49300 1 0 0 input.sym
{
T 41250 49300 5 10 0 0 0 6 1
device=OUTPUT
T 41250 49300 5 10 1 1 0 6 1
net=dir_x:1
}
C 42600 49300 1 0 0 output.sym
{
T 43150 49300 5 10 0 0 0 0 1
device=OUTPUT
T 43150 49300 5 10 1 1 0 0 1
net=drv_dir_x:1
}
N 42200 41300 42000 41300 4
N 42600 41300 43000 41300 4
N 42800 41300 42800 41000 4
C 41700 41100 1 270 0 gnd.sym
N 42200 41000 42000 41000 4
N 42600 41000 42800 41000 4
N 42200 41900 42000 41900 4
N 42600 41900 43000 41900 4
N 42800 41900 42800 41600 4
C 41700 41700 1 270 0 gnd.sym
N 42200 41600 42000 41600 4
N 42600 41600 42800 41600 4
N 42200 42500 42000 42500 4
N 42600 42500 43000 42500 4
N 42800 42500 42800 42800 4
N 42200 42800 42000 42800 4
N 42600 42800 42800 42800 4
C 42000 42500 1 90 0 3.3V_motor.sym
{
T 41300 42600 5 10 0 0 90 0 1
device=none
}
N 42200 43300 42000 43300 4
N 42600 43300 43000 43300 4
N 42800 43300 42800 43600 4
N 42200 43600 42000 43600 4
N 42600 43600 42800 43600 4
C 42000 43300 1 90 0 3.3V_motor.sym
{
T 41300 43400 5 10 0 0 90 0 1
device=none
}
C 41200 41200 1 0 0 input.sym
{
T 41450 41200 5 10 0 0 0 6 1
device=INPUT
T 41450 41200 5 10 1 1 0 6 1
net=motor_clk:1
}
C 43000 41200 1 0 0 output.sym
{
T 43550 41200 5 10 0 0 0 0 1
device=OUTPUT
T 43550 41200 5 10 1 1 0 0 1
net=drv_clk:1
}
C 43000 41800 1 0 0 output.sym
{
T 43550 41800 5 10 0 0 0 0 1
device=OUTPUT
T 43550 41800 5 10 1 1 0 0 1
net=drv_mosi:1
}
C 41200 41800 1 0 0 input.sym
{
T 41450 41800 5 10 0 0 0 6 1
device=INPUT
T 41450 41800 5 10 1 1 0 6 1
net=motor_mosi:1
}
C 42000 42400 1 0 1 output.sym
{
T 41450 42400 5 10 0 0 0 6 1
device=INPUT
T 41450 42400 5 10 1 1 0 6 1
net=motor_miso:1
}
C 43800 42400 1 0 1 input.sym
{
T 43550 42400 5 10 0 0 0 0 1
device=INPUT
T 43550 42400 5 10 1 1 0 0 1
net=drv_miso:1
}
C 42000 43200 1 0 1 output.sym
{
T 41450 43200 5 10 0 0 0 6 1
device=INPUT
T 41450 43200 5 10 1 1 0 6 1
net=motor_fault:1
}
C 43800 43200 1 0 1 input.sym
{
T 43550 43200 5 10 0 0 0 0 1
device=INPUT
T 43550 43200 5 10 1 1 0 0 1
net=drv_fault:1
}
C 42100 40900 1 0 0 cap.sym
{
T 42100 41500 5 10 0 0 0 0 1
device=CAPACITOR
T 42750 41175 5 10 1 1 180 0 1
refdes=C4
T 42375 41200 5 10 1 1 180 0 1
value=130pF
T 42100 40900 5 10 0 0 270 0 1
footprint=0805_ext
T 42100 40900 5 10 0 0 270 0 1
model=CL21C131JBANNNC
T 42100 40900 5 10 0 0 270 0 1
description=130pF 50V Ceramic Capacitor C0G, NP0 0805
}
C 42100 41500 1 0 0 cap.sym
{
T 42100 42100 5 10 0 0 0 0 1
device=CAPACITOR
T 42750 41800 5 10 1 1 180 0 1
refdes=C3
T 42375 41800 5 10 1 1 180 0 1
value=130pF
T 42100 41500 5 10 0 0 270 0 1
footprint=0805_ext
T 42100 41500 5 10 0 0 270 0 1
model=CL21C131JBANNNC
T 42100 41500 5 10 0 0 270 0 1
description=130pF 50V Ceramic Capacitor C0G, NP0 0805
}
C 42000 41200 1 0 0 resistor.sym
{
T 42300 41600 5 10 0 0 0 0 1
device=RESISTOR
T 42000 41200 5 10 0 0 0 0 1
footprint=0805_ext
T 42000 41350 5 10 1 1 0 0 1
refdes=R5
T 42500 41350 5 10 1 1 0 0 1
value=180
T 42000 41200 5 10 0 0 0 0 1
model=RMCF0805JT180R
T 42000 41200 5 10 0 0 0 0 1
description=RES SMD 180 OHM 5% 1/8W 0805
}
C 42000 41800 1 0 0 resistor.sym
{
T 42300 42200 5 10 0 0 0 0 1
device=RESISTOR
T 42000 41800 5 10 0 0 0 0 1
footprint=0805_ext
T 42025 41975 5 10 1 1 0 0 1
refdes=R4
T 42500 41975 5 10 1 1 0 0 1
value=180
T 42000 41800 5 10 0 0 0 0 1
model=RMCF0805JT180R
T 42000 41800 5 10 0 0 0 0 1
description=RES SMD 180 OHM 5% 1/8W 0805
}
C 42000 42400 1 0 0 resistor.sym
{
T 42300 42800 5 10 0 0 0 0 1
device=RESISTOR
T 42000 42400 5 10 0 0 0 0 1
footprint=0805_ext
T 42000 42575 5 10 1 1 0 0 1
refdes=R3
T 42450 42575 5 10 1 1 0 0 1
value=180
T 42000 42400 5 10 0 0 0 0 1
model=RMCF0805JT180R
T 42000 42400 5 10 0 0 0 0 1
description=RES SMD 180 OHM 5% 1/8W 0805
}
C 42000 43200 1 0 0 resistor.sym
{
T 42300 43600 5 10 0 0 0 0 1
device=RESISTOR
T 42000 43200 5 10 0 0 0 0 1
footprint=0805_ext
T 42000 43375 5 10 1 1 0 0 1
refdes=R1
T 42450 43375 5 10 1 1 0 0 1
value=180
T 42000 43200 5 10 0 0 0 0 1
model=RMCF0805JT180R
T 42000 43200 5 10 0 0 0 0 1
description=RES SMD 180 OHM 5% 1/8W 0805
}
C 42800 42900 1 180 0 resistor.sym
{
T 42500 42500 5 10 0 0 180 0 1
device=RESISTOR
T 42800 42900 5 10 0 0 180 0 1
footprint=0805_ext
T 42250 43025 5 10 1 1 180 0 1
refdes=R6
T 42800 43025 5 10 1 1 180 0 1
value=2.4k
T 42800 42900 5 10 0 0 90 0 1
description=RES SMD 2.4K OHM 5% 1/8W 0805
T 42800 42900 5 10 0 0 90 0 1
model=RC0805JR-072K4L
}
C 42800 43700 1 180 0 resistor.sym
{
T 42500 43300 5 10 0 0 180 0 1
device=RESISTOR
T 42800 43700 5 10 0 0 180 0 1
footprint=0805_ext
T 42225 43825 5 10 1 1 180 0 1
refdes=R2
T 42775 43825 5 10 1 1 180 0 1
value=2.4k
T 42800 43700 5 10 0 0 90 0 1
description=RES SMD 2.4K OHM 5% 1/8W 0805
T 42800 43700 5 10 0 0 90 0 1
model=RC0805JR-072K4L
}
C 41000 48600 1 0 0 input.sym
{
T 41250 48600 5 10 0 0 0 6 1
device=OUTPUT
T 41250 48600 5 10 1 1 0 6 1
net=step_y:1
}
C 42600 48600 1 0 0 output.sym
{
T 43150 48600 5 10 0 0 0 0 1
device=OUTPUT
T 43150 48600 5 10 1 1 0 0 1
net=drv_step_y:1
}
C 41000 47900 1 0 0 input.sym
{
T 41250 47900 5 10 0 0 0 6 1
device=OUTPUT
T 41250 47900 5 10 1 1 0 6 1
net=dir_y:1
}
C 42600 47900 1 0 0 output.sym
{
T 43150 47900 5 10 0 0 0 0 1
device=OUTPUT
T 43150 47900 5 10 1 1 0 0 1
net=drv_dir_y:1
}
C 41000 47200 1 0 0 input.sym
{
T 41250 47200 5 10 0 0 0 6 1
device=OUTPUT
T 41250 47200 5 10 1 1 0 6 1
net=step_z:1
}
C 42600 47200 1 0 0 output.sym
{
T 43150 47200 5 10 0 0 0 0 1
device=OUTPUT
T 43150 47200 5 10 1 1 0 0 1
net=drv_step_z:1
}
C 41000 46500 1 0 0 input.sym
{
T 41250 46500 5 10 0 0 0 6 1
device=OUTPUT
T 41250 46500 5 10 1 1 0 6 1
net=dir_z:1
}
C 42600 46500 1 0 0 output.sym
{
T 43150 46500 5 10 0 0 0 0 1
device=OUTPUT
T 43150 46500 5 10 1 1 0 0 1
net=drv_dir_z:1
}
C 41000 45800 1 0 0 input.sym
{
T 41250 45800 5 10 0 0 0 6 1
device=OUTPUT
T 41250 45800 5 10 1 1 0 6 1
net=step_a:1
}
C 42600 45800 1 0 0 output.sym
{
T 43150 45800 5 10 0 0 0 0 1
device=OUTPUT
T 43150 45800 5 10 1 1 0 0 1
net=drv_step_a:1
}
C 41000 45000 1 0 0 input.sym
{
T 41250 45000 5 10 0 0 0 6 1
device=OUTPUT
T 41250 45000 5 10 1 1 0 6 1
net=dir_a:1
}
C 42600 45000 1 0 0 output.sym
{
T 43150 45000 5 10 0 0 0 0 1
device=OUTPUT
T 43150 45000 5 10 1 1 0 0 1
net=drv_dir_a:1
}
C 49500 47400 1 0 0 header16-1.sym
{
T 49500 49400 5 10 0 1 0 0 1
device=HEADER16
T 50100 50700 5 10 1 1 0 0 1
refdes=J2
T 49500 47400 5 10 0 0 0 0 1
model=M20-9980846
T 49500 47400 5 10 0 0 0 0 1
footprint=HEADER16_2
}
C 51200 47900 1 90 0 gnd.sym
C 48700 47500 1 0 0 input.sym
{
T 48950 47500 5 10 0 0 0 6 1
device=INPUT
T 48950 47500 5 10 1 1 0 6 1
net=spin_0to10:1
}
C 51200 48300 1 90 0 gnd.sym
C 51700 50300 1 0 1 input.sym
{
T 51450 50300 5 10 0 0 0 0 1
device=OUTPUT
T 51450 50300 5 10 1 1 0 0 1
net=drv_enable_5V:1
}
C 51200 47500 1 90 0 gnd.sym
C 48700 49900 1 0 0 input.sym
{
T 48950 49900 5 10 0 0 0 6 1
device=OUTPUT
T 48950 49900 5 10 1 1 0 6 1
net=drv_step_x:1
}
C 48700 48700 1 0 0 input.sym
{
T 48950 48700 5 10 0 0 0 6 1
device=OUTPUT
T 48950 48700 5 10 1 1 0 6 1
net=drv_step_a:1
}
C 48700 49500 1 0 0 input.sym
{
T 48950 49500 5 10 0 0 0 6 1
device=OUTPUT
T 48950 49500 5 10 1 1 0 6 1
net=drv_step_y:1
}
C 48700 49100 1 0 0 input.sym
{
T 48950 49100 5 10 0 0 0 6 1
device=OUTPUT
T 48950 49100 5 10 1 1 0 6 1
net=drv_step_z:1
}
C 51700 48700 1 0 1 input.sym
{
T 51450 48700 5 10 0 0 0 0 1
device=OUTPUT
T 51450 48700 5 10 1 1 0 0 1
net=drv_dir_a:1
}
C 51700 49100 1 0 1 input.sym
{
T 51450 49100 5 10 0 0 0 0 1
device=OUTPUT
T 51450 49100 5 10 1 1 0 0 1
net=drv_dir_z:1
}
C 51700 49500 1 0 1 input.sym
{
T 51450 49500 5 10 0 0 0 0 1
device=OUTPUT
T 51450 49500 5 10 1 1 0 0 1
net=drv_dir_y:1
}
C 51700 49900 1 0 1 input.sym
{
T 51450 49900 5 10 0 0 0 0 1
device=OUTPUT
T 51450 49900 5 10 1 1 0 0 1
net=drv_dir_x:1
}
C 41200 50000 1 0 0 level_shifter.sym
{
T 42000 50500 5 10 1 1 0 0 1
refdes=LV1
}
C 41200 49200 1 0 0 level_shifter.sym
{
T 42000 49700 5 10 1 1 0 0 1
refdes=LV2
}
C 41200 48500 1 0 0 level_shifter.sym
{
T 42000 49000 5 10 1 1 0 0 1
refdes=LV3
}
C 41200 47800 1 0 0 level_shifter.sym
{
T 42000 48300 5 10 1 1 0 0 1
refdes=LV4
}
C 41200 47100 1 0 0 level_shifter.sym
{
T 42000 47600 5 10 1 1 0 0 1
refdes=LV5
}
C 41200 46400 1 0 0 level_shifter.sym
{
T 42000 46900 5 10 1 1 0 0 1
refdes=LV6
}
C 41200 45700 1 0 0 level_shifter.sym
{
T 42000 46200 5 10 1 1 0 0 1
refdes=LV7
}
C 41200 44900 1 0 0 level_shifter.sym
{
T 42000 45400 5 10 1 1 0 0 1
refdes=LV8
}
C 49500 47700 1 90 0 3.3V_motor.sym
{
T 48800 47800 5 10 0 0 90 0 1
device=none
}
C 49500 48200 1 90 0 5V-plus.sym
C 41000 44200 1 0 0 input.sym
{
T 41250 44200 5 10 0 0 0 6 1
device=INPUT
T 41250 44200 5 10 1 1 0 6 1
net=motor_fault:1
}
C 41200 44100 1 0 0 level_shifter.sym
{
T 42000 44600 5 10 1 1 0 0 1
refdes=LV9
}
C 42600 44200 1 0 0 output.sym
{
T 43150 44200 5 10 0 0 0 0 1
device=OUTPUT
T 43150 44200 5 10 1 1 0 0 1
net=drv_fault_5V:1
}
C 48700 50300 1 0 0 input.sym
{
T 48950 50300 5 10 0 0 0 6 1
device=OUTPUT
T 48950 50300 5 10 1 1 0 6 1
net=drv_fault_5V:1
}