From 1b9ffb8b2d84bddfbd74426d2a5459026b7cfb78 Mon Sep 17 00:00:00 2001 From: Michal Demin Date: Mon, 3 Mar 2025 16:42:10 +0100 Subject: [PATCH] samx5x: bring file up to standard. - unsigned literals are suffixed with U - some space changes --- src/target/samx5x.c | 103 ++++++++++++++++++++++---------------------- 1 file changed, 51 insertions(+), 52 deletions(-) diff --git a/src/target/samx5x.c b/src/target/samx5x.c index b797b33b1e4..a17487f5657 100644 --- a/src/target/samx5x.c +++ b/src/target/samx5x.c @@ -84,14 +84,14 @@ const command_s samx5x_cmd_list[] = { /* clang-format off */ static const uint8_t samx5x_user_page_factory_bits[] = { - /* 0 8 16 24 32 40 48 56 */ - 0x00, 0x80, 0xff, 0xc3, 0x00, 0xff, 0x00, 0x80, + /* 0 8 16 24 32 40 48 56 */ + 0x00U, 0x80U, 0xffU, 0xc3U, 0x00U, 0xffU, 0x00U, 0x80U, - /*64 72 80 88 96 104 112 120 */ - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /*64 72 80 88 96 104 112 120 */ + 0x00U, 0x00U, 0x00U, 0x00U, 0x00U, 0x00U, 0x00U, 0x00U, - /*128 136 144 152 */ - 0xff, 0xff, 0xff, 0xff, + /*128 136 144 152 */ + 0xffU, 0xffU, 0xffU, 0xffU, }; /* clang-format on */ @@ -141,7 +141,7 @@ static const uint8_t samx5x_user_page_factory_bits[] = { /* Non-Volatile Memory Calibration and Auxiliary Registers */ #define SAMX5X_NVM_USER_PAGE UINT32_C(0x00804000) #define SAMX5X_NVM_CALIBRATION UINT32_C(0x00800000) -#define SAMX5X_NVM_SERIAL(n) (UINT32_C(0x0080600c) + ((n) == 0 ? 0x1f0U : (n)*4U)) +#define SAMX5X_NVM_SERIAL(n) (UINT32_C(0x0080600c) + ((n) == 0 ? 0x1f0U : (n) * 4U)) #define SAMX5X_USER_PAGE_OFFSET_LOCK 0x08U #define SAMX5X_USER_PAGE_OFFSET_BOOTPROT 0x03U @@ -239,19 +239,19 @@ samx5x_descr_s samx5x_parse_device_id(uint32_t did) switch (series) { case 1: samd.series_letter = 'E'; - samd.series_number = 51; + samd.series_number = 51U; break; case 6: samd.series_letter = 'D'; - samd.series_number = 51; + samd.series_number = 51U; break; case 3: samd.series_letter = 'E'; - samd.series_number = 53; + samd.series_number = 53U; break; case 4: samd.series_letter = 'E'; - samd.series_number = 54; + samd.series_number = 54U; break; } /* Revision */ @@ -262,39 +262,39 @@ samx5x_descr_s samx5x_parse_device_id(uint32_t did) switch (devsel) { case 0: samd.pin = 'P'; - samd.mem = 20; + samd.mem = 20U; break; case 1: samd.pin = 'P'; - samd.mem = 19; + samd.mem = 19U; break; case 2: samd.pin = 'N'; - samd.mem = 20; + samd.mem = 20U; break; case 3: samd.pin = 'N'; - samd.mem = 19; + samd.mem = 19U; break; case 4: samd.pin = 'J'; - samd.mem = 20; + samd.mem = 20U; break; case 5: samd.pin = 'J'; - samd.mem = 19; + samd.mem = 19U; break; case 6: samd.pin = 'J'; - samd.mem = 18; + samd.mem = 18U; break; case 7: samd.pin = 'G'; - samd.mem = 19; + samd.mem = 19U; break; case 8: samd.pin = 'G'; - samd.mem = 18; + samd.mem = 18U; break; } @@ -303,7 +303,7 @@ samx5x_descr_s samx5x_parse_device_id(uint32_t did) static void samx5x_add_flash(target_s *t, uint32_t addr, size_t length, size_t erase_block_size, size_t write_page_size) { - target_flash_s *f = calloc(1, sizeof(*f)); + target_flash_s *f = calloc(1U, sizeof(*f)); if (!f) { /* calloc failed: heap exhaustion */ DEBUG_INFO("calloc: failed in %s\n", __func__); return; @@ -321,7 +321,7 @@ static void samx5x_add_flash(target_s *t, uint32_t addr, size_t length, size_t e static void samx5x_add_user_page(target_s *t) { - target_flash_s *f = calloc(1, sizeof(*f)); + target_flash_s *f = calloc(1U, sizeof(*f)); if (!f) { /* calloc failed: heap exhaustion */ DEBUG_INFO("calloc: failed in %s\n", __func__); return; @@ -385,16 +385,16 @@ bool samx5x_probe(target_s *t) switch (samx5x.mem) { default: case 18: - target_add_ram32(t, 0x20000000, 0x20000); - samx5x_add_flash(t, 0x00000000, 0x40000, SAMX5X_BLOCK_SIZE, SAMX5X_PAGE_SIZE); + target_add_ram32(t, 0x20000000U, 0x20000U); + samx5x_add_flash(t, 0x00000000U, 0x40000U, SAMX5X_BLOCK_SIZE, SAMX5X_PAGE_SIZE); break; case 19: - target_add_ram32(t, 0x20000000, 0x30000); - samx5x_add_flash(t, 0x00000000, 0x80000, SAMX5X_BLOCK_SIZE, SAMX5X_PAGE_SIZE); + target_add_ram32(t, 0x20000000U, 0x30000U); + samx5x_add_flash(t, 0x00000000U, 0x80000U, SAMX5X_BLOCK_SIZE, SAMX5X_PAGE_SIZE); break; case 20: - target_add_ram32(t, 0x20000000, 0x40000); - samx5x_add_flash(t, 0x00000000, 0x100000, SAMX5X_BLOCK_SIZE, SAMX5X_PAGE_SIZE); + target_add_ram32(t, 0x20000000U, 0x40000U); + samx5x_add_flash(t, 0x00000000U, 0x100000U, SAMX5X_BLOCK_SIZE, SAMX5X_PAGE_SIZE); break; } @@ -501,7 +501,7 @@ static bool samx5x_flash_erase(target_flash_s *f, target_addr_t addr, size_t len bool is_first_section = true; - for (size_t offset = 0; offset < len; offset += f->blocksize) { + for (size_t offset = 0U; offset < len; offset += f->blocksize) { target_mem32_write32(t, SAMX5X_NVMC_ADDRESS, addr + offset); /* If we're about to touch a new flash region, unlock it. */ @@ -528,7 +528,7 @@ static bool samx5x_flash_erase(target_flash_s *f, target_addr_t addr, size_t len /* If we've just finished writing to a flash region, lock it. */ const size_t next_offset = offset + f->blocksize; - if ((next_offset % lock_region_size) == 0) + if ((next_offset % lock_region_size) == 0U) samx5x_lock_current_address(t); } @@ -558,7 +558,7 @@ static bool samx5x_flash_write(target_flash_s *f, target_addr_t dest, const void target_mem32_write32(t, SAMX5X_NVMC_CTRLB, SAMX5X_CTRLB_CMD_KEY | SAMX5X_CTRLB_CMD_WRITEPAGE); /* Poll for NVM Ready */ - while ((target_mem32_read32(t, SAMX5X_NVMC_STATUS) & SAMX5X_STATUS_READY) == 0) { + while ((target_mem32_read32(t, SAMX5X_NVMC_STATUS) & SAMX5X_STATUS_READY) == 0U) { if (target_check_error(t) || samx5x_check_nvm_error(t)) { error = true; break; @@ -593,20 +593,20 @@ static int samx5x_write_user_page(target_s *t, uint8_t *buffer) target_mem32_write32(t, SAMX5X_NVMC_CTRLB, SAMX5X_CTRLB_CMD_KEY | SAMX5X_CTRLB_CMD_ERASEPAGE); /* Poll for NVM Ready */ - while ((target_mem32_read32(t, SAMX5X_NVMC_STATUS) & SAMX5X_STATUS_READY) == 0) { + while ((target_mem32_read32(t, SAMX5X_NVMC_STATUS) & SAMX5X_STATUS_READY) == 0U) { if (target_check_error(t) || samx5x_check_nvm_error(t)) return -1; } /* Write back */ - for (uint32_t offset = 0; offset < SAMX5X_PAGE_SIZE; offset += 16U) { - target_mem32_write(t, SAMX5X_NVM_USER_PAGE + offset, buffer + offset, 16); + for (uint32_t offset = 0U; offset < SAMX5X_PAGE_SIZE; offset += 16U) { + target_mem32_write(t, SAMX5X_NVM_USER_PAGE + offset, buffer + offset, 16U); /* Issue the write page command */ target_mem32_write32(t, SAMX5X_NVMC_CTRLB, SAMX5X_CTRLB_CMD_KEY | SAMX5X_CTRLB_CMD_WRITEQUADWORD); /* Poll for NVM Ready */ - while ((target_mem32_read32(t, SAMX5X_NVMC_STATUS) & SAMX5X_STATUS_READY) == 0) { + while ((target_mem32_read32(t, SAMX5X_NVMC_STATUS) & SAMX5X_STATUS_READY) == 0U) { if (target_check_error(t) || samx5x_check_nvm_error(t)) return -2; } @@ -642,18 +642,17 @@ static bool samx5x_user_page_write(target_flash_s *f, target_addr_t dest, const target_mem32_read(t, buffer, SAMX5X_NVM_USER_PAGE, SAMX5X_PAGE_SIZE); - for (uint32_t addr = 0; addr < SAMX5X_PAGE_SIZE; addr += 4) { - factory_mask = 0; + for (uint32_t addr = 0U; addr < SAMX5X_PAGE_SIZE; addr += 4U) { uint32_t current_word; uint32_t value; uint32_t factory_mask = 0U; /* sample words from current page and new page content */ - memcpy(¤t_word, buffer + addr, 4); - memcpy(&value, (const uint8_t *)src + addr, 4); + memcpy(¤t_word, buffer + addr, 4U); + memcpy(&value, (const uint8_t *)src + addr, 4U); /* get factory word bitmask */ - for (size_t i = 0; i < 4U && addr + i < 20U; ++i) + for (size_t i = 0U; i < 4U && addr + i < 20U; ++i) factory_mask |= (uint32_t)samx5x_user_page_factory_bits[addr + i] << (i * 8U); /* compute new word */ @@ -661,14 +660,14 @@ static bool samx5x_user_page_write(target_flash_s *f, target_addr_t dest, const if (new_word != current_word) { DEBUG_INFO("Altering user page word 0x%08" PRIx32 " at offset 0x%03" PRIx32 "\n", new_word, addr); - memcpy(buffer + addr, &new_word, 4); + memcpy(buffer + addr, &new_word, 4U); changed = true; } } if (changed) { int ret = samx5x_write_user_page(t, buffer); - return ret < 0 ? false : true; + return ret >= 0; } DEBUG_INFO("Skipping user page write as no change would be made\n"); @@ -681,9 +680,9 @@ static int samx5x_update_user_word(target_s *t, uint32_t addr, uint32_t value, u uint32_t current_word; target_mem32_read(t, buffer, SAMX5X_NVM_USER_PAGE, SAMX5X_PAGE_SIZE); - memcpy(¤t_word, buffer + addr, 4); + memcpy(¤t_word, buffer + addr, 4U); - uint32_t factory_word = 0; + uint32_t factory_word = 0U; for (size_t i = 0; !force && i < 4U && addr + i < 20U; ++i) factory_word |= (uint32_t)samx5x_user_page_factory_bits[addr + i] << (i * 8U); @@ -693,7 +692,7 @@ static int samx5x_update_user_word(target_s *t, uint32_t addr, uint32_t value, u if (new_word != current_word) { DEBUG_INFO("Writing user page word 0x%08" PRIx32 " at offset 0x%03" PRIx32 "\n", new_word, addr); - memcpy(buffer + addr, &new_word, 4); + memcpy(buffer + addr, &new_word, 4U); return samx5x_write_user_page(t, buffer); } DEBUG_INFO("Skipping user page write as no change would be made\n"); @@ -713,7 +712,7 @@ static int samx5x_set_flashlock(target_s *t, uint32_t value) target_mem32_read(t, buffer, SAMX5X_NVM_USER_PAGE, SAMX5X_PAGE_SIZE); uint32_t current_value; - memcpy(¤t_value, buffer + SAMX5X_USER_PAGE_OFFSET_LOCK, 4); + memcpy(¤t_value, buffer + SAMX5X_USER_PAGE_OFFSET_LOCK, 4U); if (value != current_value) return samx5x_update_user_word(t, SAMX5X_USER_PAGE_OFFSET_LOCK, value, NULL, false); @@ -758,7 +757,7 @@ static int samx5x_set_bootprot(target_s *t, uint8_t value) target_mem32_read(t, buffer, SAMX5X_NVM_USER_PAGE, SAMX5X_PAGE_SIZE); uint32_t current_value; - memcpy(¤t_value, buffer + SAMX5X_USER_PAGE_OFFSET_BOOTPROT, 4); + memcpy(¤t_value, buffer + SAMX5X_USER_PAGE_OFFSET_BOOTPROT, 4U); uint32_t new_value = current_value & ~SAMX5X_USER_PAGE_MASK_BOOTPROT; new_value |= (value << SAMX5X_USER_PAGE_SHIFT_BOOTPROT) & SAMX5X_USER_PAGE_MASK_BOOTPROT; @@ -772,7 +771,7 @@ static bool samx5x_cmd_lock_bootprot(target_s *t, int argc, const char **argv) { (void)argc; (void)argv; - if (samx5x_set_bootprot(t, 0)) { + if (samx5x_set_bootprot(t, 0U)) { tc_printf(t, "Error writing NVM page\n"); return false; } @@ -784,7 +783,7 @@ static bool samx5x_cmd_unlock_bootprot(target_s *t, int argc, const char **argv) { (void)argc; (void)argv; - if (samx5x_set_bootprot(t, 0xf)) { + if (samx5x_set_bootprot(t, 0xfU)) { tc_printf(t, "Error writing NVM page\n"); return false; } @@ -802,7 +801,7 @@ static bool samx5x_cmd_read_userpage(target_s *t, int argc, const char **argv) tc_printf(t, "User Page:\n"); for (size_t i = 0; i < SAMX5X_PAGE_SIZE; ++i) - tc_printf(t, "%02x%c", buffer[i], (i + 1U) % 16U == 0 ? '\n' : ' '); + tc_printf(t, "%02x%c", buffer[i], (i + 1U) % 16U == 0U ? '\n' : ' '); return true; } @@ -828,7 +827,7 @@ static bool samx5x_cmd_ssb(target_s *t, int argc, const char **argv) target_mem32_write32(t, SAMX5X_NVMC_CTRLB, SAMX5X_CTRLB_CMD_KEY | SAMX5X_CTRLB_CMD_SSB); /* Poll for NVM Ready */ - while ((target_mem32_read32(t, SAMX5X_NVMC_STATUS) & SAMX5X_STATUS_READY) == 0) { + while ((target_mem32_read32(t, SAMX5X_NVMC_STATUS) & SAMX5X_STATUS_READY) == 0U) { if (target_check_error(t)) return false; } @@ -928,7 +927,7 @@ static bool samx5x_cmd_mbist(target_s *t, int argc, const char **argv) /* Poll for DSU Ready */ uint32_t status = 0; - while ((status & (SAMX5X_STATUSA_DONE | SAMX5X_STATUSA_PERR | SAMX5X_STATUSA_FAIL)) == 0) { + while ((status & (SAMX5X_STATUSA_DONE | SAMX5X_STATUSA_PERR | SAMX5X_STATUSA_FAIL)) == 0U) { status = target_mem_read32(t, SAMX5X_DSU_CTRLSTAT); if (target_check_error(t)) return false;