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Control loops are running well now but we don't know where we are. Final loop optimization can be done as soon as we get the board on the bench.
The text was updated successfully, but these errors were encountered:
Added fault objects for UVLO, OVLO, OVP, OCP, OTW and OTP for converter
6f38ffd
#1 and #2
Completed fault object declaration and initialization of UVLO, OVLO, …
d12d50f
…OVP, OCP, OTW and OTP for converter #1 and #2
87d985e
Fixed bug with overlapping fault bits between converter #1 and #2
9754abe
areiter128
mannggWP
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Stability and Performance
Control loops are running well now but we don't know where we are. Final loop optimization can be done as soon as we get the board on the bench.
The text was updated successfully, but these errors were encountered: