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| 1 | + |
| 2 | +#include <iostm8s103.h> |
| 3 | + |
| 4 | + |
| 5 | + #define CLR_BIT(p,n) ((p) &= ~((1) << (n))) |
| 6 | + #define SET_BIT(p,n) ((p) |= (1 << (n))) |
| 7 | + |
| 8 | + |
| 9 | + #define CLR_SEG1 CLR_BIT(PB_ODR,4) |
| 10 | + #define CLR_SEG2 CLR_BIT(PC_ODR,3) |
| 11 | + #define CLR_SEG3 CLR_BIT(PC_ODR,4) |
| 12 | + #define CLR_SEG4 CLR_BIT(PC_ODR,5) |
| 13 | + |
| 14 | + |
| 15 | + |
| 16 | + #define SET_SEG1 SET_BIT(PB_ODR,4) |
| 17 | + #define SET_SEG2 SET_BIT(PC_ODR,3) |
| 18 | + #define SET_SEG3 SET_BIT(PC_ODR,4) |
| 19 | + #define SET_SEG4 SET_BIT(PC_ODR,5) |
| 20 | + |
| 21 | + |
| 22 | + |
| 23 | + #define CLR_SEGA CLR_BIT(PD_ODR,6) |
| 24 | + #define CLR_SEGB CLR_BIT(PD_ODR,5) |
| 25 | + #define CLR_SEGC CLR_BIT(PD_ODR,4) |
| 26 | + #define CLR_SEGD CLR_BIT(PD_ODR,3) |
| 27 | + #define CLR_SEGE CLR_BIT(PD_ODR,2) |
| 28 | + #define CLR_SEGF CLR_BIT(PC_ODR,7) |
| 29 | + #define CLR_SEGG CLR_BIT(PC_ODR,6) |
| 30 | + |
| 31 | + #define SET_SEGA SET_BIT(PD_ODR,6) |
| 32 | + #define SET_SEGB SET_BIT(PD_ODR,5) |
| 33 | + #define SET_SEGC SET_BIT(PD_ODR,4) |
| 34 | + #define SET_SEGD SET_BIT(PD_ODR,3) |
| 35 | + #define SET_SEGE SET_BIT(PD_ODR,2) |
| 36 | + #define SET_SEGF SET_BIT(PC_ODR,7) |
| 37 | + #define SET_SEGG SET_BIT(PC_ODR,6) |
| 38 | + |
| 39 | + |
| 40 | + |
| 41 | + #define SW1 1 |
| 42 | + #define SW2 2 |
| 43 | + #define SW3 3 |
| 44 | + #define SW_DDR PA_DDR |
| 45 | + |
| 46 | + |
| 47 | +void display_num(char num); |
| 48 | +void mux4(void); |
| 49 | +void delay(long x); |
| 50 | +void mdelay(long x); |
| 51 | + |
| 52 | + |
| 53 | +unsigned char digits[4]={1,2,3,4}; |
| 54 | + |
| 55 | +main() |
| 56 | +{ |
| 57 | + unsigned int d; |
| 58 | + |
| 59 | + CLR_BIT(SW_DDR,SW1); //SET SW1 AS INPUT |
| 60 | + CLR_BIT(SW_DDR,SW2); //SET SW2 AS INPUT |
| 61 | + CLR_BIT(SW_DDR,SW3); //SET SW3 AS INPUT |
| 62 | + |
| 63 | + |
| 64 | + |
| 65 | + PB_DDR = 255; //PORTB AS OUTPUT |
| 66 | + PC_DDR = 255; //PORTC AS OUTPUT |
| 67 | + PD_DDR = 255; |
| 68 | + |
| 69 | + //PB_DDR = (1<<5); |
| 70 | + PB_CR1 = 255; |
| 71 | + PD_CR1 = 255; |
| 72 | + PC_CR1 = 255; |
| 73 | + |
| 74 | + CLR_SEG1; |
| 75 | + CLR_SEG2; |
| 76 | + CLR_SEG3; |
| 77 | + CLR_SEG4; |
| 78 | + |
| 79 | + |
| 80 | + |
| 81 | + |
| 82 | + |
| 83 | + while (1){ |
| 84 | + int cnt = 0; |
| 85 | + PB_ODR |= (1<<5); |
| 86 | + mdelay(300); |
| 87 | + PB_ODR &= ~(1<<5); |
| 88 | + mdelay(300); |
| 89 | + |
| 90 | + |
| 91 | + } |
| 92 | + // mux4(); |
| 93 | + /*for(cnt=0;cnt<11;cnt++){ |
| 94 | + display_num(cnt); |
| 95 | + delay(500); |
| 96 | + PB_ODR |= (1<<5); |
| 97 | + delay(500); |
| 98 | + PB_ODR &= ~(1<<5); |
| 99 | + } |
| 100 | + |
| 101 | + }*/ |
| 102 | +} |
| 103 | + |
| 104 | +void display_num(char num){ |
| 105 | + switch(num){ |
| 106 | + |
| 107 | + case 0: |
| 108 | + CLR_SEGA;CLR_SEGB;CLR_SEGC;CLR_SEGD;CLR_SEGE;CLR_SEGF;SET_SEGG; |
| 109 | + break; |
| 110 | + |
| 111 | + case 1: |
| 112 | + SET_SEGA;CLR_SEGB;CLR_SEGC;SET_SEGD;SET_SEGE;SET_SEGF;SET_SEGG; |
| 113 | + break; |
| 114 | + |
| 115 | + case 2: |
| 116 | + CLR_SEGA;CLR_SEGB;SET_SEGC;CLR_SEGD;CLR_SEGE;SET_SEGF;CLR_SEGG; |
| 117 | + break; |
| 118 | + |
| 119 | + case 3: |
| 120 | + CLR_SEGA;CLR_SEGB;CLR_SEGC;CLR_SEGD;SET_SEGE;SET_SEGF;CLR_SEGG; |
| 121 | + break; |
| 122 | + |
| 123 | + case 4: |
| 124 | + SET_SEGA;CLR_SEGB;CLR_SEGC;SET_SEGD;SET_SEGE;CLR_SEGF;CLR_SEGG; |
| 125 | + break; |
| 126 | + |
| 127 | + case 5: |
| 128 | + CLR_SEGA;SET_SEGB;CLR_SEGC;CLR_SEGD;SET_SEGE;CLR_SEGF;CLR_SEGG; |
| 129 | + break; |
| 130 | + |
| 131 | + case 6: |
| 132 | + CLR_SEGA;SET_SEGB;CLR_SEGC;CLR_SEGD;CLR_SEGE;CLR_SEGF;CLR_SEGG; |
| 133 | + break; |
| 134 | + |
| 135 | + case 7: |
| 136 | + CLR_SEGA;CLR_SEGB;CLR_SEGC;SET_SEGD;SET_SEGE;SET_SEGF;SET_SEGG; |
| 137 | + break; |
| 138 | + |
| 139 | + case 8: |
| 140 | + CLR_SEGA;CLR_SEGB;CLR_SEGC;CLR_SEGD;CLR_SEGE;CLR_SEGF;CLR_SEGG; |
| 141 | + break; |
| 142 | + |
| 143 | + case 9: |
| 144 | + CLR_SEGA;CLR_SEGB;CLR_SEGC;CLR_SEGD;SET_SEGE;CLR_SEGF;CLR_SEGG; |
| 145 | + break; |
| 146 | + |
| 147 | + default: |
| 148 | + SET_SEGA;SET_SEGB;SET_SEGC;SET_SEGD;SET_SEGE;SET_SEGF;SET_SEGG; |
| 149 | + break; |
| 150 | + |
| 151 | + |
| 152 | + } |
| 153 | + |
| 154 | +} |
| 155 | + |
| 156 | + |
| 157 | +void mux4(){ |
| 158 | + |
| 159 | + SET_SEG1;SET_SEG2;SET_SEG3;SET_SEG4; |
| 160 | + |
| 161 | + display_num(digits[0]); |
| 162 | + CLR_SEG1; |
| 163 | + delay(1); |
| 164 | + SET_SEG1; |
| 165 | + |
| 166 | + |
| 167 | + delay(1); |
| 168 | + |
| 169 | + display_num(digits[1]); |
| 170 | + CLR_SEG2; |
| 171 | + delay(1); |
| 172 | + SET_SEG2; |
| 173 | + |
| 174 | + |
| 175 | + delay(1); |
| 176 | + |
| 177 | + display_num(digits[2]); |
| 178 | + CLR_SEG3; |
| 179 | + delay(1); |
| 180 | + SET_SEG3; |
| 181 | + |
| 182 | + |
| 183 | + delay(1); |
| 184 | + |
| 185 | + display_num(digits[3]); |
| 186 | + CLR_SEG4; |
| 187 | + delay(1); |
| 188 | + SET_SEG4; |
| 189 | + |
| 190 | + delay(1); |
| 191 | + |
| 192 | +} |
| 193 | + |
| 194 | + |
| 195 | +void delay(long x){ |
| 196 | + char d=0; |
| 197 | + for(;x>0;x--) |
| 198 | + for (d = 0; d < 10; d++); //Delay ~ 1 second |
| 199 | + |
| 200 | +} |
| 201 | + |
| 202 | +void mdelay(long x){ |
| 203 | + long i=0; |
| 204 | + for(i=0;i<x;i++){ |
| 205 | + mux4(); |
| 206 | + } |
| 207 | +} |
| 208 | + |
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