Correct quickstart docker image name (#1165)

* Post 3.5 launch fixes

* Integrate filtered HTML Model Zoo

* Update VE2302 lounge link, update Quickstarts

* Fix whitespace in make_gh_pages.bat

* Remove AKS due to incompatible targets

* Correct Quickstart img/vid paths and fix V70 Docker setup note

* Update make_gh_pages

* Update V70 Quickstart deployment step 1

* Automate gh-pages html build date in conf.py

* Automate gh-pages html build date in conf.py

* Fix make_gh_pages whitespace

Author: quentonh

board_setup/README.md

@@ -9,6 +9,6 @@
 
 The Vitis-AI repository provides pre-built board images that can be leveraged by users who wish to test-drive the Vitis AI workflow, run examples and evaluate models from the Model Zoo.  This directory provides the necessary scripts and files that will enable usage of these targets.
 
-As of the 3.5 release of Vitis AI, the target setup documentation has migrated to Github.IO and is integrated into the Quickstart tutorials.  **[PLEASE ACCESS THE LATEST QUICKSTART DOCUMENTATION ONLINE](https://xilinx.github.io/Vitis-AI/docs)** or **[OPEN THE OFFLINE DOCUMENTATION IN YOUR BROWSER](../docs/docs/index.html)**.
+As of the 3.5 release of Vitis AI, the target setup documentation has migrated to Github.IO and is integrated into the Quickstart tutorials.  **[PLEASE ACCESS THE LATEST QUICKSTART DOCUMENTATION ONLINE](https://xilinx.github.io/Vitis-AI)** or **[OPEN THE OFFLINE DOCUMENTATION IN YOUR BROWSER](../docs/docs/index.html)**.
 
 

docs/.buildinfo

@@ -1,4 +1,4 @@
 # Sphinx build info version 1
 # This file hashes the configuration used when building these files. When it is not found, a full rebuild will be done.
-config: e8809926e287b8b0d9656262fa0b07bc
+config: 1de2b2f9b235f1525cca77dddc2685a5
 tags: 645f666f9bcd5a90fca523b33c5a78b7

docs/_sources/docs/quickstart/v70.rst.txt

@@ -109,7 +109,8 @@ From inside the docker container, execute one of the following commands to set t
 .. code-block:: Bash
 
 	[Docker] $ source /workspace/board_setup/v70/setup.sh DPUCV2DX8G_v70
-	  
+
+.. note:: You will need to execute this script each time you re-enter the Docker container.	  
 
 Vitis-AI Model Zoo
 ==================
@@ -231,18 +232,19 @@ floating-point model as an input and performs pre-processing (folds batchnorms a
 .. code-block:: Bash
 	
 	[Host] $ cd ..
-	[Host] ./docker_run.sh vitis-ai-pytorch-cpu:latest
+	[Host] ./docker_run.sh xilinx/vitis-ai-pytorch-cpu:latest
 
 * Note that when you start Docker appropriate as shown above, your ``/workspace`` folder will correspond to ``/Vitis-AI`` and your initial path in Docker will be ``/workspace``.  If you inspect ``docker_run.sh`` you can see that the -v option is leveraged which links the Docker file system to your Host file system.  Verify that you see the created ``/resnet18`` subfolder in your workspace:
 
 .. code-block:: Bash
 	
 	[Docker] $ ls
 
-4. Download the pre-trained resnet18 model from PyTorch to the docker environment and store it in the  ``model``  folder . This is the floating point (FP32) model that will be quantized to INT8 precision for deployment on the target.
+4. Next, download the pre-trained resnet18 model from PyTorch to the docker environment and store it in the  ``model``  folder . This is the floating point (FP32) model that will be quantized to INT8 precision for deployment on the target. Also, since you have re-entered the Docker container, you need to re-run the setup script.  
 
 .. code-block:: Bash
 
+	[Docker] $ source /workspace/board_setup/v70/setup.sh DPUCV2DX8G_v70
 	[Docker] $ cd resnet18/model
 	[Docker] $ wget https://download.pytorch.org/models/resnet18-5c106cde.pth -O resnet18.pth
 
@@ -381,7 +383,7 @@ The Vitis AI Compiler compiles the graph operators as a set of micro-coded instr
 Model Deployment
 ================
 
-1. Locate the ``resnet18_pt`` folder ``/usr/share/vitis_ai_library/models/`` folder along with the other Viitis AI model examples. 
+1. Copy the ``resnet18_pt`` folder into the ``/usr/share/vitis_ai_library/models/`` directory.  This will locate your compiled model in the default Vitis AI Library example model directory, alongside the other Vitis AI example models.  Our purpose in doing this is to simplify the commands that follow, in which we will execute the Vitis AI Library samples with our model.
 
 2. The `vitis_ai_library_r3.5.0_images.tar.gz <https://www.xilinx.com/bin/public/openDownload?filename=vitis_ai_library_r3.5.0_images.tar.gz>`__ and `vitis_ai_library_r3.5.0_video.tar.gz <https://www.xilinx.com/bin/public/openDownload?filename=vitis_ai_library_r3.5.0_video.tar.gz>`__ packages 
 contain test images and videos that can be leveraged to evaluate our quantized model and other pre-built Vitis-AI Library examples. 
@@ -413,15 +415,15 @@ contain test images and videos that can be leveraged to evaluate our quantized m
 
 .. code-block:: Bash
 
-	[Docker] $ ./test_jpeg_classification resnet18_pt /workspace/examples/vai_library/samples/classification/images/001.jpg
+	[Docker] $ ./test_jpeg_classification resnet18_pt /workspace/examples/vai_library/samples/classification/images/001.JPEG
 
 If you wish to do so, you can review the `result.jpg` file.  OpenCV function calls have been used to overlay the predictions.
 
 5. To run the video example, run the following command:
 
 .. code-block:: Bash
 
-	[Docker] $ ./test_video_classification resnet18_pt /workspace/examples/vai_library/apps/pose_960_540.avi -t 8
+	[Docker] $ ./test_video_classification resnet18_pt /workspace/examples/vai_library/apps/seg_and_pose_detect/pose_960_540.avi -t 8
 
 7. The output should be as follows:
 

docs/_sources/docs/quickstart/vek280.rst.txt

@@ -345,7 +345,7 @@ floating-point model as an input and performs pre-processing (folds batchnorms a
 .. code-block:: Bash
 	
 	[Host] $ cd ..
-	[Host] ./docker_run.sh vitis-ai-pytorch-cpu:latest
+	[Host] ./docker_run.sh xilinx/vitis-ai-pytorch-cpu:latest
 
 .. note:: When you start Docker as shown earlier, your ``/workspace`` folder will correspond to ``/Vitis-AI`` and your initial path in Docker will be ``/workspace``.  If you inspect ``docker_run.sh`` you can see that the -v option is leveraged which links the Docker file system to your Host file system.  Verify that you see the created ``/resnet18`` subfolder in your workspace:
 
@@ -500,7 +500,7 @@ Model Deployment
 
 	[Docker] $ scp -r resnet18_pt root@[TARGET_IP_ADDRESS]:/usr/share/vitis_ai_library/models/
 	
-* The model will be located under the ``/usr/share/vitis_ai_library/models/`` folder along with the other Viitis-AI model examples. 
+* The model will be located under the ``/usr/share/vitis_ai_library/models/`` folder along with the other Vitis-AI model examples. 
 
 
 2. The `vitis_ai_library_r3.5.0_images.tar.gz <https://www.xilinx.com/bin/public/openDownload?filename=vitis_ai_library_r3.5.0_images.tar.gz>`__ and `vitis_ai_library_r3.5.0_video.tar.gz <https://www.xilinx.com/bin/public/openDownload?filename=vitis_ai_library_r3.5.0_video.tar.gz>`__ packages 
@@ -548,7 +548,7 @@ If you wish to do so, you can copy the `result.jpg` file back to your host and r
 
 .. code-block:: Bash
 
-	[Target] $ ./test_video_classification resnet18_pt ~/Vitis-AI/examples/vai_library/apps/pose_960_540.avi -t 8
+	[Target] $ ./test_video_classification resnet18_pt ~/Vitis-AI/examples/vai_library/apps/seg_and_pose_detect/pose_960_540.avi -t 8
 
 6. Users can run real time inference using a USB web camera connected to the target with the command below:
 

docs/_sources/docs/ref_design_docs/README_DPUCV2DX8G.rst.txt

@@ -1,3 +1,5 @@
+:orphan:
+
 VEK280 DPUCV2DX8G Reference Design
 ==================================
 
@@ -165,7 +167,15 @@ is set as shown below.
 
 **Step1:** Build VEK280 platform
 
-First, build the VEK280 platform in the folder `$TRD_HOME/vek280_platform`, following the instructions in `$TRD_HOME/vek280_platform/README.md`.
+First, build the VEK280 platform in the folder `$TRD_HOME/vek280_platform`, more details refer to the instructions in `$TRD_HOME/vek280_platform/README.md`.
+
+::
+
+   % source <Vitis_install_path>/Vitis/2023.1/settings64.sh
+
+   % source <PetaLinux_install_path>/settings.sh
+
+   % make all
 
 **Step2:** Setup the environment for building the DPUCV2DX8G IP and
 kernel
@@ -448,6 +458,11 @@ Package the RTL kernel as XO file. Then modify 2 files:
 
    set_param place.preplaceNOC true
 
+5) If your OS is Ubuntu, during AIE compilation step, you may get the error
+   like "[AIE ERROR] XAieSim_GetStackRange():522: Invalid Map file, 2: No 
+   such file or directory", the reason should be that your Ubuntu does not 
+   install the "rename" function, you can install it manually.
+
 .. raw:: html
 
    <!--
@@ -472,4 +487,4 @@ Package the RTL kernel as XO file. Then modify 2 files:
 .. |trade|  unicode:: U+02122 .. TRADEMARK SIGN
    :ltrim:
 .. |reg|    unicode:: U+000AE .. REGISTERED TRADEMARK SIGN
-   :ltrim:
+   :ltrim:

docs/_sources/docs/reference/faq.rst.txt

@@ -74,7 +74,7 @@ With the release of the Vitis AI IDE, more than 120 models are released in the V
 What Xilinx Target Device Families and Platforms does Vitis AI Support?
 -----------------------------------------------------------------------
 
-Vitis AI DPUs are available for both Zynq Ultrascale+ MPSoC as well as Versal Edge and Core chip-down designs. The Kria K26 SOM is supported as a production-ready Edge platform, and Alveo accelerator cards are supported for cloud applications. 
+Vitis AI DPUs are available for both Zynq Ultrascale+ MPSoC as well as Versal Edge and Core chip-down designs. The Kria |trade| K26 SOM is supported as a production-ready Edge platform, and Alveo |trade| accelerator cards are supported for cloud applications. 
 
 What does the Vitis AI Library provide?
 ---------------------------------------
@@ -172,4 +172,10 @@ In the past, developers have ported the DPUCZ reference design (formerly known a
 What is the specific AI accelerator that AMD Xilinx provides for Zynq™ Ultrascale+?  Is it a systolic array?
 ------------------------------------------------------------------------------------------------------------
 
-The DPUCZ IP that is provided with the Vitis AI IDE is the specialized accelerator. It is a custom processor that has a specialized instruction set. Graph operators such as CONV, POOL, ELTWISE are compiled as instructions that are executed by the DPU. The DPUCZ bears similarities to a systolic array but has specialized micro-coded engines that are optimized for specific tasks. Some of these engines are optimized for conventional convolution, while some are optimized for tasks such as depth-wise convolution, eltwise and others. We tend to refer to the DPUCZ as a Matrix of (Heterogeneous) Processing Engines.
+The DPUCZ IP that is provided with the Vitis AI IDE is the specialized accelerator. It is a custom processor that has a specialized instruction set. Graph operators such as CONV, POOL, ELTWISE are compiled as instructions that are executed by the DPU. The DPUCZ bears similarities to a systolic array but has specialized micro-coded engines that are optimized for specific tasks. Some of these engines are optimized for conventional convolution, while some are optimized for tasks such as depth-wise convolution, eltwise and others. We tend to refer to the DPUCZ as a Matrix of (Heterogeneous) Processing Engines.
+
+
+.. |trade|  unicode:: U+02122 .. TRADEMARK SIGN
+   :ltrim:
+.. |reg|    unicode:: U+000AE .. REGISTERED TRADEMARK SIGN
+   :ltrim:

docs/_sources/docs/reference/release_documentation.rst.txt

@@ -29,7 +29,7 @@ Vitis AI User Guides / DPU Product Guides
    * - Versal™ AI Edge / AI Core with AIE-ML, VEK280
      - `DPUCV2DX8G (PG425) <https://docs.xilinx.com/r/en-US/pg425-dpucv2>`__
 
-   * - Alveo V70
+   * - Alveo™ V70
      - `DPUCV2DX8G (PG425) <https://docs.xilinx.com/r/en-US/pg425-dpucv2>`__
 
    * - Zynq™ Ultrascale+™, Kria™, ZCU102, ZCU104, K26 SOM
@@ -42,9 +42,6 @@ Vitis AI User Guides / DPU Product Guides
      - `DPUCVDX8H (PG403) <https://docs.xilinx.com/r/en-US/pg403-dpucvdx8h>`__
 
 
-Known Issues
-------------
-- Engineering to add comments
 
 .. |trade|  unicode:: U+02122 .. TRADEMARK SIGN
    :ltrim:

docs/_sources/docs/reference/version_compatibility.rst.txt

@@ -36,7 +36,7 @@ Versal |trade| AI Edge with AIE-ML
      - 5.15
 
 
-Alveo V70
+Alveo |trade| V70
 
 .. list-table::
    :widths: 25 25 25 25

docs/_sources/docs/workflow-model-deployment.rst.txt

@@ -30,7 +30,7 @@ The Vitis AI workflow is largely unified for Embedded and Data Center applicatio
 
 -  Zynq |trade| Ultrascale+ |trade|, Kria |trade|, and Versal |trade| SoC applications leverage the on-chip processor subsystem (APU) as the host control node for model deployment. Considering optimization and :ref:`whole-application-acceleration` of subgraphs deployed on the SoC APU is crucial.
 
--  Alveo data center card deployments leverage the AMD64 architecture host for execution of subgraphs that cannot be deployed on the DPU.
+-  Alveo trade| data center card deployments leverage the AMD64 architecture host for execution of subgraphs that cannot be deployed on the DPU.
 
 -  Zynq Ultrascale+ and Kria designs can leverage the DPU with either the Vivado workflow or the Vitis workflow.
 

docs/_sources/docs/workflow-system-integration.rst.txt

@@ -56,7 +56,7 @@ As of the Vitis |trade| 1.2 release, the historic DPUv1/v2/v3 nomenclature was d
 DPU Options
 ~~~~~~~~~~~
 
-Versal |trade| AI Core / AI Edge Series / Alveo V70: DPUCV2DX8G
+Versal |trade| AI Core / AI Edge Series / Alveo |trade| V70: DPUCV2DX8G
 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 
 The DPUCV2DX8G is a high-performance, general-purpose convolutional neural network(CNN)
@@ -124,8 +124,8 @@ IP and Reference Designs
    * - DPUCV2DX8G `PG425 <https://docs.xilinx.com/r/en-US/pg425-dpu>`__
      - VE2302(see note)
      - 3.5
-     - `Early Access <https://www.xilinx.com/member/vitis-ai-vek280.html>`__
-     - `Early Access <https://www.xilinx.com/member/vitis-ai-vek280.html>`__
+     - `Early Access <https://account.amd.com/en/member/vitis-ai-ve2302.html>`__
+     - `Early Access <https://account.amd.com/en/member/vitis-ai-ve2302.html>`__
 
    * - DPUCZDX8G `PG338 <https://docs.xilinx.com/r/en-US/pg338-dpu>`__
      - MPSoC & Kria K26