Update Vitis AI Runtime to 1.3.2

Author: qianglin-xlnx

setup/mpsoc/VART/README.md

@@ -29,9 +29,9 @@ source ~/petalinux_sdk/environment-setup-aarch64-xilinx-linux
 ```
 Note that if you close the current terminal, you need to re-execute the above instructions in the new terminal interface.
 
-4. Download the [vitis_ai_2020.2-r1.3.1.tar.gz](https://www.xilinx.com/bin/public/openDownload?filename=vitis_ai_2020.2-r1.3.1.tar.gz) and install it to the petalinux system.
+4. Download the [vitis_ai_2020.2-r1.3.2.tar.gz](https://www.xilinx.com/bin/public/openDownload?filename=vitis_ai_2020.2-r1.3.2.tar.gz) and install it to the petalinux system.
 ```
-tar -xzvf vitis_ai_2020.2-r1.3.1.tar.gz -C ~/petalinux_sdk/sysroots/aarch64-xilinx-linux
+tar -xzvf vitis_ai_2020.2-r1.3.2.tar.gz -C ~/petalinux_sdk/sysroots/aarch64-xilinx-linux
 ```
 
 5. Cross compile the sample, take `resnet50` as an example.
@@ -76,11 +76,11 @@ steps.**
 3. (Optional) How to update Vitis AI Runtime and install them separately. 
 
 	If you want to update the Vitis AI Runtime or install them to your custom board image, follow these steps.
-	* Download the [Vitis AI Runtime 1.3.1](https://www.xilinx.com/bin/public/openDownload?filename=vitis-ai-runtime-1.3.1.tar.gz).  	
+	* Download the [Vitis AI Runtime 1.3.2](https://www.xilinx.com/bin/public/openDownload?filename=vitis-ai-runtime-1.3.2.tar.gz).  	
 	* Untar the runtime packet and copy the following folder to the board using scp.
 	```
-	tar -xzvf vitis-ai-runtime-1.3.1.tar.gz
-	scp -r vitis-ai-runtime-1.3.1/aarch64/centos root@IP_OF_BOARD:~/
+	tar -xzvf vitis-ai-runtime-1.3.2.tar.gz
+	scp -r vitis-ai-runtime-1.3.2/aarch64/centos root@IP_OF_BOARD:~/
 	```
 	* Log in to the board using ssh. You can also use the serial port to login.
 	* Install the Vitis AI Runtime. Execute the following command.

tools/Vitis-AI-Library/CMakeLists.txt

@@ -16,7 +16,7 @@
 cmake_minimum_required(VERSION 3.5)
 project(
   vitis_ai_library
-  VERSION 1.3.1
+  VERSION 1.3.2
   LANGUAGES C CXX)
 include(${CMAKE_SOURCE_DIR}/cmake/XilinxCommon.cmake)
 

tools/Vitis-AI-Library/README.md

@@ -119,9 +119,9 @@ source ~/petalinux_sdk/environment-setup-aarch64-xilinx-linux
 ```
 Note that if you close the current terminal, you need to re-execute the above instructions in the new terminal interface.
 
-4. Download the [vitis_ai_2020.2-r1.3.1.tar.gz](https://www.xilinx.com/bin/public/openDownload?filename=vitis_ai_2020.2-r1.3.1.tar.gz) and install it to the petalinux system.
+4. Download the [vitis_ai_2020.2-r1.3.2.tar.gz](https://www.xilinx.com/bin/public/openDownload?filename=vitis_ai_2020.2-r1.3.2.tar.gz) and install it to the petalinux system.
 ```
-tar -xzvf vitis_ai_2020.2-r1.3.1.tar.gz -C ~/petalinux_sdk/sysroots/aarch64-xilinx-linux
+tar -xzvf vitis_ai_2020.2-r1.3.2.tar.gz -C ~/petalinux_sdk/sysroots/aarch64-xilinx-linux
 ```
 
 5. To compile the library sample in the AI Library, take `facedetect` as an example, execute the following command.
@@ -191,20 +191,20 @@ steps.**
 4. (Optional) How to update Vitis AI Runtime and install them separately. 
 
 	If you want to update the Vitis AI Runtime or install them to your custom board image, follow these steps.
-	* Download the [Vitis AI Runtime 1.3.1](https://www.xilinx.com/bin/public/openDownload?filename=vitis-ai-runtime-1.3.1.tar.gz).  
+	* Download the [Vitis AI Runtime 1.3.2](https://www.xilinx.com/bin/public/openDownload?filename=vitis-ai-runtime-1.3.2.tar.gz).  
 
 	* Untar the runtime packet and copy the following folder to the board using scp.
 	```
-	tar -xzvf vitis-ai-runtime-1.3.1.tar.gz
-	scp -r vitis-ai-runtime-1.3.1/aarch64/centos root@IP_OF_BOARD:~/
+	tar -xzvf vitis-ai-runtime-1.3.2.tar.gz
+	scp -r vitis-ai-runtime-1.3.2/aarch64/centos root@IP_OF_BOARD:~/
 	```
 	* Log in to the board using ssh. You can also use the serial port to login.
 	* Install the Vitis AI Runtime. Execute the following command.
 	```
 	cd centos
 	bash setup.sh
 	```
-	Note if you update the VART to 1.3.1 and want to run the sample program, make sure you also use the latest sample code.
+	Note if you update the VART to 1.3.2 and want to run the sample program, make sure you also use the latest sample code.
 
 	 	  
 ### Running Vitis AI Library Examples

tools/Vitis-AI-Runtime/VART/quick_start_for_edge.md

@@ -23,9 +23,9 @@ source ~/petalinux_sdk/environment-setup-aarch64-xilinx-linux
 ```
 Note that if you close the current terminal, you need to re-execute the above instructions in the new terminal interface.
 
-4. Download the [vitis_ai_2020.2-r1.3.1.tar.gz](https://www.xilinx.com/bin/public/openDownload?filename=vitis_ai_2020.2-r1.3.1.tar.gz) and install it to the petalinux system.
+4. Download the [vitis_ai_2020.2-r1.3.2.tar.gz](https://www.xilinx.com/bin/public/openDownload?filename=vitis_ai_2020.2-r1.3.2.tar.gz) and install it to the petalinux system.
 ```
-tar -xzvf vitis_ai_2020.2-r1.3.1.tar.gz -C ~/petalinux_sdk/sysroots/aarch64-xilinx-linux
+tar -xzvf vitis_ai_2020.2-r1.3.2.tar.gz -C ~/petalinux_sdk/sysroots/aarch64-xilinx-linux
 ```
 
 ## Compile the VART 

tools/Vitis-AI-Runtime/VART/vart/CMakeLists.txt

@@ -14,7 +14,7 @@
 # limitations under the License.
 #
 cmake_minimum_required(VERSION 3.12)
-project(vart VERSION 1.3.1 LANGUAGES C CXX)
+project(vart VERSION 1.3.2 LANGUAGES C CXX)
 
 link_directories("$ENV{CONDA_PREFIX}/lib")
 include(${CMAKE_SOURCE_DIR}/cmake/VitisCommon.cmake)

tools/Vitis-AI-Runtime/VART/vart/dpu-controller/src/dpu_controller_dnndk.cpp

@@ -130,20 +130,18 @@ void DpuControllerDnndk::run(size_t core_idx, const uint64_t code,
       ;
   CHECK_EQ(code % 4096u, 0u) << "code  = " << code;
   struct req_kernel_run_t t2;
-  // CHECK_EQ(gen_reg.size(), 2u);
-  auto parameter = gen_reg[0];
-  auto workspace = gen_reg[1];
+  auto size = gen_reg.size();
   memset(&t2, 0, sizeof(t2));
   t2.handle_id = 0u;
   t2.addr_code = (uint32_t)code;
-  t2.addr0 = (uint32_t)parameter;
-  t2.addr1 = (uint32_t)workspace;
-  t2.addr2 = (uint32_t)code;
-  t2.addr3 = 0;
-  t2.addr4 = 0;
-  t2.addr5 = 0;
-  t2.addr6 = 0;
-  t2.addr7 = 0;
+  t2.addr0 = (uint32_t)size >= 1 ? gen_reg[0] : 0;
+  t2.addr1 = (uint32_t)size >= 2 ? gen_reg[1] : 0;
+  t2.addr2 = (uint32_t)size >= 3 ? gen_reg[2] : 0;
+  t2.addr3 = (uint32_t)size >= 4 ? gen_reg[3] : 0;
+  t2.addr4 = (uint32_t)size >= 5 ? gen_reg[4] : 0;
+  t2.addr5 = (uint32_t)size >= 6 ? gen_reg[5] : 0;
+  t2.addr6 = (uint32_t)size >= 7 ? gen_reg[6] : 0;
+  t2.addr7 = (uint32_t)size >= 8 ? gen_reg[7] : 0;
   auto retval = ioctl(fd_, REQ_DPU_RUN, (void*)(&t2));
 
   CHECK_EQ(retval, 0) << "run dpu failed.";

tools/Vitis-AI-Runtime/VART/vart/dpu-runner/src/imp/dpu_runner_ddr.cpp

@@ -204,29 +204,21 @@ void DpuRunnerDdr::fill_gen_reg(size_t device_core_id,
     auto reg_id = get_reg_id(reg->get_tensor());
     CHECK(reg_id >= 0 && reg_id < 16) << "reg_id = " << reg_id;
     int ddr_addr = get_ddr_addr(reg->get_tensor());
-
-    for (auto batch_idx = 0; batch_idx < num_of_batch; ++batch_idx) {
-      auto idx2 = std::min(batch_idx, reg->get_tensor()->get_shape()[0] - 1);
-      dim_idx[0] = idx2;
+    for (auto batch_idx = 0; batch_idx < num_of_batch && 
+         batch_idx <= (reg->get_tensor()->get_shape()[0] - 1); ++batch_idx) {
+      dim_idx[0] = batch_idx;
       uint64_t base;
       size_t size;
       std::tie(base, size) = reg->data_phy(dim_idx);
       CHECK_NE(size, 0u);
-      // move get_ddr_addr() out of this loop to improve perf;
-      // int ddr_addr = get_ddr_addr(reg->get_tensor());
+      //move get_ddr_addr() out of this loop to improve perf;
+      //int ddr_addr = get_ddr_addr(reg->get_tensor());
       base = base - ddr_addr;
       auto reg_idx = batch_idx * num_of_regs + reg_id;
       LOG_IF(INFO, ENV_PARAM(DEBUG_DPU_RUNNER) >= 2)
-          << "set base reg: " << reg_idx                            //
-          << " num_of_regs: " << num_of_regs                        //
-          << " reg_id: " << reg_id                                  //
-          << " batch_idx: " << batch_idx                            //
-          << " num_of_batch " << num_of_batch                       //
-          << " / " << (reg->get_tensor()->get_shape()[0] - 1)       //
-          << " base = " << std::hex << "0x" << base << std::dec     //
-          << " ddr = " << std::hex << "0x" << ddr_addr << std::dec  //
-          << " tensor " << reg->get_tensor()->to_string()           //
-          ;
+          << "set base reg: " << reg_idx  //
+          << "base = " << std::hex << "0x" << base << std::dec
+          << "ddr = " << std::hex << "0x" << ddr_addr << std::dec;
       gen_reg[reg_idx] = base;
     }
   }