diff --git a/README.md b/README.md index 9ea8380..3b9f127 100644 --- a/README.md +++ b/README.md @@ -2,7 +2,14 @@ BSV 中文教程 =========================== 欢迎 :hand: 这里(可能)是首个中文 Bluespec SystemVerilog (BSV) 教程。 -# 1 前言 +![图1](./readme_image/0.bluespec.png) + +同步更新至： + +- GitHub : https://github.com/WangXuan95/BSV_Tutorial_cn +- Gitee : https://gitee.com/wangxuan95/BSV_Tutorial_cn + +# 1 前言 ## 1.1 为什么要 BSV？Verilog 不好用？ BSV 是一门高级硬件描述语言（**H**igh-**L**evel **H**ardware **D**escription **L**anguage, **HL-HDL**），与 Verilog 一样，被用于 FPGA 或 ASIC 的前端设计和验证。BSV 于 2003 年被 Bluespec :tm: 开发，期间一直作为商业收费 :moneybag: 工具而存在，到 2020 年它的编译器才开源，这才给了我们接触它的机会。 @@ -12,12 +19,12 @@ Verilog 的语法简单、特性少，却能全面且精准的描述绝大多数 > :pushpin: 在笔者看来 BSV 并不能替代 Verilog ——至少现在不能。同样，HLS、SpinalHDL、Chisel 也无法撼动 Verilog 的地位。这就像各种高级语言也没有替代 C 语言一样。一些说法把 Verilog/VHDL 在数字逻辑设计中的地位，比作汇编语言在程序设计中的地位，笔者认为该说法具有误导性。Verilog/VHDL 所在的抽象层次恰到好处，且是通用（跨平台）的——支持各厂家的FPGA和ASIC，因此成为了数字逻辑设计的主流语言，这与 C 语言的理念类似，应当比作 C 语言。 > -## 1.2 关于本教程 +## 1.2 关于本教程 在开始前，读者要有如下基础： - 熟悉 Verilog/VHDL ，熟悉数字电路设计，比如状态机、流水线、握手信号、串并转换、单口RAM、双口RAM等知识。 -- 起码要知道软件编程语言中的基本概念：包括类型、分支、循环、数组、函数。 +- 起码要知道软件编程语言中的基本概念：数据类型、分支、循环、数组、函数。 另外，如果有以下知识，学起来会更轻松： @@ -26,26 +33,26 @@ Verilog 的语法简单、特性少，却能全面且精准的描述绝大多数 本教程参考了 《BSV by example》 [1] 这篇很棒的官方教程。但也有很大不同： -* 本教程不是翻译自 [1] 的，符合中文语法习惯，直译原文则会很生硬。 * 本教程基于开源的 BSV 编译器 bsc，会带读者在命令行中使用编译器。 +* 本教程不是直译自 [1]，而是根据其大纲而重构的，符合中文语法习惯，直译原文则会很生硬。 * 本教程根据自己的理解，对 [1] 的内容进行删减和重排序。 * 本教程会讲述一些 [1] 中没有讲，但也很实用的内容，它们来自于内容更全的 BSV 参考指南 [2] 。 -* 本教程的配套代码都是原创，还展示了3个大型项目—— SPIFlash 读写器、RISC-V 流水线 CPU、JPEG 图像压缩器。 +* 本教程在讲解中配套了很多有实际意义的代码，还展示了3个大型项目：SPIFlash读写器、RISC-V流水线CPU、JPEG图像压缩器。 * 作为实用教程，笔者将讲述 BSV 生成的 Verilog 模块的特性，指导读者把它嵌入 Verilog 项目中。 笔者也是 BSV 初学者，完全凭借对数字逻辑设计的热爱~~用爱发电~~编写了本教程。出现不准确的表述也在所难免，可以提 issue 让笔者改进。 -## 1.3 参考资料 +## 1.3 参考资料 [1] R. Nikhil and K. Czeck. BSV by Example: The next-generation language for electronic system design. Bluespec, Inc. 2010. http://csg.csail.mit.edu/6.S078/6_S078_2012_www/resources/bsv_by_example.pdf. [2] Bluespec SystemVerilog Reference Guide. Bluespec, Inc. 2017. https://web.ece.ucsb.edu/its/bluespec/doc/BSV/reference-guide.pdf. -- 是 BSV 最全的官方资料，阅读完本教程后，可作为查阅文档。 +- [2] 是内容最全 BSV 的官方资料，可作为查阅文档。 -## 1.4 目录 :page_with_curl: +## 目录 :page_with_curl: - [2 BSV概览](#head6) - [2.1 BSV vs. Verilog](#head7) @@ -74,7 +81,6 @@ Verilog 的语法简单、特性少，却能全面且精准的描述绝大多数 - [5.8 Maybe 类型](#head46) - [6 时序逻辑电路](#head47) - [6.1 寄存器 Reg](#head48) - - [e.g. 开平方计算流水线 v1](#head51) - [6.2 读写顺序与调度注解](#head52) - [6.3 线网 Wire](#head53) - [6.4 规则 rule](#head59) @@ -83,7 +89,10 @@ Verilog 的语法简单、特性少，却能全面且精准的描述绝大多数 - [7 模块与接口](#head76) - [7.1 模块层次结构](#head77) - [7.2 值方法与动作方法](#head80) + - [e.g. 比特编码器 v1](#head83) - [7.3 方法的隐式条件](#head84) + - [e.g. 比特编码器 v2](#head86) + - [e.g. 比特编码器 v3](#head88) - [7.4 动作值方法](#head89) - [e.g. 比特编码器 v4](#head90) - [7.5 方法实现的简写](#head91) @@ -98,7 +107,6 @@ Verilog 的语法简单、特性少，却能全面且精准的描述绝大多数 - [8 存储与队列](#head100) - [8.1 BRAMCore](#head101) - [8.2 BRAM](#head106) - - [e.g. 矩阵转置](#head113) - [8.3 队列 FIFO 概览](#head114) - [8.4 常规 FIFO](#head115) - [e.g. 开平方计算流水线 v2](#head118) @@ -121,6 +129,8 @@ Verilog 的语法简单、特性少，却能全面且精准的描述绝大多数 - [10.1 多态中的基本概念](#head143) - [10.2 多态函数举例](#head148) - [10.3 多态模块举例](#head149) + - [e.g. 自定义更多的寄存器](#head150) + - [e.g. 自定义双缓冲模块](#head151) - [11 状态机 StmtFSM](#head152) - [11.1 基本的构建和使用方法](#head153) - [11.2 执行结构](#head156) @@ -163,31 +173,31 @@ reg [7:0] rdata = 0; assign rdy = (cnt==0) ? 1 : 0; always @ (posedge clk or negedge rstn) - if(!rstn) begin - {ss, sck, mosi} <= 3’b111; - end else begin - if(cnt==0) begin - if(en) begin - rdata <= data; - cnt <= 1; - end - end else if(cnt==1) begin - ss <= 1’b0; // ss 拉低 - cnt <= cnt + 1; - end else if(cnt<=17) begin - sck <= cnt[0]; // cnt 为偶数时，令 sck=0，cnt 为奇数时，令 sck=1。 - mosi <= rdata[8-(cnt/2)]; // 在 mosi 上产生串行输出 - cnt <= cnt + 1; - end else if(cnt==18) begin - mosi <= 1’b1; - cnt <= cnt + 1; - end else if(cnt==19) begin - ss <= 1’b1; // ss 拉高 - cnt <= cnt + 1; - end else begin - cnt <= 0; - end - end + if(!rstn) begin + {ss, sck, mosi} <= 3’b111; + end else begin + if(cnt==0) begin + if(en) begin + rdata <= data; + cnt <= 1; + end + end else if(cnt==1) begin + ss <= 1’b0; // ss 拉低 + cnt <= cnt + 1; + end else if(cnt<=17) begin + sck <= cnt[0]; // cnt 为偶数时，令 sck=0，cnt 为奇数时，令 sck=1。 + mosi <= rdata[8-(cnt/2)]; // 在 mosi 上产生串行输出 + cnt <= cnt + 1; + end else if(cnt==18) begin + mosi <= 1’b1; + cnt <= cnt + 1; + end else if(cnt==19) begin + ss <= 1’b1; // ss 拉高 + cnt <= cnt + 1; + end else begin + cnt <= 0; + end + end ``` 以上 Verilog 代码已经是一个很简短的实现了，但可读性很差，难于修改，如果我们想在 `ss` 拉低之前再插入一个时钟周期干其它的事情，则后面的所有状态转移以及 `2≤cnt≤17` 时的奇偶判断都得改，容易改出 bug。 @@ -198,21 +208,21 @@ always @ (posedge clk or negedge rstn) // Verilog SPI 发送（testbench 写法，不可综合！！） reg signed [31:0] cnt = 7; // cnt 初始值为 7 initial begin - {ss, sck, mosi} <= 3’b111; - @(posedge clk) // 等到下一个时钟上升沿 - ss <= 1’b0; // ss 拉低 - while(cnt>=0) begin // while 循环，cnt 从 7 递减到 0，共8次 - @(posedge clk) begin // 等到下一个时钟上升沿 - sck <= 1’b0; // sck 拉低 - mosi <= wdata[cnt]; // mosi 依次产生串行 bit - end - @(posedge clk) begin // 等到下一个时钟上升沿 - sck <= 1’b1; // sck 拉高 - cnt = cnt - 1; // cnt 每次循环都递减 - end - end - @(posedge clk) mosi <= 1’b1; // mosi 拉高 - @(posedge clk) ss <= 1’b1; // ss 拉高，发送结束 + {ss, sck, mosi} <= 3’b111; + @(posedge clk) // 等到下一个时钟上升沿 + ss <= 1’b0; // ss 拉低 + while(cnt>=0) begin // while 循环，cnt 从 7 递减到 0，共8次 + @(posedge clk) begin // 等到下一个时钟上升沿 + sck <= 1’b0; // sck 拉低 + mosi <= wdata[cnt]; // mosi 依次产生串行 bit + end + @(posedge clk) begin // 等到下一个时钟上升沿 + sck <= 1’b1; // sck 拉高 + cnt = cnt - 1; // cnt 每次循环都递减 + end + end + @(posedge clk) mosi <= 1’b1; // mosi 拉高 + @(posedge clk) ss <= 1’b1; // ss 拉高，发送结束 end ``` @@ -261,17 +271,17 @@ endmodule 最后，你还会注意到这个 BSV 代码中看不出模块输入输出信号的定义。因为 BSV 将它们封装成了**方法** (method)。以上述代码中的方法`method Action write` 为例，当外部需要启动 SPI 发送时就调用此方法。参数 `Bit#(8) data` 是待发送的字节，会映射为 Verilog 中的一个 8 位的输入信号，而握手信号 en 和 rdy 会自动生成（如下 :point_down: ）。当 `spiFsm` 状态机正忙（即正在发送SPI时）时，对 `method Action write` 的调用将无法生效；用 Verilog 的思维来讲：此时 `rdy=0`，即使 `en=1` 也无法发送数据。 -```verilog +```bsv // 用 BSV 编译器把 BSV 模块转化为 Verilog 后的接口定义 module mkSPIWriter( // 这些注释是笔者加上的 - input CLK, // 自动生成的时钟 - input RST_N, // 自动生成的复位 + input CLK, // 自动生成的时钟 + input RST_N, // 自动生成的复位 // 由 method Action write(Bit#(8) data) 生成的信号 input [7:0] write_data, // 对应波形图1中的 data 信号 - input EN_write, // 对应波形图1中的 en 信号（是自动生成的握手信号） - output RDY_write, // 对应波形图1中的 rdy 信号（是自动生成的握手信号） + input EN_write, // 对应波形图1中的 en 信号（是自动生成的握手信号） + output RDY_write, // 对应波形图1中的 rdy 信号（是自动生成的握手信号） // 由 method Bit#(3) spi 生成的信号 - output [2:0] spi, // 3bit 分别对应 ss,sck,mosi 信号 + output [2:0] spi, // 3bit 分别对应 ss,sck,mosi 信号 ); ``` @@ -323,8 +333,9 @@ Chisel 和 SpinalHDL 也可以归类为高级硬件描述语言（HL-HDL）。 * Linux 实体机 :computer: * Linux 虚拟机 * Windows10 bash (**W**indows **S**ubsystem of **L**inux, **WSL**)，强烈推荐 :raised_hands: ！！WSL 的开启方法可以参考： -* Install WSL：https://docs.microsoft.com/en-us/windows/wsl/install -* win10开启wsl，让我们愉快的使用Linux：https://zhuanlan.zhihu.com/p/384026893 + * Install WSL：https://docs.microsoft.com/en-us/windows/wsl/install + * win10开启wsl，让我们愉快的使用Linux：https://zhuanlan.zhihu.com/p/384026893 + > :point_right: 提示：开启 WSL 后，在 Windows 的某个目录（文件夹）下打开 WSL 命令行的方式是：在”文件资源管理器“空白处摁住shift+右键 → ”在此处打开 PowerShell 窗口“ → 在 PowerShell 中输入 wsl + 回车 → 即可进入 Linux 环境。 @@ -601,7 +612,7 @@ endmodule module mkTb (); // 模块名 mkTb ，调用者 DecCounter counter <- mkDecCounter; // 例化一个 mkDecCounter，并拿到它的接口，叫做 counter - + // counter.count ... // 通过接口名 counter 来调用子模块，比如调用 count 方法 endmodule ``` @@ -810,7 +821,7 @@ bit a = 'b1; // 等效于 Bit#(1) a = 'b1 `Bit#(8)` 类似 Verilog 中的 `wire [7:0]` ，不同之处在于：Verilog 的位宽检查很宽松，允许隐式的高位截断和扩展（虽然会报编译时 Warning），而 Verilog 的显式的截断和扩展写起来很不优雅： -```verilog +```bsv // 这是 Verilog !! 不是 BSV !! wire [ 6:0] t1 = 7'h12; wire [11:0] t2 = t1; // 隐式零扩展，会报编译时 Warning @@ -831,7 +842,7 @@ Bit#(4) t5 = truncate(t1); // 显式截断，自动根据左值（4位）判 > :pushpin: 后续我们会学到 Bit#(n) 是一个多态类型（泛型），而 Bit#(7) 和 Bit#(4) 完全不是一种数据类型，这也解释了为什么 BSV 必须进行显式截断和扩展。 -用常数对 `Bit#(n)` 类型的变量进行赋值时，和 Verilog 类似，可以用二进制、十进制或十六进制表示常数，举例如下 :point_down: +用常数对 `Bit#(n)` 类型的变量进行赋值时，和 Verilog 类似，可以用二进制、十进制或十六进制表示常数，举例如下 :point_down: ```bsv Bit#(7) t1 = 7'b0010111; // 二进制，位宽匹配 @@ -939,7 +950,7 @@ module mkTb(); Int#(8) i1 = unpack(pack(u1)); //把u1转换成有符号数i1，会得到十进制的 -5 $display("%d", u1 > 2); //无符号比较，打印 1，显然 250 > 2 成立 $display("%d", i1 > 2); //有符号比较，打印 0，显然 -5 > 2 不成立 - + UInt#(16) u2 = extend(u1); //u1零扩展 Int#(16) i2 = extend(i1); //i1符号扩展 $display("u2=%x", u2); //打印 u2=00fa, 因为 fa 零扩展得到 00fa @@ -955,7 +966,7 @@ endmodule `Bool` 类型只有两种取值：`True` 和 `False` 。 -虽然 `Bool` 底层是用 1 比特实现的，但 `Bool` 类型与 `bit` 类型不能混淆，它们之间可以用 `pack` 和 `unpack` 互相转化。 +虽然 `Bool` 底层是用 1 比特实现的，但 `Bool` 类型与 `bit` 类型不能混淆，它们之间可以用 `pack` 和 `unpack` 互相转化。 ```bsv Bool b1 = True; @@ -1067,7 +1078,7 @@ $display("a=%d b=%3d c=%08x d=%x e=%b", a, b, c, d, e ); ### 变量定义 -变量定义的格式是： +变量定义的格式是： ``` 类型名 变量名; @@ -1099,10 +1110,10 @@ BSV 有两种赋值符号： - 值赋值 (`=`) ：左边的变量（左值）被绑定到右边的值（右值），成为右值的一个副本。 - 副作用赋值 (`<-`) ：右值会引起副作用，包括实例化了一个硬件实体、或引起了硬件状态（寄存器、触发器）的变化。例如： + - 实例化了一个模块并用 `<-` 获得其接口； -- 实例化了一个模块并用 `<-` 获得其接口； + - 调用一个动作值方法 (ActionValue method) 并用 `<-` 获得其返回值（后续7.4节会细讲）。 -- 调用一个动作值方法 (ActionValue method) 并用 `<-` 获得其返回值（后续7.4节会细讲）。 在 5.2 节的各种例子里，我们一直用的是值赋值 (`=`) ，因为它仅仅是把表达式的值赋给了左值，没有实例化硬件实体，也没有引起硬件状态变化。 @@ -1112,10 +1123,10 @@ BSV 有两种赋值符号： module mkTb(); Reg#(int) ra <- mkReg(0); // 1. 定义一个 Reg#(int) 类型的接口变量 ra 。 // mkReg(0) 实例化一个初值=0的寄存器，ra 拿到了该寄存器的接口 - + Reg#(int) rb = ra; // 2. 定义一个 Reg#(int) 类型的接口变量 rb 。 // 并没有实例化寄存器，而是让 rb 成为 ra 的别名 - + Reg#(int) rc <- mkReg(0); // 3. 定义一个 Reg#(int) 类型的接口变量 rc 。 // mkReg(0) 实例化一个初值=0的寄存器，rc 拿到了该寄存器的接口 @@ -1185,7 +1196,7 @@ module mkTb (); let sub <- mkSub; // 可以用 let // mkSub 一定会获得 Sub 类的接口，无歧义 // 等效于 Sub sub <- mkSub; - + // let ra <- mkReg(0); // 不能用 let !!! // 不知道 mkReg 会获得 Reg#(int) 还是 Reg#(bit) 还是 Reg#(UInt#(8)) 之类的接口 // 这里要用完整类型名，比如 Reg#(bit) <- mkReg(0); @@ -1336,14 +1347,14 @@ module mkTb (); function Bit#(6) binary2gray(Bit#(6) value); // 输入参数：Bit#(6) ，返回 Bit#(6) return (value >> 1) ^ value; endfunction - + // 函数：把格雷码转化为二进制编码 function Bit#(6) gray2binary(Bit#(6) value); // 输入参数：Bit#(6) ，返回 Bit#(6) for(int i=4; i>=0; i=i-1) value[i] = value[i] ^ value[i+1]; return value; endfunction - + //... ``` @@ -1376,7 +1387,7 @@ import GrayCode_v5::*; ## 5.7 元组 Tuple -元组相关的代码见 `src/5.TupleTest/TupleTest.bsv` +元组相关的代码见 `src/5.TupleTest/TupleTest.bsv` 元组是把多个类型的变量放在一起的复合数据类型， BSV 预定义了二元组、三元组、四元组、……、八元组。 @@ -1446,12 +1457,13 @@ Maybe#(Int#(9)) value2 = tagged Valid 42; // 有效，取值为 42 BSV 针对 `Maybe#(td)` 类型提供了两个函数： - `isValid(x)` : 接受 `Maybe#(td)` 类型的变量 `x` 作为参数： -- `x` 无效则返回 False -- `x` 有效则返回 True + - `x` 无效则返回 False + - `x` 有效则返回 True - `fromMaybe(dv, x)` : 接受 `td` 类型的变量 `dv` 和 `Maybe#(td)` 类型的变量 `x` 作为参数： -- `x` 无效则返回 `dv` -- `x` 有效则返回 `x` 中的取值。 + - `x` 无效则返回 `dv` + - `x` 有效则返回 `x` 中的取值。 + 使用例： @@ -1475,7 +1487,7 @@ let d2 = fromMaybe(-99, value2); // 得到 d2 是 Int#(9) 类型的 42 寄存器是一类用于保存数据（或者叫保存电路状态）的模块。本节涉及： -- 接口`Reg#()` 以及其配套的模块 `mkReg` 、 `mkRegU` 、 `mkDReg` +- 接口`Reg#()` 以及其配套的模块 `mkReg` 、 `mkRegU` 、 `mkDReg` ### mkReg 和 mkRegU @@ -1512,12 +1524,12 @@ module mkReg#(td v) (Reg#(td)) // 第一个括号里是模块参数，是一个 ```bsv module mkTb (); Reg#(int) x <- mkReg(23); - + rule up_counter; // rule 每时钟周期都会执行一次 x._write( x._read + 1 ); // 寄存器的x的值先读出来，+1后再写回去 $display ("x=%d", x._read ); endrule - + rule done (x >= 26); // 只有满足条件 x >= 26 的时钟周期才会执行退出 $finish; endrule @@ -1562,7 +1574,7 @@ module mkTb (); cnt <= cnt + 1; if(cnt > 9) $finish; endrule - + Reg#(int) reg1 <- mkReg(99); // reg1 初值 = 99 Reg#(int) reg2 <- mkDReg(99); // reg2 默认值 = 99 @@ -1603,10 +1615,10 @@ cnt=10 reg1=-9 reg2=-9 ```python # Python 实现整数开方 -#实现的效果： y = sqrt(x) +# 效果： y = sqrt(x) x = 114514 # 输入数据 y = 0 # 待计算的开方结果 -for n in range(15, -1, -1): # 迭代 16 次，迭代变量 n=15,14,13,...,2,1,0 +for n in range(15, -1, -1): # 迭代 16 次，迭代变量 n=15,14,13,...,2,1,0 t = (y<<1<= t: # 迭代体 x -= t # 迭代体 @@ -1843,7 +1855,7 @@ endinterface 以下语句实例化一个 `mkDWire` ，其中的数据类型是 `int`，指定它的默认值是 `42` ： -```bsv +``` Wire#(int) <- mkDWire(42); ``` @@ -1862,7 +1874,7 @@ module mkTb (); Wire#(int) w1 <- mkDWire(99); // w1 默认值 = 99 Reg#(int) r1 <- mkReg(99); // r1 初始值 = 99 - + rule test1 (cnt%2 == 0); // rule条件：只在能整除2的周期激活 w1 <= cnt; endrule @@ -1927,7 +1939,7 @@ module mkTb (); Wire#(int) w1 <- mkWire; Wire#(int) w2 <- mkWire; - + rule test1 (cnt%2 == 0); // rule条件：只在能整除2的周期激活 $display("cnt=%1d test1", cnt); w1 <= cnt; @@ -2039,7 +2051,7 @@ module mkTb (); RWire#(int) w1 <- mkRWire; // w1 是个 RWire PulseWire w2 <- mkPulseWire; // w2 是个 PulseWire - + rule test1 (cnt%2 == 0); // rule条件：只在能整除2的周期激活 w1.wset(cnt); endrule @@ -2253,7 +2265,7 @@ r1 endrule ``` -编译器会分析以上代码： +编译器会分析以上代码： - 如果把 `x2y` 排在 `y2x` 前面，则不能满足 y.\_read **SB** y.\_write - 如果把 `y2x` 排在 `x2y` 前面，则不能满足 x.\_read **SB** x.\_write @@ -2378,7 +2390,7 @@ module mkTb (); Reg#(int) y <- mkReg(2); (* descending_urgency = "y2x, x2y" *) - rule x2y; + rule x2y; y <= x + 1; // 读 x，写 y endrule rule y2x (cnt<3); // 显式条件 cnt<3 @@ -2392,7 +2404,7 @@ endmodule 编译时，不再报任何 Warning ，因为 `y2x` 只在 `cnt<3` 时激活，而 `x2y` 会在 `y2x` 不激活时激活。 -仿真打印如下 ，显然，在 `cnt<3` 时，执行的是 `x<=y+1;` ，在 `cnt>=3` 时，执行的是 `y<=x+1;` +仿真打印如下 ，显然，在 `cnt<3` 时，执行的是 `x<=y+1;` ，在 `cnt>=3` 时，执行的是 `y<=x+1;` ``` cnt=0 x=1 y=2 @@ -2425,7 +2437,7 @@ module mkTb (); (* descending_urgency = "y2x, x2y" *) - rule x2y; + rule x2y; y <= x + 1; // 读 x，写 y endrule rule y2x; @@ -2477,10 +2489,10 @@ cnt=6 x=4 y=5 // 代码路径：src/9.RuleUrgency/Test4.bsv (部分) (* descending_urgency = "y2x, x2y" *) - rule x2y; + rule x2y; y <= x + 1; // 读 x，写 y endrule - + rule y2x; if(cnt < 3) // if 语句 cnt<3 x <= y + 1; // 读 y，写 x @@ -2520,7 +2532,7 @@ Warning: "Test5.bsv", line 16, column 9: (G0021) // 代码路径：src/10.RuleNoConflict/MutuallyExclusive.bsv (部分) Reg#(Bit#(32)) cnt <- mkReg(1); // cnt 初始值 = 'b0001 rule shift_counter; - cnt <= cnt << 1; // cnt 每周期左移1 ，这样 cnt 的变化规律是 'b0001 -> 'b0010 -> 'b0100 + cnt <= cnt << 1; // cnt 每周期左移1 ，这样 cnt 的变化规律是 'b0001 -> 'b0010 -> 'b0100 if(cnt > 10) $finish; endrule @@ -2600,7 +2612,7 @@ Warning: "MutuallyExclusive.bsv", line 3, column 8: (G0010) 以上代码中，规则 `test1` 和 `test2` 在每周期都激活，但因为 if 语句的条件互斥，它们中会引起**排序冲突**的语句不会同时执行。假设我们希望的结果是： -- `cnt<3` 时能执行 `x<=x+1;` ， `cnt>3` 时能执行 `x<=x-1;` +- `cnt<3` 时能执行 `x<=x+1;` ， `cnt>3` 时能执行 `x<=x-1;` - 所有周期都能执行 `y<=y+1;` - 所有周期都能执行 `z<=z+2;` @@ -2724,7 +2736,7 @@ x=2 y=6 z=12 ```bsv (* preempts = "(r1, r2), r3" *) -// 等效于 (* preempts = "r1, r3" *) +// 等效于 (* preempts = "r1, r3" *) // (* preempts = "r2, r3" *) ``` @@ -2926,7 +2938,7 @@ module mkTb (); cnt <= cnt + 1; if(cnt > 32) $finish; endrule - + Reg#(int) creg [3] <- mkCReg(3, 0); rule rule_test5 (cnt%5 == 0); // 每5周期执行一次 @@ -2947,7 +2959,7 @@ module mkTb (); endmodule ``` -仿真打印如下 :point_down: +仿真打印如下 :point_down: ``` cnt=23 creg= 0 @@ -2965,14 +2977,14 @@ cnt=33 creg=10 可以看到，在 `cnt=24` 的周期，`creg` 增加了 `2` （下一周期才能读到），这是因为 `rule_test3` 和 `rule_test2` 都执行了，相当于该周期执行了两次 `+1`： -```bsv +``` creg[1] <= creg[1] + 1; creg[2] <= creg[2] + 1; ``` 同理，在 `cnt=30` 的周期，`creg` 增加了 `3`，因为相当于执行了三次 `+1` ： -```bsv +``` creg[0] <= creg[0] + 1; creg[1] <= creg[1] + 1; creg[2] <= creg[2] + 1; @@ -2980,7 +2992,7 @@ creg[2] <= creg[2] + 1; :pushpin: 注意：因为 `$display("cnt=%2d creg0=%2d", cnt, creg[0]);` 打印的是 `creg[0]` ，所以只能读到上周期得到的最终值。如果想读到 `creg` 本周期更新后的最新值，可以再多加一个接口： -```bsv +``` Reg#(int) creg [4] <- mkCReg(4, 0); ``` @@ -2995,7 +3007,7 @@ module mkTb (); cnt <= cnt + 1; if(cnt > 32) $finish; endrule - + Reg#(int) creg [4] <- mkCReg(4, 0); // 修改!!：新增一个接口 rule rule_test5 (cnt%5 == 0); // 每5周期执行一次 @@ -3052,7 +3064,7 @@ cnt=33 creg=11 - `mkM1` 被实例化了2次，一次是在 `mkM3` 种，一次是在 `mkM2` 中。 - 尽管 `mkM3` 的接口是 Empty ，但它仍然能被 `mkTop` 实例化。 -- 顶层模块名是 `mkTop` ，但是没有任何模块调用它。当进行仿真时，用命令 `bsvbuild.sh -bs mkTop mkTop.bsv` 相当于指定了 `mkTop` 作为顶层模块，那么它在仿真中的实例名就是默认的 `Top` +- 顶层模块名是 `mkTop` ，但是没有任何模块调用它。当进行仿真时，用命令 `bsvbuild.sh -bs mkTop mkTop.bsv` 相当于指定了 `mkTop` 作为顶层模块，那么它在仿真中的实例名就是默认的 `Top` | ![图6](./readme_image/6.module_hierarchy.png) | | :-----------------------------------------: | @@ -3191,10 +3203,12 @@ endmethod - **输入码**：每周期可输入 8bit 数据 din ，或者也可以选择不输入（空闲）。 - 计算**长度码**：寻找 din 左起第一个 =1 的 bit ，用该 bit 所在的下标作为长度码 len。存在一种特例： -- 当 din=8'h0 时，len=3'd0 + - 当 din=8'h0 时，len=3'd0 + - 计算**数据码**：取输入数据的低 len 个 bit 作为数据码 trim 。存在两种特例： -- 当 din=8'h0 时，trim=1'b0 -- 当 din=8'h1 时，trim=1'b1 + - 当 din=8'h0 时，trim=1'b0 + - 当 din=8'h1 时，trim=1'b1 + - 拼接**生成码**：令 trim 在高位，len 在低位，进行拼接，得到生成码 code - 更新**遗留码**，产生**输出数据**：把 code 拼接在上一周期的遗留码 drem 上，拼接后如果长度 >=16 ，就把低 16bit 作为输出码 dout 输出，drem 则删去这低 16bit 。 @@ -3238,7 +3252,7 @@ function Tuple2#(Bit#(10), UInt#(4)) getCode(Bit#(8) din); for(UInt#(4) i=0; i<8; i=i+1) if(din[i] == 1) len = i; - + // 计算数据码 trim 的长度 UInt#(4) trim_len = len>0 ? len : 1; @@ -3260,7 +3274,7 @@ endfunction module mkBitCoder (BitCoder); // 流水线第一级产生的数据，默认 code 和 code 的长度都是 0 Reg#(Tuple2#(Bit#(10), UInt#(4))) in_code_and_len <- mkDReg( tuple2(0,0) ); // code 和 code 的长度 - + // 流水线第二级产生的数据 Reg#(Bit#(31)) drem <- mkReg(0); // 存放遗留码 Reg#(UInt#(5)) drem_len <- mkReg(0); // 遗留码的长度 @@ -3269,7 +3283,7 @@ module mkBitCoder (BitCoder); // 流水线第二级：更新遗留数据和输出数据 rule get_drem_and_dout; - match {.code, .code_len} = in_code_and_len; // 当流水线上一级没有数据时，mkDReg 默认读到 0 + match {.code, .code_len} = in_code_and_len; // 当流水线上一级没有数据时，mkDReg 默认读到 0 // 不会对本 rule 造成副作用 Bit#(31) data = (extend(code) << drem_len) | drem; // data = code 拼接 drem @@ -3301,7 +3315,7 @@ endmodule - 流水线第一级实现在 `put` 方法中，负责调用 `getCode` 函数计算 code 和 code 的长度。 - 流水线第一级使用名为 `in_code_and_len` 、默认值为 `tuple2(0,0)` 的 `mkDReg` 向第二级传递一项数据，只有当 `put` 方法执行的下一个周期， `in_code_and_len` 才能读到非零的 code 和 code 的长度。 - 流水线第二级使用名为 `dout_valid` 、默认值为 `False` 的 `mkDReg` 传递输出有效信号，只有当有足够的 16bit 需要输出时，才让 `dout_valid=True` 。 -- 输出级，用 `get_valid` 方法引出 `dout_valid` 的值；用 `get` 方法引出 `dout` 的值。 +- 输出级用 `get_valid` 方法引出 `dout_valid` 的值；用 `get` 方法引出 `dout` 的值。 最后，编写 testbench （测试程序）如下 :point_down: ，它实例化了模块 `mkBitCoder` ，实例名为 `coder` 。它调用 `coder.put` 方法依次输入 `8'h0` \~ `8'hFF` ，一共输入两轮。并在 `coder.get_valid = True` 时打印 `coder.get` 方法的值。 @@ -3420,7 +3434,7 @@ endmodule ``` |-----------------------| |--------------------------| | | (传递10bit) | drem容量：31bit | -put--->| 如果put，最多产生10bit |------------->| 当前含有 drem_len 个 bit |---> dout +put--->| 如果put，最多产生10bit |------------->| 当前含有 drem_len 个 bit |---> dout | | | | (可输出8bit) |-----------------------| |--------------------------| 流水线第一级 流水线第二级 @@ -3481,7 +3495,7 @@ module mkBitCoder (BitCoder); // 流水线第一级产生的数据，默认 code 和 code 的长度都是 0 Reg#(Tuple2#(Bit#(10), UInt#(4))) in_code_and_len <- mkReg( tuple2(0,0) ); // code 和 code 的长度 Reg#(Bool) din_valid <- mkReg(False); // 指示 in_code_and_len 是否有效 - + // 流水线第二级产生的数据 Reg#(Bit#(31)) drem <- mkReg(0); // 存放遗留码 Reg#(UInt#(6)) drem_len <- mkReg(0); // 遗留码的长度 @@ -3516,7 +3530,7 @@ module mkBitCoder (BitCoder); // 流水线第一级：获取 code 以及其长度 method Action put(Bit#(8) din) if(!din_valid); // 隐式条件保证下一周期 drem 的长度不会溢出 - din_valid <= True; + din_valid <= True; in_code_and_len <= getCode(din); // 计算 code 和 code 的长度 endmethod @@ -3531,7 +3545,7 @@ endmodule 这里使用了一种很具有 BSV 特色的写法——在方法 `put` 和规则 `get_drem_and_dout` 里都写了寄存器 `din_valid` 。虽然二者能同时激活，但由于发生冲突的语句在 if 条件的控制下并不会在同一周期执行，所以用 `conflict_free` 调度属性来避免它们之间的激活抑制： -```bsv +``` (* conflict_free = "put, get_drem_and_dout" *) ``` @@ -3664,9 +3678,9 @@ endmodule 我们知道接口 `Reg#(int)` 有两个方法： -- `method Action _write(int x)` +- `method Action _write(int x)` -- `method int _read` +- `method int _read` 我们本可以直接用上一节的写法实现它们： @@ -3772,7 +3786,7 @@ endmodule // 代码路径：src/14.IncreaseReg/IncreaseRegCfg_v2.bsv （部分） module mkIncreaseRegCfg ( Tuple2#(Reg#(int), Reg#(int)) ); // 该模块的接口是元组，包括两个 Reg#(int) 接口 Reg#(int) reg_data <- mkReg(0); - Reg#(int) reg_step <- mkReg(1); + Reg#(int) reg_step <- mkReg(1); (* preempts = "fst._write, increase" *) // fst 代表元组第一个元素（也就是自增计数器寄存器的接口） // fst._write 自然就代表自增计数器的 _write 方法。 @@ -3879,10 +3893,10 @@ endinterface BRAMCore 包提供了 `mkBRAMCore1` 模块用来创建单口 RAM， `mkBRAMCore2` 模块用来创建双口 RAM 。它们的定义是： ```bsv -// 单口 RAM +// 单口 RAM module mkBRAMCore1#(Integer memSize, Bool hasOutputRegister) (BRAM_PORT#(addr, data)) -// 双口 RAM +// 双口 RAM module mkBRAMCore2#(Integer memSize, Bool hasOutputRegister) (BRAM_DUAL_PORT#(addr, data)) ``` @@ -3947,7 +3961,7 @@ mkBRAMCore1Load 和 mkBRAMCore2Load 模块在仿真开始时用一个文本文 // 单口 RAM , 载入文件作为初始数据 module mkBRAMCore1Load#(Integer memSize, Bool hasOutputRegister, String file, Bool binary ) (BRAM_PORT#(addr, data)) - + // 双口 RAM ，载入文件作为初始数据 module mkBRAMCore2Load#(Integer memSize, Bool hasOutputRegister, String file, Bool binary ) (BRAM_DUAL_PORT#(addr, data)) @@ -3955,7 +3969,7 @@ module mkBRAMCore2Load#(Integer memSize, Bool hasOutputRegister, String file, Bo 其中 `String file` 是文本文件名字符串，是相对于 .bsv 源码文件所在的路径。例如： -- 文本文件 data.txt 与 .bsv 文件在同一个目录下，那么 `String file` 应该取 `"data.txt"` +- 文本文件 data.txt 与 .bsv 文件在同一个目录下，那么 `String file` 应该取 `"data.txt"` - 文本文件 hello.txt 在 .bsv 文件所在的目录下的 test 目录下，那么 `String file` 应该取 `"test/hello.txt"` `Bool binary=True` 代表文件由二进制数组成。以下是一个二进制文本文件内容的示例，每行一项数据，载入后，每项数据会占用 BRAM 的一个地址。 @@ -4122,9 +4136,11 @@ int rdata <- ram2.portB.response.get; // 动作值方法 BRAM 具有一个读数据和写响应的缓存队列（一般我们不用写响应，所以简称读缓存队列）。每次调用 `request.put` 发起一个读操作，相当于向读缓存压入了一项数据；每次调用 `response.get` 相当于从读缓存中拿出了一项数据。因此： - 只有当缓存不为空时，`response.get` 的隐式条件才满足 -- 换言之，如果不发起 `request.put` 读操作，就不能从 `response.get` 拿到数据 + - 换言之，如果不发起 `request.put` 读操作，就不能从 `response.get` 拿到数据 + - 只有当缓存不为满时， `request.put` 的隐式条件才满足 -- 换言之，如果不及时调用 `response.get` 把数据拿走，当读缓存满时，就无法调用 `request.put` 了 + - 换言之，如果不及时调用 `response.get` 把数据拿走，当读缓存满时，就无法调用 `request.put` 了 + 注意：以上叙述都是指相同的口。而双口 RAM 的 A口 和 B口是完全独立的，各自有各自的读缓存，互不影响。 @@ -4193,7 +4209,7 @@ BRAM2Port#( Tuple3#(bit, UInt#(3), UInt#(3)) , int ) ram <- mkBRAM2Server(defaul method Action datain(int val) if(!full); // 外界调用该方法，输入待转置(行主序)的数据流 ram.portA.request.put( BRAMRequest{write: True, responseOnWrite: False, address: tuple3(wb[0], wi, wj), datain: val }); - + // ------------ 按行主序的方式移动指针 ------------ wj <= wj + 1; // 列号先增加 if(wj == 7) begin // 列号到最大时 @@ -4239,8 +4255,9 @@ endmethod - 借助 BRAM 实现双缓冲，在外界积极不断地输入和拿出数据的情况下，能达到 1数据/周期 的吞吐率。 - 能轻松实现在外界不积极输入数据、输出数据的情况下，仍然保持结果正确： -- 如果外界不积极地调用 `put` 方法，双缓冲经常为空，导致 `read_ram` 规则不激活，从而不再读出数据。 -- 如果外界不积极地调用 `get` 方法，则 `ram.portB` 的读缓冲区积攒数据，导致 `ram.portB.request.put` 被阻塞，导致 `read_ram` 规则不激活，导致双缓冲经常处于满的状态，最终导致 `put` 方法不能执行。 + - 如果外界不积极地调用 `put` 方法，双缓冲经常为空，导致 `read_ram` 规则不激活，从而不再读出数据。 + - 如果外界不积极地调用 `get` 方法，则 `ram.portB` 的读缓冲区积攒数据，导致 `ram.portB.request.put` 被阻塞，导致 `read_ram` 规则不激活，导致双缓冲经常处于满的状态，最终导致 `put` 方法不能执行。 + @@ -4292,7 +4309,7 @@ FIFO 模块众多，功能大同小异，概览如**表16**。（从模块名可 | 可在满时并发 enq 和 deq | 1 | mkLFIFO | mkLFIFOF | mkGLFIFOF | FIFO、FIFOF | | 可在空时并发 enq 和 deq | 1 | mkBypassFIFO | mkBypassFIFOF | - | SpecialFIFOs | | 可在空时并发 enq 和 deq | 定制 | - | mkSizedBypassFIFOF | - | SpecialFIFOs | -| 空时可 deq ，读出默认值 | 1 | - | mkDFIFOF | - | SpecialFIFOs | +| 空时可 deq ，读出默认值 | 2 | - | mkDFIFOF | - | SpecialFIFOs | | BRAM 实现的大容量 FIFO | 定制 | mkSizedBRAMFIFO | mkSizedBRAMFIFOF | - | BRAMFIFO | **图7** 展示了 `mkFIFO` 、 `mkFIFO1`、 `mkLFIFO` 、 `mkBypassFIFO` 在什么情况下允许在同一周期并发压入和弹出。具体的解释和用例见本章的后文。 @@ -4383,7 +4400,7 @@ if(v1 == v3) ```bsv // 代码路径：src/15.Sqrt/Sqrt_v2.bsv （部分） - FIFO#( Tuple2#(UInt#(32), UInt#(32)) ) fifos [17]; // 接口数组，数组长度=17 + FIFO#( Tuple2#(UInt#(32), UInt#(32)) ) fifos [17]; // 接口数组，数组长度=17 // 接口类型是 FIFO#( Tuple2#(UInt#(32), UInt#(32)) ) // FIFO 内容数据类型是 Tuple2#(UInt#(32), UInt#(32)) for(int n=16; n>=0; n=n-1) @@ -4420,9 +4437,9 @@ module mkSqrtUInt32( FIFO#(UInt#(32)) ); endmethod method deq = fifos[0].deq; // 模块的 deq 方法负责：流水线最末级的 fifo deq - + method UInt#(32) first; // 模块的 first 方法负责： - match {.x, .y} = fifos[0].first; // 拿到流水线最末级的 fifo.first , 解构该 Tuple2 + match {.x, .y} = fifos[0].first; // 拿到流水线最末级的 fifo.first , 解构该 Tuple2 return y; // 返回其中的结果数据 y endmethod @@ -4444,7 +4461,7 @@ module mkTb(); endrule Reg#(UInt#(32)) x <- mkReg(1); - + FIFO#(UInt#(32)) sqrter <- mkSqrtUInt32; // 实例化 mkSqrtUInt32，接口是 FIFO#(UInt#(32)) rule sqrter_input; // 这里也可以加入显式条件来实现不积极输入 @@ -4541,10 +4558,11 @@ FIFOF#(int) fifo2 <- mkGLFIFOF(False, True); // 容量=1，接口为 FIFOF， 累加式存储器可以用来进行直方图统计，即统计输入数据流中各数据出现的频率。要求： - 功能： -- 输入：地址 addr 和 data -- 普通写：把 data 写入 addr -- 累加写：读取 addr 中的数据 rdata ，与 data 相加后，再写回 addr。 -- 输出：无论是普通写还是累加写，都输出本次操作的地址 addr 和写入本地址的新值 data + - 输入：地址 addr 和 data + - 普通写：把 data 写入 addr + - 累加写：读取 addr 中的数据 rdata ，与 data 相加后，再写回 addr。 + - 输出：无论是普通写还是累加写，都输出本次操作的地址 addr 和写入本地址的新值 data + - 性能：吞吐率能达到 1 数据/周期 - 要求有输入有效和输出反压机制 - 时钟频率：为了不让组合逻辑路径太长，要求读 BRAM、加法计算、写 BRAM 先后放在3个不同的流水级。 @@ -4619,7 +4637,7 @@ endrule 本节介绍模块 `mkDFIFOF` -`mkDFIFOF` 与 `mkLFIFOF` 唯一的不同是：`mkDFIFOF` 的 first 和 deq 不具有隐式条件，当为空时： +`mkDFIFOF` 与常规的容量为 2 的 `mkFIFOF` 唯一的不同是：`mkDFIFOF` 的 first 和 deq 不具有隐式条件，当为空时： - `mkDFIFOF` 允许调用 deq - `mkDFIFOF` 允许调用 first ，返回一个默认值 @@ -4636,11 +4654,9 @@ FIFOF#(int) fifo <- mkDFIFOF(42); // 默认值=42 我们用 `mkDFIFOF` 和 `mkFIFO` 改进 7.4 节遗留的具有输出反压功能的比特编码器，让它能获得接近 1数据/周期 的吞吐率。 - - 如**图9** 是设计思路。这里有个关键点：当遗留码寄存器堆积的长度超过 8bit 时，我们希望不论第1级有没有数据传递过来，第2级的规则都能激活，来把这 8bit 传递给输出级。换言之：我们总是希望遗留码寄存器能积极地清空自己。 -为了优雅地解决该关键点，我们在第1级和第2级之间使用 `mkDFIFOF` 。理由是：我们可以给 `mkDFIFOF` 设置一个默认值二元组： (生成码, 生成码的长度) = (0, 0) 。如果刚好 mkDFIFOF 为空，会取出默认值，而不会因为隐式条件的存在而阻止第2级的规则激活。 +为了优雅地解决该关键点，我们在第1级和第2级之间使用 `mkDFIFOF` 。理由是：我们可以给 `mkDFIFOF` 设置一个默认值二元组： (生成码, 生成码的长度) = (0, 0) 。如果刚好 `mkDFIFOF` 为空，会取出默认值，而不会因为隐式条件的存在而阻止第2级的规则激活。 | ![图9](./readme_image/9.bit_coding.png) | | :-------------------------------------: | @@ -4653,8 +4669,8 @@ FIFOF#(int) fifo <- mkDFIFOF(42); // 默认值=42 module mkBitCoder ( FIFO#(Bit#(8)) ); FIFO#(Bit#(8)) fifo1 <- mkFIFO; - FIFOF#(Tuple2#(Bit#(10), UInt#(4))) fifo2 <- mkDFIFOF( tuple2(0, 0) ); - FIFO#(Bit#(8)) fifo3 <- mkFIFO; + FIFOF#(Tuple2#(Bit#(10), UInt#(4))) fifo2 <- mkDFIFOF( tuple2(0, 0) ); + FIFO#(Bit#(8)) fifo3 <- mkFIFO; Reg#(Tuple2#(Bit#(31), UInt#(6))) drem_reg <- mkReg( tuple2(0, 0) ); // 存放遗留码 drem 以及其长度 @@ -4667,15 +4683,15 @@ module mkBitCoder ( FIFO#(Bit#(8)) ); for(UInt#(4) i=0; i<8; i=i+1) // for循环：计算长度码 len if(din[i] == 1) len = i; - + UInt#(4) trim_len = len>0 ? extend(len) : 1; // 计算数据码 trim 的长度 - Bit#(7) trim = truncate(din) & ~('1<8.8 BypassFIFO -BypassFIFO 包括3个模块： +BypassFIFO 包括3个模块： - `mkBypassFIFO` ：容量=1，接口为 FIFO - `mkBypassFIFOF` ：容量=1，接口为 FIFOF @@ -4753,8 +4769,8 @@ import BRAMFIFO::*; BRAMFIFO 包括两个模块： -- mkSizedBRAMFIFO ：接口为 FIFO -- mkSizedBRAMFIFOF ：接口为 FIFOF +- `mkSizedBRAMFIFO` ：接口为 FIFO +- `mkSizedBRAMFIFOF` ：接口为 FIFOF 以下代码实例化了两个 BRAMFIFO ： @@ -4844,7 +4860,7 @@ endrule 向量是一种复合数据类型，能提供比数组更强大的功能。使用前需要引入： -```bsv +``` import Vector::*; ``` @@ -5056,7 +5072,7 @@ typedef enum {Green=125, Yellow=20, Red=85} Light deriving(Eq, Bits); ```bsv typedef enum {Green=125, Yellow=20, Red=85} Light deriving(Eq, Bits); -Light va = unpack(0); // 行为不确定！！ 因为编码 0 在 Light 类型中不存在 。pack(va) 甚至不再是 7'b0 ！！ +Light va = unpack(0); // 行为不确定！！ 因为编码 0 在 Light 类型中不存在 。pack(va) 甚至不再是 7'b0 ！！ Light vb = unpack(20); // 行为确定，因为编码 20 在 Light 类型中对应 Yellow ，会得到 vb = Yellow ``` @@ -5136,7 +5152,7 @@ typedef struct{ // 一个像素结构体，嵌套了 Vector 和 Pixel pixel; pixel = Pixel{ // 构造结构体的语法 - color:replicate('hFF), // color[0]='hFF color[1]='hFF color[2]='hFF + color:replicate('hFF), // color[0]='hFF color[1]='hFF color[2]='hFF transparent: False, // transparent=False coord: Coord{x:1, y:2} // coord.x=1 coord.y=2 }; @@ -5146,7 +5162,7 @@ pixel = Pixel{ // 构造结构体的语法 ```bsv let pixel = Pixel{ - color:replicate('hFF), // color[0]='hFF color[1]='hFF color[2]='hFF + color:replicate('hFF), // color[0]='hFF color[1]='hFF color[2]='hFF transparent: False, // transparent=False coord: Coord{x:1, y:2} // coord.x=1 coord.y=2 }; @@ -5334,7 +5350,7 @@ y = case(x) matches 我们以往接触过的函数参数类型和返回值类型都是固定的类型，比如是一个 int ： -```verilog +```bsv function int do_nothing( int i ); // 固定类型 return i; endfunction @@ -5342,7 +5358,7 @@ endfunction 然而它们也可以是类型变量，比如类型变量名为 td （必须以小写字母开头）如下： -```verilog +```bsv function td do_nothing( td i ); // 可变类型 return i; endfunction @@ -5373,8 +5389,8 @@ endfunction 以下 bit_equal 函数就有点意义了，它判断两个参数在编码层面是否相等。它允许两个参数具有不同的类型 td1 和 td2 ，把它们用 pack 函数转化成 Bit#() 类型后，再比较是否相等。 注意到 `provisos` 中有： -- **派生要求**：要求 td1 派生自 Bits 类型类，并获取它的位宽 sz1 -- **派生要求**：要求 td2 派生自 Bits 类型类，并获取它的位宽 sz2 +- **派生要求**：要求 td1 派生自 Bits 类型类，并获取它的位宽 sz1 +- **派生要求**：要求 td2 派生自 Bits 类型类，并获取它的位宽 sz2 - **关系要求**：用关系要求 `Add#(sz1, 0, sz2)` 要求 sz1+0==sz2 ，也即 sz1 == sz2 - **数值类型** ：sz1 和 sz2 都是**数值类型**，是一种用来构造类型和接口的整数类型，比如 `Bit#(n)` 和 `Vector#(n, td)` 中的 n 都是数值类型。 @@ -5431,7 +5447,7 @@ endfunction 注意区分普通函数、类型函数、伪函数： - **普通函数**（也就是5.6节学到的函数）：在仿真运行时执行。如果是可综合的，会转化成组合逻辑电路。 -- 特殊情况：当参数都为常量时，会在编译时就确定下返回值，从而降低仿真时的计算量和生成电路的面积，称为**常量传递**。 + - 特殊情况：当参数都为常量时，会在编译时就确定下返回值，从而降低仿真时的计算量和生成电路的面积，称为**常量传递**。 - **类型函数、伪函数**：编译期间执行。 @@ -5669,7 +5685,7 @@ module mkWireReg#(td init_data) ( Reg#(td) ) // 寄存器内的数据类型 rule set_self_wire; self_wire <= self_reg; endrule - + method Action _write(td wdata); self_reg <= wdata; self_rwire.wset(wdata); @@ -5716,13 +5732,13 @@ Reg#(int) wire_reg <- mkWireReg(0); // 实例化一个 mkWireReg ，他有一 // 多态参数: n : 数值类型，双缓冲中每块的元素数量 // td : 数据元素类型 // -// 方法 put : +// 方法 put : // 参数 cancel : False:正常输入一项数据元素 True:撤销当前正在写的块，重新开始积攒n个元素 // indata : 一个输入数据元素 // // 方法 get : // 效果 : 读一次数据，读出一整块（n个元素） -// 返回值 : Tuple2(读计数，一整块数据) +// 返回值 : Tuple2(读计数，一整块数据) // 读计数: 当前一整块被读的次数，从0开始 // 一整块数据: n个元素的Vector interface DoubleBuffer#(numeric type n, type td); @@ -5737,7 +5753,7 @@ endinterface // 代码路径：src/23.DoubleBuffer/DoubleBuffer.bsv （部分） // // 双缓冲模块 -// +// // 接口： DoubleBuffer#(n, td) // // 参数： readTimes : 读一个块的次数 @@ -5832,7 +5848,7 @@ module mkDoubleBuffer#( UInt#(32) readTimes ) ( DoubleBuffer#(n, td) ) rcnt <= rcnt+1>=readTimes ? 0 : rcnt + 1; // 移动读计数 if( rcnt+1>=readTimes ) // 如果读计数+1=读次数 rblock <= rblock + 1; // 读块号+1, 即去读下一块 - + return tuple2( // 构造 tuple2 作为返回值 rcnt, // 读计数 regVector2Vector( buffer[ rblock[0] ] ) // 从缓冲区读取的块 @@ -5842,7 +5858,7 @@ module mkDoubleBuffer#( UInt#(32) readTimes ) ( DoubleBuffer#(n, td) ) endmethod ``` -以上，模块 `mkDoubleBuffer` 就设计完了 。 +以上，模块 `mkDoubleBuffer` 就设计完了 。 实例化 `mkDoubleBuffer` 的方法举例如下： @@ -5898,7 +5914,7 @@ endmodule 我们可以看到仿真打印符合以上分析： -```verilog +```bsv cnt=[ 5] rcnt=[ 0] data={ 0 1 2 3 4} cnt=[ 6] rcnt=[ 1] data={ 0 1 2 3 4} cnt=[ 7] rcnt=[ 2] data={ 0 1 2 3 4} @@ -6051,7 +6067,7 @@ mkAutoFSM 模块没有接口，不需要调用 start 方法就直接开始运行 mkFSM mfsm <- mkFSM( seq // ... await( sfsm.done ) // 直到 sfsm 空闲才能跳到下一个周期，可能占多个周期 - // 等效于 sfsm.waitTillDone; + // 等效于 sfsm.waitTillDone; // ... endseq ); ``` @@ -6062,7 +6078,7 @@ mkAutoFSM 模块没有接口，不需要调用 start 方法就直接开始运行 ```bsv // 代码路径：src/24.FSMTest/FSMStructures.bsv （部分） - mkFSM mfsm <- mkFSM( seq + mkFSM mfsm <- mkFSM( seq $display("fsm started"); // 状态1：占1个周期 delay(100); // 状态2：占100个周期 $display("delay done"); // 状态3：占1个周期 @@ -6077,7 +6093,7 @@ action 可以把多个动作语句合并成一个动作。 ```bsv // 代码路径：src/24.FSMTest/FSMStructures.bsv （部分） - mkFSM mfsm <- mkFSM( seq + mkFSM mfsm <- mkFSM( seq // ... action // 一个 action 只占一个状态，在同一周期执行 regx <= regy; @@ -6092,7 +6108,7 @@ action 可以把多个动作语句合并成一个动作。 ```bsv // 代码路径：src/24.FSMTest/FSMStructures.bsv （部分） - mkFSM mfsm <- mkFSM( seq + mkFSM mfsm <- mkFSM( seq // ... action // 只有在所有状态都满足时，才一并执行 action 中的所有语句 fifo.enq(53); @@ -6116,7 +6132,7 @@ action 可以把多个动作语句合并成一个动作。 `repeat(n) ...` 可以把一个结构重复执行 n 次，比如可以把一个 seq 顺序结构重复三次： ```bsv - mkFSM mfsm <- mkFSM( seq + mkFSM mfsm <- mkFSM( seq // ... repeat(3) seq $display("cnt=[%3d] repeat", cnt); @@ -6128,8 +6144,8 @@ action 可以把多个动作语句合并成一个动作。 或者把一个 action 重复四次： -```bsv - mkFSM mfsm <- mkFSM( seq +``` + mkFSM mfsm <- mkFSM( seq // ... repeat(4) action $display("cnt=[%3d] repeat", cnt); @@ -6216,7 +6232,7 @@ action 可以把多个动作语句合并成一个动作。 以下是一个例子： -```bsv +``` FSM mfsm <- mkFSM( seq // ... while(cnt % 5 != 0) seq @@ -6293,8 +6309,8 @@ endseq // 设 regx 是寄存器 seq action // 这样是可以的： - int x=0; - x = regx; + int x=0; + x = regx; for(int y=0; y<4; y=y+1) x = x + y; regx <= x; @@ -6317,7 +6333,8 @@ endseq SPI 发送器 `mkSPIWriter` 的代码如下。实现思路是： - 在 write 方法里，把待写的 8 bit 数据（字节）存到 wdata 寄存器里，并启动状态机。 -- 注意：write 方法会获得隐式条件“状态机空闲”，也就是说，当状态机正忙时，外界无法调用 write 方法。 + - 注意：write 方法会获得隐式条件“状态机空闲”，也就是说，当状态机正忙时，外界无法调用 write 方法。 + - 状态机内，用 while 循环 8 次，每次拿出 wdata 中的一个 bit 赋给 mosi 信号。同时也要正确地控制 ss 和 sck 信号。 - 在 spi 方法里，直接把 ss, sck, mosi 三个信号引出。 @@ -6388,18 +6405,21 @@ endmodule 无论 BSV 写的多花里胡哨，部署在 FPGA 最终还是要用 Verilog 。本节介绍如何把自己编写的 BSV 模块嵌入 Verilog 项目里。 +BSV 编译器可以把 BSV 代码以模块为单位转化成符合 Verilog-2001 标准的 Verilog 代码，在各种开发平台（Quartus、Vivado等）上具有极好的移植性。之所以不转化为新的 Verilog-2005 或 SystemVerilog ，是考虑到各家综合工具对旧版 Verilog 的语法解读更加统一，歧义更小。 + 个人推荐的开发流程是： 1. 编写 BSV 功能模块： -- 不仅要编写模块本身，还要编写一个 testbench 来调用并测试它。不仅是为了验证正确性，也是为了生成一个仿真波形，让我们在信号层面上理解调用者是如何和被调用者交互的。 -- 在调试时，如果只想看仿真打印，推荐使用 BSV 仿真（而不是Verilog仿真），也就是命令行 `bsvbuild.sh -bs` ，因为仿真运行速度会更快。 -- 对于你想要独立生成 Verilog 代码的模块，别忘了在 module 定义上加上 `(* synthesis *)` 属性 -- 泛型模块不能作为生成 Verilog 代码的顶层，不能加 `(* synthesis *)` 属性，且只能被其它模块调用。 + + - 不仅要编写模块本身，还要编写一个 testbench 来调用并测试它。不仅是为了验证正确性，也是为了生成一个仿真波形，让我们在信号层面上理解调用者是如何和被调用者交互的。 + - 在调试时，如果只想看仿真打印，推荐使用 BSV 仿真（而不是Verilog仿真），也就是命令行 `bsvbuild.sh -bs` ，因为仿真运行速度会更快。 + - 对于你想要独立生成 Verilog 代码的模块，别忘了在 module 定义上加上 `(* synthesis *)` 属性 + - 泛型模块不能作为生成 Verilog 代码的顶层，不能加 `(* synthesis *)` 属性，且只能被其它模块调用。 2. 编写完成后，用命令行 `bsvbuild.sh -vw` 生成 Verilog 代码，并生成仿真 `.vcd`波形文件。 3. 查看生成的 Verilog 模块的输入输出接口： -- 生成的 Verilog 文件 (.v) 可能有很多个，每个对应文件一个模块，包括一些子模块，以及仿真代码生成的仿真模块。你需要查看的是与你想要的 BSV 模块同名的 Verilog 模块。 + - 生成的 Verilog 文件 (.v) 可能有很多个，每个对应文件一个模块，包括一些子模块，以及仿真代码生成的仿真模块。你需要查看的是与你想要的 BSV 模块同名的 Verilog 模块。 4. 打开 .vcd 波形文件，找到你想要的模块的调用者，查看它调用该模块的波形，理解各信号的意义。 -- 如果你想要删除一些不必要的 EN 和 RDY 握手信号，在 BSV 代码文件中的模块上加上 `always_enabled` 和 `always_ready` 属性，重新生成 Verilog 。 + - 如果你想要删除一些不必要的 EN 和 RDY 握手信号，在 BSV 代码文件中的模块上加上 `always_enabled` 和 `always_ready` 属性，重新生成 Verilog 。 5. 根据如上理解，以及你的项目需要，编写 Verilog 调用者代码来调用该模块。 @@ -6418,11 +6438,13 @@ endmodule ### 时钟和复位 -首先，全局时钟信号输入 CLK 和全局复位信号输入 RST_N 是一定会生成的： +首先，全局时钟信号输入 `CLK` 和全局复位信号输入 `RST_N` 是一定会生成的： + +- `input CLK` 全局时钟：模块的所有输出信号在 `CLK` 的上升沿变化 ，所有输入信号在 `CLK` 的上升沿被采样 + - 这是典型的标准同步时序逻辑 +- `input RST_N` 全局复位：当 `CLK` 的上升沿，若 `RST_N=0` ，模块中需要复位的寄存器复位。若 `RST_N=1` ，则正常工作 + - 这是典型的标准同步复位 -- input CLK 全局时钟：模块的所有输出信号在 CLK 的上升沿变化 ，所有输入信号在 CLK 的上升沿被采样 -- 这是标准的同步时序逻辑 -- input RST\_N 全局同步复位：当 CLK 的上升沿，若 RST_N=0 ，模块中需要复位的寄存器复位。若 RST_N=1 ，则正常工作 @@ -6466,14 +6488,14 @@ endinterface: FIFO 打开生成的 Verilog 文件 `mkBitCoder.v` ，看到模块输入输出信号如下，BSV 还帮我们生成了相关的描述注释： -```bsv +```verilog // Ports: // 笔者注释：关注以下输入输出描述 // Name I/O size props // RDY_enq O 1 reg // RDY_deq O 1 reg // first O 8 reg // RDY_first O 1 reg -// RDY_clear O 1 const // 是 const 代表这个信号可能可以省略 +// RDY_clear O 1 const // 笔者注释：const 代表这个信号可能可以省略 // CLK I 1 clock // RST_N I 1 reset // enq_1 I 8 reg @@ -6524,13 +6546,13 @@ module mkBitCoder(CLK, 对于动作方法 enq ： - output RDY_enq : 代表当前时钟周期 enq 的隐式条件是否满足，即模块是否接受外界输入 enq_1 数据 -- input EN_enq : 代表当前时钟周期外界是否想输入 enq_1 数据。只允许在 RDY_enq=1 的周期=1 +- input EN_enq : 代表当前时钟周期外界是否想输入 enq_1 数据。只允许在 RDY_enq=1 的周期=1 - input [7 : 0] enq_1 : 是 8bit 的输入数据，每当 RDY_enq=EN_enq=1 （握手成功）时输入一次 对于动作方法 deq ： - output RDY_deq : 代表当前时钟周期 deq 的隐式条件是否满足，即模块是否有可弹出的数据 -- input EN_deq : 代表外界是否想弹出数据。只允许在 RDY_deq=1 的周期=1 +- input EN_deq : 代表外界是否想弹出数据。只允许在 RDY_deq=1 的周期=1 - 因为没有参数所以没有输入信号 对于值方法 first ： @@ -6550,9 +6572,9 @@ module mkBitCoder(CLK, 为了印证以上分析，打开 `.vcd` 波形文件查看这些信号。如**图12**，可以看出： -- 调用者积极地调用 enq 方法：即只要 RDY_enq=1 ，就让 EN_enq=1 +- 调用者积极地调用 enq 方法：即只要 RDY_enq=1 ，就让 EN_enq=1 - 只要 RDY_enq=EN_enq=1 （握手成功），就令输入数据 enq_1 更新为下一个待输入数据 -- 调用者积极地调用 deq 方法：即只要 RDY_deq=1 ，就让 EN_deq=1 +- 调用者积极地调用 deq 方法：即只要 RDY_deq=1 ，就让 EN_deq=1 - 每当 RDY_deq=EN_deq=1 （握手成功），直到下次 RDY_deq=1 ，输出数据 first 会更新，这是因为成功弹出了上一个输出数据 - RDY_deq 与 RDY_first 永远相等，因为 deq 与 first 隐式条件相同。在编写 Verilog 时任选一个来用即可。 @@ -6583,13 +6605,16 @@ module mkBitCoder(CLK, 对于值方法： - RDY=1 说明输出数据有效。 +- 不存在 EN 信号，因为无论外界是否调用值方法，都不会对被调用模块产生影响。 对于动作方法和动作值方法： - RDY 信号指示当前是否能调用该方法。 -- RDY=1 时说明输出数据有效（如果有返回值）。 + - RDY=1 时说明输出数据有效（如果是动作值方法）。 + - EN 信号指示当前外界是否要调用该方法，要求只能在 RDY=1 时让 EN=1 。 -- EN=1 时，必须让输入数据有效（如果有参数）。 + - EN=1 时，必须让输入数据有效（如果有参数）。 + - 每当 EN=RDY=1 的时钟周期，一次握手完成，方法被调用了一次。 我们编写 Verilog 来调用 BSV 生成的 Verilog 模块时，需要依照以上原则，根据模块输出的 RDY 和 输出数据 信号来正确地产生 EN 和 输入数据信号。 @@ -6692,7 +6717,7 @@ Verilog 代码库的路径包括： 本章提供三个样例 SPIFlash 读写器、 RISC-V 流水线 CPU 、 JPEG 图像压缩器 。 -代码都验证通过，后续补充注释和原理介绍。 +本章配套代码已全部完成并测试，部分文字尚未完成，留待后续补充。 @@ -6700,23 +6725,33 @@ Verilog 代码库的路径包括： 代码目录： `src/SPIFlash` +- `SPIFlashController.bsv` 包含 SPIFlash 读写控制器模块 `mkSPIFlashController` 。 +- `SPIController.bsv` 包含 SPI 控制器模块 `mkSPIController` ，被 `mkSPIFlashController` 调用。 +- `TbSPIFlashController.bsv` 包含仿真顶层模块 `mkTb` ，是 `mkSPIFlashController` 的 testbench 。 + +目的：展示状态机 StmtFSM 包的复杂应用。 + +核心知识点： + +- 状态机实现外设总线协议 + ### 原理介绍 实现 W25QXX 系列 SPIFlash 的读写控制器，包括页读、页写、页擦除。 -思路是用 StmtFSM 包来写一个更复杂的状态机。后续补充…… +> 留待后续补充…… ### 结果展示 运行命令生成仿真波形： ```bash -bsvbuild.sh -vw mkTb SPIFlashController.bsv +$ bsvbuild.sh -vw mkTb SPIFlashController.bsv ``` 查看波形： -| ![图14](./readme_image/15.spiflash_wave.png) | +| ![图15](./readme_image/15.spiflash_wave.png) | | :--------------------------------------------: | | **图15**：仿真产生的页擦除、页写 (部分) 的波形 | @@ -6726,35 +6761,179 @@ bsvbuild.sh -vw mkTb SPIFlashController.bsv 代码目录： `src/Rv32iCPU` +- `Rv32iCPU.bsv` 包含 RISC-V CPU 模块 `mkRv32iCPU` 。 +- `DFIFOF1.bsv` 包含多态模块 `mkDFIFO1` ，它被 `mkRv32iCPU` 调用。 +- `TbRv32iCPU.bsv` 包含仿真顶层模块 `mkTb` ，是 `mkRv32iCPU` 的 testbench 。 +- `benchmark` 目录包含一些能让 CPU 运行的程序，也即指令流文件和数据流文件。 + +目的：展示如何用 BSV 优雅地实现经典四级流水线 CPU 。 + +核心知识点： + +- 用各种 FIFO 构建弹性流水线 +- 用结构体提升代码可读性 +- 调度属性 + ### 原理介绍 -实现的 CPU： +RV32I 是 RISC-V 的基础整数指令集，本节实现完整支持 RV32I 指令集的 CPU，重点在于展示经典四级流水线 CPU 的原理，并跑一些 RISC-V 指令流程序来验证。 + +一些术语说明如**表23** 。 + +​ **表23**：CPU 体系结构中的术语 + +| 简称 | 全称 | 释义 | 备注 | +| ------- | -------------- | ------------------------------ | ---------------------------------------------- | +| pc | 程序计数 | 当前指令在指令 RAM 中的地址 | 32bit | +| npc | 下一条程序计数 | 下一条需要执行的指令的地址 | 无跳转时 npc=pc+4（每条指令占4字节） | +| imm | 立即数 | 从指令中直接获取的数据 | 32bit | +| regfile | 寄存器文件 | 通用寄存器阵列 | 32 个 32bit 的通用寄存器 | +| rsrc1 | 源寄存器1 | 从寄存器文件中读取的寄存器值 | 32bit | +| rsrc2 | 源寄存器2 | 从寄存器文件中读取的寄存器值 | 32bit | +| rdst | 目的寄存器 | 写入寄存器文件的值 | 32bit | +| ibus | 指令总线 | 接受 pc 作为访存地址，读出指令 | | +| dbus | 数据总线 | 接受访存请求，读出读数据 | 请求字：是读是写、写字节使能、读写地址、写数据 | + +RV32I 的所有指令类型如**表24** 。 + +​ **表24**：RV32I 包含的9种指令的大致行为。一些细节没展示，比如 LOAD 和 STORE 还分为按字节访存、按字访存、按双字访存。 + +| 指令类型r | rsrc1 | rsrc2 | rdst | 访存地址 | npc | +| ------------ | ------------------ | ------------------ | -------- | --------- | ------------------------------------------- | +| JAL | | | pc+4 | | pc+imm | +| JALR | :heavy_check_mark: | | pc+4 | | rsrc1+imm | +| BRANCH | :heavy_check_mark: | :heavy_check_mark: | | | pc+imm 或 pc+4 (取决于 rsrc1 和 rsrc2 比较) | +| AUIPC | | | pc+imm | | pc+4 | +| LUI | | | imm | | pc+4 | +| 立即数类算术 | :heavy_check_mark: | | ALU 结果 | | pc+4 | +| 寄存器类算术 | :heavy_check_mark: | :heavy_check_mark: | ALU 结果 | | pc+4 | +| LOAD | :heavy_check_mark: | :heavy_check_mark: | 内存读值 | rsrc1+imm | pc+4 | +| STORE | :heavy_check_mark: | :heavy_check_mark: | | rsrc1+imm | pc+4 | + +从**表24**看出，指令是否读取 rsrc1/rsrc2 、是否写入 rdst 、是否访存、如何跳转等行为会带来各种各样的变化。为此，我们设计流水线如**图15**，它包括四段： + +1. **IF段** (Instruction Fetch) ： + - 持有当前的 pc，把它作为读地址送入 ibus（指令总线）。 +2. **ID段** (Instruction Decode) ：从指令总线读到指令，用它： + + - 译码：获取 opcode 、 imm 、rsrc1号 、 rsrc2号 、rdst号 等信息。 + - 读取 regfile：根据 rsrc1号 、 rsrc2号 读取 regfile，得到 rsrc1 和 rsrc2 。 + - 计算 npc ： + - 当指令不是 JAL、JALR、BRANCH 时，向 IF段 发送 npc=pc+4 （顺序执行的下一条指令）； + - 当指令为 JAL 时，向 IF段 发送 npc=pc+imm ； + - 当指令为 JALR 时，暂不能确定跳转地址；当指令为 BRANCH 时，暂不能确定是否跳转。需要寄存器的计算结果。因此等 EX/MEM 段再跳转。 +3. **EX/MEM段** (Execute/Memory access) ，简称 **EX段** ：用译码后的指令和寄存器读值进行： + + - 计算 npc： + + - 当指令为 JALR 时，向 IF段 发送 npc=rsrc1+imm ； + + - 当指令为 BRANCH 时，根据比较结果判断 npc=pc+imm 还是 npc=pc+4 。 + + + - 计算：对于算术逻辑类指令，用 ALU 计算目的寄存器结果。 + + - 访存：对于 LOAD/STORE，用“访存转换”算出读写请求：（是读是写、写字节使能、读写地址、写数据），送入ibus + +4. **WB段** (Write Back to Register) ：对于所有要写入寄存器的指令，把相应的结果写回，其中： + + - 如果是 LOAD 指令，从 dbus 中拿到结果。 + + - 如果是其它指令（算术逻辑指令、JAL、JALR、LUI、AUIPC），从 ALU 拿到结果。 + +| ![图18](./readme_image/18.rv32i_pipe.png) | +| :---------------------------------------: | +| **图18**：RISC-V CPU 四级流水线设计图 | + +**图18**包含了本科课程《计算机组成原理》一般涉及的两种流水线停顿： -- 具有基本完备的 RV32I 指令集（除了不支持 CSR 类指令、不支持单字节和双字节Load/Store） -- EX和WB阶段的寄存器结果会转发到ID阶段，降低 CPI -- 弹性流水线：支持指令总线停顿和数据总线停顿，而不影响流水线后级向后传递。 +- 跳转停顿：BRANCH/JALR 指令需要寄存器读值才能计算 npc ，为了防止 ID段 组合逻辑过长，我们在 EX段 才计算并发送 npc 到 IF 段，导致总是在 ID段 产生一周期的气泡 （这里不考虑 speculation + 冲刷流水线的技术）。 +- 实现方法：EX段 和 ID段 都可以向 IF段 发送 npc ，但不会同时，所以给 EX段 和 ID段 加上 `(* conflict_free *)` 属性。 -主要思路包括：各种 FIFO 的运用；用高级数据结构降低代码量。 +- 写后读依赖停顿：当 WB段 或 EX段 的 rdst号 与 ID段 的 rsrc1号 或 rsrc2号 碰撞时，说明 ID段 要读取尚未写入寄存器的数据，ID段 需要停顿直到不再碰撞（数据已经写入 regfile）为止。 +- 实现方法：对于 ID段 的停顿，在 ID段 安插一个 mkBypassFIFO ，在停顿时保存 ibus 响应的读指令，避免它消失。 +- 额外优化：在 WB段 的 ALU结果 是经过寄存器缓存的，不是组合逻辑路径，因此当与 ID段 碰撞时，不停顿 ID段，而是用转发 (forward) 技术把 ALU结果 转发到 ID段。 -后续补充…… + +另外，我们还灵活运用各种 FIFO 实现了《计算机组成原理》中一般不要求实现，但在实际应用中非常必要的功能——总线停顿。ibus 和 dbus 都可能发生总线停顿，包括两种： + +- 请求停顿：可能暂时无法接受一个请求。比如遇到了 cache miss 或总线从机争用。 +- 响应停顿：接受请求后，响应的读出指令/读出数据 并不一定在下周期出现，有可能是下下周期、下下下周期。具有不确定的延迟。 + +我们使用以下方法解决这些总线停顿： + +- 对于 ibus 的请求停顿，在 IF段 安插一个 mkBypassFIFO ，当 ibus 无法接受请求时，缓存住 npc 。 +- 对于 ibus 的响应停顿，当停顿发生时，ID段 的 mkBypassFIFO 无数据， ID段 的规则就不会执行，不会向后传递指令，直到 ibus 有响应为止。 +- 对于 dbus 的请求停顿，在 EX段 安插一个 mkBypassFIFO ，当 dbus 无法接受请求时，缓存该请求。 +- 对于 dbus 的响应停顿，用一个 mkDFIFO1 进行同步。当 dbus 暂无响应时，不从 mkDFIFO1 中拿走一个数据，导致 EX段 停顿，不会继续向前执行。 + +> mkDFIFOF1 不是 BSV 的库里预定义的，是我自己编写的多态模块，它与 mkFIFOF1 唯一的区别是：可以在空时用 first 读到一个默认数据。 + +如果你用 Verilog 编写过流水线 CPU 就会知道，在如上所述的这些跳转停顿、写后读停顿、各种总线停顿的存在下，需要很复杂的冒险处理模块（Hazard Unit）来控制各种停顿组合下流水线的推移。然而在 BSV 的思维下，我们灵活地用 FIFO 的思维来应对这些停顿，不仅让流水线示意图（**图18**）更清晰易懂，也让代码修改变得更简单，方便我们进行设计空间搜索。例如你想试试在 ID段 就把 BRANCH/JALR 的 npc 发送给 IF段 会怎样，就不需要像 Verilog 那样既修改指令流又修改数据流（这样也很容易改出bug） + +具体的代码实现见`Rv32iCPU.bsv` （请结合**图18**阅读代码）。 ### 结果展示 **仿真**： -mkTb模块会让 CPU 运行一段快速排序程序，该快速排序程序的指令流见文件 `src/Rv32iCPU/instruction_stream/instruction_stream_quicksort.txt` 。它来自汇编源码 `src/Rv32iCPU/instruction_stream/assembly_quicksort.S` 。 +你可以修改 testbench 代码 `TbRv32iCPU.bsv` 中的两个字符串： + +```bsv +String filename_instruction = "benchmark/qsort_instruction.txt"; +String filename_data = "benchmark/no_data.txt"; +``` + +来指定要让 CPU 运行的指令流（放在指令 RAM 中）和数据流（放在数据 RAM 中）。 + +还可以修改： + +```bsv +Bit#(32) print_data_count = 40; +``` + +来决定仿真结束前打印数据 RAM 中的前多少个数据（用于查看结果）。 + +我在 benchmark 目录里提供了四个测试程序，说明如**表25**。 + +​ **表25**：我们实现的 CPU 的测试程序 -直接运行仿真命令： +| 程序说明 | filename_instruction 取值 | filename_data | 测试成功的标志 | +| -------- | ----------------------------------- | ---------------------------- | ---------------- | +| 快速排序 | `"benchmark/qsort_instruction.txt"` | 随意 ***** | 看排序结果 ***** | +| 算术测试 | `"benchmark/testA_instruction.txt"` | 随意 ***** | 最终 pc/4=2227 | +| 访存测试 | `"benchmark/testB_instruction.txt"` | `"benchmark/testB_data.txt"` | 最终 pc/4=2719 | +| 跳转测试 | `"benchmark/testC_instruction.txt"` | 随意 ***** | 最终 pc/4=2906 | + +> *****：随意代表可以随意设置，该程序不要求数据 RAM 中有初始值。 +> +> *****：排序结果通过打印数据 RAM 中的前 38 个数据来查看，这 38 个数据应该是由小到大排列的。 + +按**表25**设置好你想在 CPU 上运行的程序，然后运行以下命令来仿真： ```bash -bsvbuild.sh -bs mkTb Rv32iCPU.bsv +$ bsvbuild.sh -bs mkTb TbRv32iCPU.bsv ``` -可以看到打印了排序后的结果。 +仿真会在检测到 CPU 遇到死循环（JAL跳转到自身）时停止，然后会打印此时的一些信息，以及数据 RAM 中的前 `print_data_count` 个数据。 + +例如，对于访存测试（testB），你会看到如下的打印： + +``` +fetch: cycle= 5479 instructions= 3599 100*cpi= 152 pc/4= 2719 +DataRAM[00000000] = 16535 +DataRAM[00000004] = -1396670317 +DataRAM[00000008] = 36611 +省略... +``` + +这代表总共运行了 5479 个周期，3599 条指令， 100*cpi=152（平均运行每条指令需要1.52个周期），最后死循环停在了 pc/4=2719 的为止。依照**表25**可知测试成功。 + +另外，你还可以按照 `TbRv32iCPU.bsv` 中注释的指示，加入 ibus 和 dbus 的请求停顿和响应停顿，看看测试是否还能成功。（我验证过各种停顿的组合情况下，均成功） **Verilog 综合结果**： -生成的 `mkRv32iCPU.v` 在 Altera Cyclone IV EP4CE115F29C8 上占用 5229 LE (logic elements)，占总量的5%。时钟频率达到 77MHz 。 +生成的 `mkRv32iCPU.v` 在 Altera Cyclone IV EP4CE115F29C8 上占用 5312 LE (logic elements)，占总量的5%。时钟频率达到 77MHz 。 @@ -6762,40 +6941,61 @@ bsvbuild.sh -bs mkTb Rv32iCPU.bsv 代码目录： `src/JpegEncoder` +- `JpegEncoder.bsv` 包含 JPEG 图像压缩器模块 `mkJpegEncoder` 。 +- `DoubleBuffer.bsv` 包含多态双缓冲模块 `mkDoubleBuffer` ，被 `mkJpegEncoder` 调用。 +- `TbJpegEncoder.bsv` 包含仿真顶层模块 `mkTb` ，是 `mkJpegEncoder` 的 testbench 。 +- `PgmReader.bsv` 包含用于读取 .pgm（未压缩灰度图文件）的模块，仅限于仿真使用，被 `mkTb` 调用。 +- `img` 目录包含一些 .pgm 文件，用来在仿真时被送入 `mkJpegEncoder` 进行压缩。 +- `python/txt2jpg.py` 转换工具，用于把仿真生成的包含十六进制数的文本文件转化为二进制文件（.jpg图像是二进制文件）。 +- `python/jpeg_encoder.py` 是 JPEG 图像压缩器的软件代码实现，硬件模块 `mkJpegEncoder` 是根据它编写的。 + +目的：展示如何用 BSV 优雅地实现 JPEG 图像压缩器。 + +核心知识点： + +- 双缓冲 +- 矩阵乘法 +- 多态的应用 +- Vector 的应用 + ### 原理介绍 该模块根据 JPEG 图像压缩算法的 python 代码 `src/JpegEncoder/python/jpeg_encoder.py` 编写。 能输入图像（8bit灰度图）的原始像素，输出 JPEG 压缩流（带有 `.jpg` 文件头尾）。 -主要思想是双缓冲（用多态模块实现）、 Vector 的各种运用。 - -后续补充…… +> 留待后续补充…… ### 结果展示 **仿真**： -mkTb模块会读取并解析原始像素文件（不压缩的 `.pgm` 格式），把像素输入到 `JpegEncoder` 模块，再从中拿出压缩后的像素，写入一个文本文件 `out.jpg.txt` 。 +testbench 模块会读取并解析原始像素文件（不压缩的 `.pgm` 格式），把像素输入到 `mkJpegEncoder` 模块，再从中拿出压缩后的像素，以十六进制数的形式写入一个文本文件 `out.jpg.txt` 。 -首先在 `JpegEncoder.bsv` 的 327 行指定你想要压缩的文件名，可以任意指定我在 `src/JpegEncoder/img` 文件夹下提供的 `.pgm` 格式的原始图像文件。 +首先指定你想压缩的图像文件，比如是 `img/in003.pgm` ，方法是修改 `TbJpegEncoder.bsv` 中的如下一行： + +```bsv +PgmReader pgm_reader <- mkPgmReader("img/in003.pgm"); +``` 然后运行仿真命令： ```bash -bsvbuild.sh -bs JpegEncoder.bsv +$ bsvbuild.sh -bs mkTb TbJpegEncoder.bsv ``` -会看到产生了一个 `out.jpg.txt` 文件，打开它可以看到文本形式的图像压缩流（笔者还没研究出来 BSV 怎么直接写二进制文件，所以目前只能写在文本文件里）。 +会看到产生了一个 `out.jpg.txt` 文件，打开它可以看到文本形式的十六进制数，它就是图像压缩流。 -然后，用以下命令调用我写的一个 python 脚本，把文本文件转化为二进制文件： +然后，用以下命令调用我写的转换工具，把文本文件转化为二进制文件： ```bash -python python/txt2jpg.py out.jpg.txt out.jpg +$ python python/txt2jpg.py out.jpg.txt out.jpg ``` 得到的 `out.jpg` 可以用图像查看器直接打开查看。 +> 笔者还没研究出来 BSV 怎么直接写二进制文件，所以目前只能写在文本文件里。 + **Verilog 综合结果**： 生成的 `mkJpegEncoder.v` 在 Altera Cyclone IV EP4CE115F29C8 上占用 12533 LE (logic elements)，占总量的11%。时钟频率达到 43MHz 。 diff --git a/readme_image/0.bluespec.png b/readme_image/0.bluespec.png new file mode 100644 index 0000000..d0e0bbf Binary files /dev/null and b/readme_image/0.bluespec.png differ diff --git a/readme_image/18.rv32i_pipe.png b/readme_image/18.rv32i_pipe.png new file mode 100644 index 0000000..3b3390b Binary files /dev/null and b/readme_image/18.rv32i_pipe.png differ diff --git a/readme_image/9.bit_coding.png b/readme_image/9.bit_coding.png index 2f64c57..78e3dfb 100644 Binary files a/readme_image/9.bit_coding.png and b/readme_image/9.bit_coding.png differ diff --git a/src/JpegEncoder/JpegEncoder.bsv b/src/JpegEncoder/JpegEncoder.bsv index f35a1c8..4d7e20e 100644 --- a/src/JpegEncoder/JpegEncoder.bsv +++ b/src/JpegEncoder/JpegEncoder.bsv @@ -6,11 +6,9 @@ package JpegEncoder; import Vector::*; import DReg::*; import BRAM::*; -import StmtFSM::*; // user defined packages import DoubleBuffer::*; -import PgmReader::*; interface JpegEncoder; @@ -19,6 +17,7 @@ interface JpegEncoder; method Bit#(128) get; endinterface + (* synthesize *) (* always_ready="init" *) module mkJpegEncoder (JpegEncoder); @@ -323,41 +322,4 @@ endmodule -module mkTb (); - PgmReader pgm_reader <- mkPgmReader("img/in003.pgm"); - JpegEncoder jpg_encoder <- mkJpegEncoder; - - Reg#(File) jpg_file <- mkReg(InvalidFile); - - mkAutoFSM( seq - action - let fp <- $fopen("out.jpg.txt", "w"); - jpg_file <= fp; - endaction - - action - int width = pgm_reader.image_width; - int height = pgm_reader.image_height; - if(width%8 != 0 || height%8 !=0) begin // 合法性检查， width 和 height 必须是 8 的倍数，否则 JpegEncoder 不支持 - $error(" Error: image width or height is not multiple of 8"); - $finish; - end - jpg_encoder.init( unpack(pack(width/8)[8:0]) , unpack(pack(height/8)[8:0]) ); - endaction - - while(pgm_reader.not_finish) action - let pixels <- pgm_reader.get_pixels; - jpg_encoder.put(pixels); - endaction - - delay(10000); - endseq ); - - rule write_jpg_to_file; - $fwrite(jpg_file, "%032x", jpg_encoder.get); - endrule - -endmodule - - endpackage diff --git a/src/JpegEncoder/TbJpegEncoder.bsv b/src/JpegEncoder/TbJpegEncoder.bsv new file mode 100644 index 0000000..17e6539 --- /dev/null +++ b/src/JpegEncoder/TbJpegEncoder.bsv @@ -0,0 +1,50 @@ +// Copyright(c) 2022 https://github.com/WangXuan95 + +package TbJpegEncoder; + +// standard BSV packages +import StmtFSM::*; + +// user defined packages +import PgmReader::*; +import JpegEncoder::*; + + +module mkTb (); + PgmReader pgm_reader <- mkPgmReader("img/in003.pgm"); + JpegEncoder jpg_encoder <- mkJpegEncoder; + + Reg#(File) jpg_file <- mkReg(InvalidFile); + + mkAutoFSM( seq + action + let fp <- $fopen("out.jpg.txt", "w"); + jpg_file <= fp; + endaction + + action + int width = pgm_reader.image_width; + int height = pgm_reader.image_height; + if(width%8 != 0 || height%8 !=0) begin // 合法性检查， width 和 height 必须是 8 的倍数，否则 JpegEncoder 不支持 + $error(" Error: image width or height is not multiple of 8"); + $finish; + end + jpg_encoder.init( unpack(pack(width/8)[8:0]) , unpack(pack(height/8)[8:0]) ); + endaction + + while(pgm_reader.not_finish) action + let pixels <- pgm_reader.get_pixels; + jpg_encoder.put(pixels); + endaction + + delay(10000); + endseq ); + + rule write_jpg_to_file; + $fwrite(jpg_file, "%032x", jpg_encoder.get); + endrule + +endmodule + + +endpackage diff --git a/src/Rv32iCPU/DFIFOF1.bsv b/src/Rv32iCPU/DFIFOF1.bsv new file mode 100644 index 0000000..ad8b9a9 --- /dev/null +++ b/src/Rv32iCPU/DFIFOF1.bsv @@ -0,0 +1,28 @@ +// Copyright(c) 2022 https://github.com/WangXuan95 + +package DFIFOF1; + +import FIFOF::*; + + +module mkDFIFOF1#(td default_value) (FIFOF#(td)) + provisos (Bits#(td, sz)); + + FIFOF#(td) fifo <- mkUGFIFOF1; + + method td first = fifo.notEmpty ? fifo.first : default_value; + + method Action deq = fifo.deq; + + method Action enq(td value) if(fifo.notFull) = fifo.enq(value); + + method notEmpty = fifo.notEmpty; + + method notFull = fifo.notFull; + + method clear = fifo.clear; + +endmodule + + +endpackage diff --git a/src/Rv32iCPU/Rv32iCPU.bsv b/src/Rv32iCPU/Rv32iCPU.bsv index 54893c6..8d21daa 100644 --- a/src/Rv32iCPU/Rv32iCPU.bsv +++ b/src/Rv32iCPU/Rv32iCPU.bsv @@ -2,11 +2,15 @@ package Rv32iCPU; +import Vector::*; +import DReg::*; import FIFOF::*; import SpecialFIFOs::*; -import BRAM::*; -// 枚举：指令码 OPCODE +import DFIFOF1::*; + + +// 枚举：指令码 OPCODE --------------------------------------------------------------------------------------------- typedef enum { AUIPC = 7'b0010111, // U_TYPE rdst=pc+imm LUI = 7'b0110111, // U_TYPE rdst=imm; JAL = 7'b1101111, // J_TYPE rdst=pc+4, pc= pc+imm, @@ -19,16 +23,16 @@ typedef enum { AUIPC = 7'b0010111, // U_TYPE rdst=pc+imm UNKNOWN = 7'b0 } OpCode deriving(Bits, Eq); -// 结构体：寄存器有效、地址、数据 +// 结构体：寄存器有效、地址、数据 --------------------------------------------------------------------------------------------- typedef struct { - Bool e; - UInt#(5) a; - UInt#(32) d; + Bool e; + Bit#(5) a; + Bit#(32) d; } RegItem deriving(Bits); -// 结构体：指令解码和执行结果 +// 结构体：指令解码和执行结果 --------------------------------------------------------------------------------------------- typedef struct { //struction of Decoded Instrunction item, named InstrItem. - UInt#(32) pc; // fill at IF stage + Bit#(32) pc; // fill at IF stage OpCode opcode; // fill at ID stage RegItem rsrc1; // fill at ID stage RegItem rsrc2; // fill at ID stage @@ -37,108 +41,19 @@ typedef struct { //struction of Decoded Instrunction item, named InstrIte Bit#(3) funct3; // fill at ID stage Bool store; // fill at ID stage Bool load; // fill at ID stage - UInt#(32) immu; // fill at ID stage + Bit#(32) immu; // fill at ID stage } InstrItem deriving(Bits); -// 函数：指令解码 -// 用在 ID阶段 -function InstrItem decode(Bit#(32) instr); - InstrItem item = unpack('0); - - item.funct7 = instr[31:25]; - item.rsrc2.a = unpack(instr[24:20]); - item.rsrc1.a = unpack(instr[19:15]); - item.funct3 = instr[14:12]; - item.rdst.a = unpack(instr[11:7]); - item.opcode = unpack(instr[6:0]); - - item.store = item.opcode == STORE; - item.load = item.rdst.a != 0 && item.opcode == LOAD; - item.rdst.e = item.rdst.a != 0 && (item.opcode == LOAD || item.opcode == JAL || item.opcode == JALR || item.opcode == LUI || item.opcode == AUIPC || item.opcode == ALI || item.opcode == ALR ); - item.rsrc2.e = item.opcode == ALR || item.opcode == STORE || item.opcode == BRANCH; - item.rsrc1.e = item.opcode == ALI || item.opcode == LOAD || item.opcode == JALR || item.rsrc2.e; - - int imms = case(item.opcode) - AUIPC : return unpack({instr[31:12], 12'h0}); // U_TYPE - LUI : return unpack({instr[31:12], 12'h0}); // U_TYPE - ALI : return extend(unpack(instr[31:20])); // I_TYPE - LOAD : return extend(unpack(instr[31:20])); // I_TYPE - JALR : return extend(unpack(instr[31:20])); // I_TYPE - STORE : return extend(unpack({instr[31:25], instr[11:7]})); // S_TYPE - BRANCH : return extend(unpack({instr[31], instr[7], instr[30:25], instr[11:8], 1'b0})); // B_TYPE - JAL : return extend(unpack({instr[31], instr[19:12], instr[20], instr[30:21], 1'b0})); // J_TYPE - default: return 0; - endcase; - item.immu = unpack(pack(imms)); - - return item; -endfunction - -// 函数：判断 BRANCH 类指令是否跳转 -// 用在 EX阶段 -function Bool is_branch(InstrItem item); - int item_rsrc1_s = unpack(pack(item.rsrc1.d)); - int item_rsrc2_s = unpack(pack(item.rsrc2.d)); - return case(item.funct3) - 3'b000 : return item.rsrc1.d == item.rsrc2.d; // BEQ - 3'b001 : return item.rsrc1.d != item.rsrc2.d; // BNE - 3'b100 : return item_rsrc1_s < item_rsrc2_s; // BLT - 3'b101 : return item_rsrc1_s >= item_rsrc2_s; // BGE - 3'b110 : return item.rsrc1.d < item.rsrc2.d; // BLTU - 3'b111 : return item.rsrc1.d >= item.rsrc2.d; // BGEU - default: return False; - endcase; -endfunction - -// 函数：ALU，得到算术逻辑计算结果 -// 用在 EX阶段 -function UInt#(32) alu(InstrItem item); - UInt#(5) shamti = truncate(item.immu); - UInt#(5) shamtr = truncate(item.rsrc2.d); - int item_rsrc1_s = unpack(pack(item.rsrc1.d)); - int item_rsrc2_s = unpack(pack(item.rsrc2.d)); - int imms = unpack(pack(item.immu)); - return case( {item.funct7, item.funct3, pack(item.opcode)} ) matches - 17'b???????_???_110?111 : return item.pc + 4; // JAL, JALR - 17'b???????_???_0110111 : return item.immu; // LUI - 17'b???????_???_0010111 : return item.pc + item.immu; // AUIPC - 17'b0000000_000_0110011 : return item.rsrc1.d + item.rsrc2.d; // ADD - 17'b???????_000_0010011 : return item.rsrc1.d + item.immu; // ADDI - 17'b0100000_000_0110011 : return item.rsrc1.d - item.rsrc2.d; // SUB - 17'b0000000_100_0110011 : return item.rsrc1.d ^ item.rsrc2.d; // XOR - 17'b???????_100_0010011 : return item.rsrc1.d ^ item.immu; // XORI - 17'b0000000_110_0110011 : return item.rsrc1.d | item.rsrc2.d; // OR - 17'b???????_110_0010011 : return item.rsrc1.d | item.immu; // ORI - 17'b0000000_111_0110011 : return item.rsrc1.d & item.rsrc2.d; // AND - 17'b???????_111_0010011 : return item.rsrc1.d & item.immu; // ANDI - 17'b0000000_001_0110011 : return item.rsrc1.d << shamtr; // SLL - 17'b0000000_001_0010011 : return item.rsrc1.d << shamti; // SLLI - 17'b0000000_101_0110011 : return item.rsrc1.d >> shamtr; // SRL - 17'b0000000_101_0010011 : return item.rsrc1.d >> shamti; // SRL - 17'b0100000_101_0110011 : return unpack(pack(item_rsrc1_s >> shamtr)); // SRA - 17'b0100000_101_0010011 : return unpack(pack(item_rsrc1_s >> shamti)); // SRAI - 17'b0000000_010_0110011 : return (item_rsrc1_s < item_rsrc2_s) ? 1 : 0; // SLT - 17'b???????_010_0010011 : return (item_rsrc1_s < imms ) ? 1 : 0; // SLTI - 17'b0000000_011_0110011 : return (item.rsrc1.d < item.rsrc2.d) ? 1 : 0; // SLTU - 17'b???????_011_0010011 : return (item.rsrc1.d < item.immu ) ? 1 : 0; // SLTIU - default : return 0; - endcase; -endfunction - - -// 接口： CPU 的接口 +// 接口： CPU 的接口 --------------------------------------------------------------------------------------------- interface CPU_ifc; - // instruction-bus methods - method UInt#(32) ibus_addr; // instruction-bus request, return addr (i.e. PC) - method Action ibus_next; // instruction-bus request ready - method Action ibus_rdata(UInt#(32) instr); // instruction-bus response, parameter is rdata (i.e. instruction) - // data-bus methods - method Tuple3#(Bool, UInt#(32), UInt#(32)) dbus_addr_wdata; // data-bus request, return (is_write?, addr, wdata) - method Action dbus_next; // data-bus request ready - method Action dbus_rdata(UInt#(32) read_data); // data-bus response rdata, parameter is rdata (only response when is_write=False) - // CPU boot - method Action boot(UInt#(32) boot_addr); // cpu boot + method Action boot(Bit#(32) boot_addr); // CPU boot + method Bit#(32) ibus_req; // instruction-bus request, return addr (i.e. PC) + method Action ibus_reqx; // instruction-bus request ready + method Action ibus_resp(Bit#(32) rdata); // instruction-bus response, parameter is rdata (i.e. instruction) + method Tuple4#(Bool, Bit#(4), Bit#(32), Bit#(32)) dbus_req; // data-bus request, return (is_write?, byte_en, addr, wdata) + method Action dbus_reqx; // data-bus request ready + method Action dbus_resp(Bit#(32) rdata); // data-bus response rdata, parameter is rdata (only response when is_write=False) endinterface @@ -152,170 +67,216 @@ endinterface // 单字节、双字节 Load 和 Store，只支持四字节 Load 和 Store。 // (* synthesize *) +(* always_ready = "boot" *) module mkRv32iCPU (CPU_ifc); - // Register file 32bit*32 - Reg#(UInt#(32)) regfile [32]; - for (Integer i=0; i<32; i=i+1) - regfile[i] <- mkReg(0); + + // 函数：指令解码 --------------------------------------------------------------------------------------------- + // 用在 ID段 + function InstrItem decode(Bit#(32) instr); + InstrItem item = unpack('0); + + item.funct7 = instr[31:25]; + item.rsrc2.a = instr[24:20]; + item.rsrc1.a = instr[19:15]; + item.funct3 = instr[14:12]; + item.rdst.a = instr[11:7]; + item.opcode = unpack(instr[6:0]); + + item.store = item.opcode == STORE; + item.load = item.rdst.a != 0 && item.opcode == LOAD; + item.rdst.e = item.rdst.a != 0 && (item.opcode == LOAD || item.opcode == JAL || item.opcode == JALR || item.opcode == LUI || item.opcode == AUIPC || item.opcode == ALI || item.opcode == ALR ); + item.rsrc2.e = item.opcode == ALR || item.opcode == STORE || item.opcode == BRANCH; + item.rsrc1.e = item.opcode == ALI || item.opcode == LOAD || item.opcode == JALR || item.rsrc2.e; + + int imms = case(item.opcode) + AUIPC : return unpack({instr[31:12], 12'h0}); // U_TYPE + LUI : return unpack({instr[31:12], 12'h0}); // U_TYPE + ALI : return extend(unpack(instr[31:20])); // I_TYPE + LOAD : return extend(unpack(instr[31:20])); // I_TYPE + JALR : return extend(unpack(instr[31:20])); // I_TYPE + STORE : return extend(unpack({instr[31:25], instr[11:7]})); // S_TYPE + BRANCH : return extend(unpack({instr[31], instr[7], instr[30:25], instr[11:8], 1'b0})); // B_TYPE + JAL : return extend(unpack({instr[31], instr[19:12], instr[20], instr[30:21], 1'b0})); // J_TYPE + default: return 0; + endcase; + item.immu = pack(imms); + + return item; + endfunction + + // 函数：判断 BRANCH 类指令是否跳转 --------------------------------------------------------------------------------------------- + // 用在 EX段 + function Bool is_branch(InstrItem item); + int item_rsrc1_s = unpack(item.rsrc1.d); + int item_rsrc2_s = unpack(item.rsrc2.d); + return case(item.funct3) + 3'b000 : return item.rsrc1.d == item.rsrc2.d; // BEQ + 3'b001 : return item.rsrc1.d != item.rsrc2.d; // BNE + 3'b100 : return item_rsrc1_s < item_rsrc2_s; // BLT + 3'b101 : return item_rsrc1_s >= item_rsrc2_s; // BGE + 3'b110 : return item.rsrc1.d < item.rsrc2.d; // BLTU + 3'b111 : return item.rsrc1.d >= item.rsrc2.d; // BGEU + default: return False; + endcase; + endfunction + + // 函数：ALU，得到算术逻辑计算结果 --------------------------------------------------------------------------------------------- + // 用在 EX段 + function Bit#(32) alu(InstrItem item); + Bit#(5) shamti = truncate(item.immu); + Bit#(5) shamtr = truncate(item.rsrc2.d); + int item_rsrc1_s = unpack(item.rsrc1.d); + int item_rsrc2_s = unpack(item.rsrc2.d); + int imms = unpack(item.immu); + return case( {item.funct7, item.funct3, pack(item.opcode)} ) matches + 17'b???????_???_110?111 : return item.pc + 4; // JAL, JALR + 17'b???????_???_0110111 : return item.immu; // LUI + 17'b???????_???_0010111 : return item.pc + item.immu; // AUIPC + 17'b0000000_000_0110011 : return item.rsrc1.d + item.rsrc2.d; // ADD + 17'b???????_000_0010011 : return item.rsrc1.d + item.immu; // ADDI + 17'b0100000_000_0110011 : return item.rsrc1.d - item.rsrc2.d; // SUB + 17'b0000000_100_0110011 : return item.rsrc1.d ^ item.rsrc2.d; // XOR + 17'b???????_100_0010011 : return item.rsrc1.d ^ item.immu; // XORI + 17'b0000000_110_0110011 : return item.rsrc1.d | item.rsrc2.d; // OR + 17'b???????_110_0010011 : return item.rsrc1.d | item.immu; // ORI + 17'b0000000_111_0110011 : return item.rsrc1.d & item.rsrc2.d; // AND + 17'b???????_111_0010011 : return item.rsrc1.d & item.immu; // ANDI + 17'b0000000_001_0110011 : return item.rsrc1.d << shamtr; // SLL + 17'b0000000_001_0010011 : return item.rsrc1.d << shamti; // SLLI + 17'b0000000_101_0110011 : return item.rsrc1.d >> shamtr; // SRL + 17'b0000000_101_0010011 : return item.rsrc1.d >> shamti; // SRL + 17'b0100000_101_0110011 : return unpack(pack(item_rsrc1_s >> shamtr)); // SRA + 17'b0100000_101_0010011 : return unpack(pack(item_rsrc1_s >> shamti)); // SRAI + 17'b0000000_010_0110011 : return (item_rsrc1_s < item_rsrc2_s) ? 1 : 0; // SLT + 17'b???????_010_0010011 : return (item_rsrc1_s < imms ) ? 1 : 0; // SLTI + 17'b0000000_011_0110011 : return (item.rsrc1.d < item.rsrc2.d) ? 1 : 0; // SLTU + 17'b???????_011_0010011 : return (item.rsrc1.d < item.immu ) ? 1 : 0; // SLTIU + default : return 0; + endcase; + endfunction + + // 函数：dbus_adapt_req，对读写请求进行访存转换（构建读写请求） --------------------------------------------------------------------------------------------- + // 用在 EX段 + function Tuple4#(Bool, Bit#(4), Bit#(32), Bit#(32)) dbus_adapt_req(InstrItem item); + Bit#(4) byte_en = 0; + Bit#(32) addr = item.rsrc1.d + item.immu; + Bit#(32) wdata = item.rsrc2.d; + if(item.store) + case (item.funct3) matches + 3'b?00 : begin byte_en = 'b0001 << addr[1:0]; wdata = wdata << {addr[1:0],3'd0}; end + 3'b?01 : begin byte_en = 'b0011 << addr[1:0]; wdata = wdata << {addr[1:0],3'd0}; end + default: byte_en = 'b1111; + endcase + return tuple4(item.store, byte_en, (addr>>2<<2), wdata); + endfunction + + // 函数：dbus_adapt_rdata，对读响应进行访存转换 --------------------------------------------------------------------------------------------- + // 用在 EX段 + function Bit#(32) dbus_adapt_rdata(InstrItem item, Bit#(32) rdata); + Bit#(32) addr = item.rsrc1.d + item.immu; + Bit#(5) shamt = {addr[1:0],3'd0}; + return case (item.funct3) matches + 3'b000 : return signExtend( (rdata>>shamt)[ 7:0] ); + 3'b100 : return zeroExtend( (rdata>>shamt)[ 7:0] ); + 3'b001 : return signExtend( (rdata>>shamt)[15:0] ); + 3'b101 : return zeroExtend( (rdata>>shamt)[15:0] ); + default: return rdata; + endcase; + endfunction + + // Register file 32bit*32 --------------------------------------------------------------------------------------------- + Vector#(32, Reg#(Bit#(32))) regfile <- replicateM( mkReg(0) ); // To get the Next PC --------------------------------------------------------------------------------------------- - FIFOF#(UInt#(32)) if_pc <- mkSizedBypassFIFOF(2); - FIFOF#(UInt#(32)) id_pc <- mkFIFOF; - FIFOF#(UInt#(32)) id_instr <- mkBypassFIFOF; - FIFOF#(InstrItem) ex_reg <- mkDFIFOF(unpack('0)); - FIFOF#(InstrItem) wb_reg <- mkDFIFOF(unpack('0)); - FIFOF#(Tuple3#(Bool, UInt#(32), UInt#(32))) loadstore_fifo <- mkBypassFIFOF; - Wire#(Maybe#(UInt#(32))) wb_load_data <- mkDWire(tagged Invalid); + Reg#(Maybe#(Bit#(32))) boot_pc <- mkDReg(tagged Invalid); + FIFOF#(Bit#(32)) if_pc <- mkSizedBypassFIFOF(2); + FIFOF#(Bit#(32)) id_pc <- mkFIFOF; + FIFOF#(Bit#(32)) id_instr <- mkBypassFIFOF; + FIFOF#(InstrItem) ex <- mkDFIFOF(unpack('0)); + Reg#(RegItem) wb <- mkDReg(unpack('0)); + FIFOF#(InstrItem) ld <- mkDFIFOF1(unpack('0)); + FIFOF#(Tuple4#(Bool, Bit#(4), Bit#(32), Bit#(32))) lsq <- mkBypassFIFOF; (* conflict_free = "ex_stage, id_stage" *) - (* descending_urgency = "boot, ex_stage" *) - (* descending_urgency = "boot, id_stage" *) + (* descending_urgency = "enq_boot_pc, ex_stage" *) + (* descending_urgency = "enq_boot_pc, id_stage" *) + (* mutually_exclusive = "dbus_resp, wb_stage" *) // 2. ID (Instruction Decode) stage ----------------------------------------------------------------- rule id_stage; - InstrItem item = decode(pack(id_instr.first)); + InstrItem item = decode(id_instr.first); item.pc = id_pc.first; // register bypass read logic - UInt#(32) forward_data = wb_reg.first.load ? fromMaybe(0, wb_load_data) : wb_reg.first.rdst.d; - item.rsrc1.d = (item.rsrc1.e && wb_reg.first.rdst.e && item.rsrc1.a == wb_reg.first.rdst.a) ? forward_data : regfile[item.rsrc1.a]; - item.rsrc2.d = (item.rsrc2.e && wb_reg.first.rdst.e && item.rsrc2.a == wb_reg.first.rdst.a) ? forward_data : regfile[item.rsrc2.a]; + item.rsrc1.d = (item.rsrc1.e && wb.e && item.rsrc1.a == wb.a) ? wb.d : regfile[item.rsrc1.a]; + item.rsrc2.d = (item.rsrc2.e && wb.e && item.rsrc2.a == wb.a) ? wb.d : regfile[item.rsrc2.a]; // If there's no hazard, push this instruction to EX stage - if( !( wb_reg.first.load && (item.rsrc1.e && item.rsrc1.a == wb_reg.first.rdst.a || item.rsrc2.e && item.rsrc2.a == wb_reg.first.rdst.a ) && !isValid(wb_load_data) ) && // NO hazard with wb_stage (load data not ready) - !( ex_reg.first.rdst.e && (item.rsrc1.e && item.rsrc1.a == ex_reg.first.rdst.a || item.rsrc2.e && item.rsrc2.a == ex_reg.first.rdst.a ) ) ) begin // NO hazard with ex_stage + if( !( ld.first.load && (item.rsrc1.e && item.rsrc1.a == ld.first.rdst.a || item.rsrc2.e && item.rsrc2.a == ld.first.rdst.a) ) && // NO hazard with wb_stage + !( ex.first.rdst.e && (item.rsrc1.e && item.rsrc1.a == ex.first.rdst.a || item.rsrc2.e && item.rsrc2.a == ex.first.rdst.a) ) ) begin // NO hazard with ex_stage id_instr.deq; id_pc.deq; - ex_reg.enq(item); + ex.enq(item); if(item.opcode != JALR && item.opcode != BRANCH) if_pc.enq( item.opcode==JAL ? item.pc+item.immu : item.pc+4 ); end endrule // 3. EX&MEM (Execute and Memory Access) stage ----------------------------------------------------------------- - rule ex_stage; - InstrItem item = ex_reg.first; - ex_reg.deq; - if(item.opcode == JALR) - if_pc.enq( item.rsrc1.d + item.immu ); - else if(item.opcode == BRANCH) - if_pc.enq( item.pc + (is_branch(item) ? item.immu : 4) ); + rule ex_stage; + ex.deq; + InstrItem item = ex.first; + + case( item.opcode ) + JALR : if_pc.enq( item.rsrc1.d + item.immu ); + BRANCH : if_pc.enq( item.pc + (is_branch(item) ? item.immu : 4) ); + endcase - if(item.store || item.load) - loadstore_fifo.enq( tuple3(item.store, item.rsrc1.d+item.immu, item.rsrc2.d) ); - if(item.rdst.e) begin + if(item.store || item.load) begin + lsq.enq( dbus_adapt_req(item) ); + if(item.load) + ld.enq(item); + end else begin item.rdst.d = alu(item); - wb_reg.enq(item); + wb <= item.rdst; end endrule // 4. WB (Register Write Back) stage ----------------------------------------------------------------- - rule wb_stage; - InstrItem item = wb_reg.first; - if(item.load) begin - if(isValid(wb_load_data)) begin - regfile[item.rdst.a] <= fromMaybe(0, wb_load_data); - wb_reg.deq; - end - end else if(item.rdst.e) begin - regfile[item.rdst.a] <= item.rdst.d; - wb_reg.deq; - end + rule wb_stage (wb.e); + regfile[wb.a] <= wb.d; + endrule + + rule enq_boot_pc (isValid(boot_pc)); + if_pc.enq( fromMaybe(0, boot_pc) ); endrule + // CPU boot ----------------------------------------------------------------------------------------------------------------------------------------- + method Action boot(Bit#(32) boot_addr); + boot_pc <= tagged Valid boot_addr; + endmethod + // instr bus interface (methods) ------------------------------------------------------------------------------------------------------------------------------- - method ibus_addr = if_pc.first; + method ibus_req = if_pc.first; - method Action ibus_next; - id_pc.enq(if_pc.first); + method Action ibus_reqx; if_pc.deq; + id_pc.enq(if_pc.first); endmethod - method ibus_rdata = id_instr.enq; + method ibus_resp = id_instr.enq; // data bus interface (methods) ------------------------------------------------------------------------------------------------------------------------------- - method dbus_addr_wdata = loadstore_fifo.first; + method dbus_req = lsq.first; - method dbus_next = loadstore_fifo.deq; - - method Action dbus_rdata(UInt#(32) read_data) if(wb_reg.first.load); - wb_load_data <= tagged Valid read_data; - endmethod + method dbus_reqx = lsq.deq; - // CPU boot (boot) ----------------------------------------------------------------------------------------------------------------------------------------- - method Action boot(UInt#(32) boot_addr); - if_pc.enq( boot_addr ); + method Action dbus_resp(Bit#(32) rdata) if(ld.first.load); + ld.deq; + regfile[ld.first.rdst.a] <= dbus_adapt_rdata(ld.first, rdata); endmethod endmodule - -// 模块：CPU testbench -module mkTb (); - // 指定指令流文件, 仿真时 CPU 会运行其中的指令流 - String instruction_stream_filename = "instruction_stream/instruction_stream_quicksort.txt"; - - BRAM1Port#(UInt#(32), UInt#(32)) instr_ram <- mkBRAM1Server( BRAM_Configure{memorySize:4096, latency:1, outFIFODepth:3, allowWriteResponseBypass:False, loadFormat: tagged Hex instruction_stream_filename} ); - BRAM2Port#(UInt#(32), UInt#(32)) data_ram <- mkBRAM2Server( BRAM_Configure{memorySize:4096, latency:1, outFIFODepth:3, allowWriteResponseBypass:False, loadFormat: None} ); - - CPU_ifc cpu <- mkRv32iCPU; - - UInt#(32) endCycle = 15000; - Reg#(UInt#(32)) cycle <- mkReg(0); // clock cycle count - Reg#(UInt#(32)) count <- mkReg(0); // instruction fetched count - - rule up_cycle; - cycle <= cycle + 1; - if(cycle > endCycle+60) $finish; - endrule - - rule cpu_start (cycle == 0); - cpu.boot(0); - endrule - - // CPU指令总线请求 - rule cpu_instr_request;// (cycle%10==0 || cycle%10==1 || cycle%10==3 || cycle%10==4 || cycle%10==7 || cycle%10==9); // 加入条件，可以验证指令总线停顿功能 - UInt#(32) instr_addr = cpu.ibus_addr; - cpu.ibus_next; - instr_ram.portA.request.put( BRAMRequest{write:False, responseOnWrite:False, address: instr_addr/4, datain: 0} ); - - count <= count + 1; - //if(cycle < endCycle) - // $display("cycle=%7d count=%7d pc/4=%7d", cycle, count, instr_addr/4); - endrule - - // CPU指令总线响应 - rule cpu_instr_read_response; - UInt#(32) instr <- instr_ram.portA.response.get(); - cpu.ibus_rdata(instr); - endrule - - // CPU数据总线请求 - rule cpu_data_request;// (cycle>100 && (cycle%10==0 || cycle%10==2|| cycle%10==5 || cycle%10==7 || cycle%10==8)); // 加入条件，可以验证数据总线停顿功能 - match { .is_write, .addr, .data } = cpu.dbus_addr_wdata; - cpu.dbus_next; - data_ram.portA.request.put( BRAMRequest{write: is_write, responseOnWrite: False, address: addr/4, datain: data} ); - endrule - - // CPU数据总线响应 - rule cpu_data_read_response; - UInt#(32) read_data <- data_ram.portA.response.get(); - cpu.dbus_rdata(read_data); - endrule - - // 仿真的最后，读 dataram 并打印 - rule data_ram_dump_req (cycle >= endCycle && cycle < endCycle+40); - data_ram.portB.request.put( BRAMRequest{write: False, responseOnWrite: False, address: cycle-endCycle, datain: 0} ); - endrule - - // 打印 dataram - rule data_ram_dump_resp; - UInt#(32) read_data <- data_ram.portB.response.get(); - int read_data_signed = unpack(pack(read_data)); - $display("%d", read_data_signed); - endrule - -endmodule - endpackage diff --git a/src/Rv32iCPU/TbRv32iCPU.bsv b/src/Rv32iCPU/TbRv32iCPU.bsv new file mode 100644 index 0000000..741be56 --- /dev/null +++ b/src/Rv32iCPU/TbRv32iCPU.bsv @@ -0,0 +1,88 @@ +// Copyright(c) 2022 https://github.com/WangXuan95 + +package TbRv32iCPU; + +import StmtFSM::*; +import BRAM::*; + +import Rv32iCPU::*; + + +// 模块：CPU testbench +module mkTb (); + + String filename_instruction = "benchmark/qsort_instruction.txt"; // 指定指令流文件, 仿真时 CPU 会运行其中的指令流 + String filename_data = "benchmark/no_data.txt"; // 指定数据流文件, 作为数据 RAM 的初始数据 + Bit#(32) print_data_count = 40; // 在仿真结束前打印数据 RAM 中的前 print_data_count 个数据 + + // 把 latency 从 1 修改为 2 来模拟 ibus 和 dbus 的响应停顿 + BRAM1Port#(Bit#(32), Bit#(32)) instr_ram <- mkBRAM1Server ( BRAM_Configure{memorySize:16384, latency:1, outFIFODepth:3, allowWriteResponseBypass:False, loadFormat: tagged Hex filename_instruction} ); + BRAM2PortBE#(Bit#(32), Bit#(32), 4) data_ram <- mkBRAM2ServerBE( BRAM_Configure{memorySize:16384, latency:1, outFIFODepth:3, allowWriteResponseBypass:False, loadFormat: tagged Hex filename_data } ); + + let cpu <- mkRv32iCPU; + + Reg#(Bit#(32)) cyc <- mkReg(0); + Reg#(Bit#(32)) cnt <- mkReg(0); + Reg#(Bit#(32)) lastpc <- mkReg('1); + + rule up_cycle; + cyc <= cyc + 1; + endrule + + + // 主状态机：组织仿真行为 + mkAutoFSM( seq + cpu.boot(0); + + // 执行指令，在无限跳转到自身时停止 + while ( lastpc != cpu.ibus_req ) seq + action + cpu.ibus_reqx; + instr_ram.portA.request.put( BRAMRequest{write:False, responseOnWrite:False, address: cpu.ibus_req/4, datain: 0} ); + cnt <= cnt + 1; + lastpc <= cpu.ibus_req; + //$display("done: cycle=%7d instructions=%7d pc/4=%7d", cyc, cnt, cpu.ibus_req/4 ); + endaction + //delay(1); // 加入延迟，模拟 ibus 总线请求停顿 + endseq + + delay(9); + + $display("final: cycle=%5d instructions=%5d 100*cpi=%4d pc/4=%5d", cyc, cnt, 100*cyc/cnt, lastpc/4 ); + + // 打印 Data RAM 中的一些数据 + for ( cnt<=0 ; cnt: - 10080: 00000013 nop - 00010084 : 10084: 00000093 li ra,0 10088: 00000113 li sp,0 @@ -2718,5 +2709,3 @@ Disassembly of section .text: 00012350 : 12350: 00000a6f jal s4,12350 - 12354: c0001073 unimp - ... diff --git a/src/Rv32iCPU/instruction_stream/instruction_stream_testA.txt b/src/Rv32iCPU/benchmark/testA_instruction.txt similarity index 99% rename from src/Rv32iCPU/instruction_stream/instruction_stream_testA.txt rename to src/Rv32iCPU/benchmark/testA_instruction.txt index b852efa..a2d4e06 100644 --- a/src/Rv32iCPU/instruction_stream/instruction_stream_testA.txt +++ b/src/Rv32iCPU/benchmark/testA_instruction.txt @@ -1,4 +1,3 @@ -00000013 00000093 00000113 00208f33 @@ -2227,6 +2226,4 @@ ffc30067 00000a6f 00100193 00000a6f -c0001073 -00000000 00000000 diff --git a/src/Rv32iCPU/benchmark/testB_assembly.txt b/src/Rv32iCPU/benchmark/testB_assembly.txt new file mode 100644 index 0000000..1765577 --- /dev/null +++ b/src/Rv32iCPU/benchmark/testB_assembly.txt @@ -0,0 +1,3285 @@ +00010084 : + 10084: 00004097 auipc ra,0x4 + 10088: acc08093 addi ra,ra,-1332 # 13b50 + 1008c: 00008f03 lb t5,0(ra) + 10090: fff00e93 li t4,-1 + 10094: 0ed00193 li gp,237 + 10098: 01df0463 beq t5,t4,100a0 + 1009c: 25d0206f j 12af8 + +000100a0 : + 100a0: 00004097 auipc ra,0x4 + 100a4: ab008093 addi ra,ra,-1360 # 13b50 + 100a8: 00108f03 lb t5,1(ra) + 100ac: 00000e93 li t4,0 + 100b0: 0ee00193 li gp,238 + 100b4: 01df0463 beq t5,t4,100bc + 100b8: 2410206f j 12af8 + +000100bc : + 100bc: 00004097 auipc ra,0x4 + 100c0: a9408093 addi ra,ra,-1388 # 13b50 + 100c4: 00208f03 lb t5,2(ra) + 100c8: ff000e93 li t4,-16 + 100cc: 0ef00193 li gp,239 + 100d0: 01df0463 beq t5,t4,100d8 + 100d4: 2250206f j 12af8 + +000100d8 : + 100d8: 00004097 auipc ra,0x4 + 100dc: a7808093 addi ra,ra,-1416 # 13b50 + 100e0: 00308f03 lb t5,3(ra) + 100e4: 00f00e93 li t4,15 + 100e8: 0f000193 li gp,240 + 100ec: 01df0463 beq t5,t4,100f4 + 100f0: 2090206f j 12af8 + +000100f4 : + 100f4: 00004097 auipc ra,0x4 + 100f8: a5f08093 addi ra,ra,-1441 # 13b53 + 100fc: ffd08f03 lb t5,-3(ra) + 10100: fff00e93 li t4,-1 + 10104: 0f100193 li gp,241 + 10108: 01df0463 beq t5,t4,10110 + 1010c: 1ed0206f j 12af8 + +00010110 : + 10110: 00004097 auipc ra,0x4 + 10114: a4308093 addi ra,ra,-1469 # 13b53 + 10118: ffe08f03 lb t5,-2(ra) + 1011c: 00000e93 li t4,0 + 10120: 0f200193 li gp,242 + 10124: 01df0463 beq t5,t4,1012c + 10128: 1d10206f j 12af8 + +0001012c : + 1012c: 00004097 auipc ra,0x4 + 10130: a2708093 addi ra,ra,-1497 # 13b53 + 10134: fff08f03 lb t5,-1(ra) + 10138: ff000e93 li t4,-16 + 1013c: 0f300193 li gp,243 + 10140: 01df0463 beq t5,t4,10148 + 10144: 1b50206f j 12af8 + +00010148 : + 10148: 00004097 auipc ra,0x4 + 1014c: a0b08093 addi ra,ra,-1525 # 13b53 + 10150: 00008f03 lb t5,0(ra) + 10154: 00f00e93 li t4,15 + 10158: 0f400193 li gp,244 + 1015c: 01df0463 beq t5,t4,10164 + 10160: 1990206f j 12af8 + +00010164 : + 10164: 00004097 auipc ra,0x4 + 10168: 9ec08093 addi ra,ra,-1556 # 13b50 + 1016c: fe008093 addi ra,ra,-32 + 10170: 02008283 lb t0,32(ra) + 10174: fff00e93 li t4,-1 + 10178: 0f500193 li gp,245 + 1017c: 01d28463 beq t0,t4,10184 + 10180: 1790206f j 12af8 + +00010184 : + 10184: 00004097 auipc ra,0x4 + 10188: 9cc08093 addi ra,ra,-1588 # 13b50 + 1018c: ffa08093 addi ra,ra,-6 + 10190: 00708283 lb t0,7(ra) + 10194: 00000e93 li t4,0 + 10198: 0f600193 li gp,246 + 1019c: 01d28463 beq t0,t4,101a4 + 101a0: 1590206f j 12af8 + +000101a4 : + 101a4: 0f700193 li gp,247 + 101a8: 00000213 li tp,0 + 101ac: 00004097 auipc ra,0x4 + 101b0: 9a508093 addi ra,ra,-1627 # 13b51 + 101b4: 00108f03 lb t5,1(ra) + 101b8: 000f0313 mv t1,t5 + 101bc: ff000e93 li t4,-16 + 101c0: 01d30463 beq t1,t4,101c8 + 101c4: 1350206f j 12af8 + 101c8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 101cc: 00200293 li t0,2 + 101d0: fc521ee3 bne tp,t0,101ac + +000101d4 : + 101d4: 0f800193 li gp,248 + 101d8: 00000213 li tp,0 + 101dc: 00004097 auipc ra,0x4 + 101e0: 97608093 addi ra,ra,-1674 # 13b52 + 101e4: 00108f03 lb t5,1(ra) + 101e8: 00000013 nop + 101ec: 000f0313 mv t1,t5 + 101f0: 00f00e93 li t4,15 + 101f4: 01d30463 beq t1,t4,101fc + 101f8: 1010206f j 12af8 + 101fc: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10200: 00200293 li t0,2 + 10204: fc521ce3 bne tp,t0,101dc + +00010208 : + 10208: 0f900193 li gp,249 + 1020c: 00000213 li tp,0 + 10210: 00004097 auipc ra,0x4 + 10214: 94008093 addi ra,ra,-1728 # 13b50 + 10218: 00108f03 lb t5,1(ra) + 1021c: 00000013 nop + 10220: 00000013 nop + 10224: 000f0313 mv t1,t5 + 10228: 00000e93 li t4,0 + 1022c: 01d30463 beq t1,t4,10234 + 10230: 0c90206f j 12af8 + 10234: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10238: 00200293 li t0,2 + 1023c: fc521ae3 bne tp,t0,10210 + +00010240 : + 10240: 0fa00193 li gp,250 + 10244: 00000213 li tp,0 + 10248: 00004097 auipc ra,0x4 + 1024c: 90908093 addi ra,ra,-1783 # 13b51 + 10250: 00108f03 lb t5,1(ra) + 10254: ff000e93 li t4,-16 + 10258: 01df0463 beq t5,t4,10260 + 1025c: 09d0206f j 12af8 + 10260: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10264: 00200293 li t0,2 + 10268: fe5210e3 bne tp,t0,10248 + +0001026c : + 1026c: 0fb00193 li gp,251 + 10270: 00000213 li tp,0 + 10274: 00004097 auipc ra,0x4 + 10278: 8de08093 addi ra,ra,-1826 # 13b52 + 1027c: 00000013 nop + 10280: 00108f03 lb t5,1(ra) + 10284: 00f00e93 li t4,15 + 10288: 01df0463 beq t5,t4,10290 + 1028c: 06d0206f j 12af8 + 10290: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10294: 00200293 li t0,2 + 10298: fc521ee3 bne tp,t0,10274 + +0001029c : + 1029c: 0fc00193 li gp,252 + 102a0: 00000213 li tp,0 + 102a4: 00004097 auipc ra,0x4 + 102a8: 8ac08093 addi ra,ra,-1876 # 13b50 + 102ac: 00000013 nop + 102b0: 00000013 nop + 102b4: 00108f03 lb t5,1(ra) + 102b8: 00000e93 li t4,0 + 102bc: 01df0463 beq t5,t4,102c4 + 102c0: 0390206f j 12af8 + 102c4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 102c8: 00200293 li t0,2 + 102cc: fc521ce3 bne tp,t0,102a4 + +000102d0 : + 102d0: 00004297 auipc t0,0x4 + 102d4: 88028293 addi t0,t0,-1920 # 13b50 + 102d8: 00028103 lb sp,0(t0) + 102dc: 00200113 li sp,2 + 102e0: 00200e93 li t4,2 + 102e4: 0fd00193 li gp,253 + 102e8: 01d10463 beq sp,t4,102f0 + 102ec: 00d0206f j 12af8 + +000102f0 : + 102f0: 00004297 auipc t0,0x4 + 102f4: 86028293 addi t0,t0,-1952 # 13b50 + 102f8: 00028103 lb sp,0(t0) + 102fc: 00000013 nop + 10300: 00200113 li sp,2 + 10304: 00200e93 li t4,2 + 10308: 0fe00193 li gp,254 + 1030c: 01d10463 beq sp,t4,10314 + 10310: 7e80206f j 12af8 + +00010314 : + 10314: 00004097 auipc ra,0x4 + 10318: 83c08093 addi ra,ra,-1988 # 13b50 + 1031c: 0000cf03 lbu t5,0(ra) + 10320: 0ff00e93 li t4,255 + 10324: 0ff00193 li gp,255 + 10328: 01df0463 beq t5,t4,10330 + 1032c: 7cc0206f j 12af8 + +00010330 : + 10330: 00004097 auipc ra,0x4 + 10334: 82008093 addi ra,ra,-2016 # 13b50 + 10338: 0010cf03 lbu t5,1(ra) + 1033c: 00000e93 li t4,0 + 10340: 10000193 li gp,256 + 10344: 01df0463 beq t5,t4,1034c + 10348: 7b00206f j 12af8 + +0001034c : + 1034c: 00004097 auipc ra,0x4 + 10350: 80408093 addi ra,ra,-2044 # 13b50 + 10354: 0020cf03 lbu t5,2(ra) + 10358: 0f000e93 li t4,240 + 1035c: 10100193 li gp,257 + 10360: 01df0463 beq t5,t4,10368 + 10364: 7940206f j 12af8 + +00010368 : + 10368: 00003097 auipc ra,0x3 + 1036c: 7e808093 addi ra,ra,2024 # 13b50 + 10370: 0030cf03 lbu t5,3(ra) + 10374: 00f00e93 li t4,15 + 10378: 10200193 li gp,258 + 1037c: 01df0463 beq t5,t4,10384 + 10380: 7780206f j 12af8 + +00010384 : + 10384: 00003097 auipc ra,0x3 + 10388: 7cf08093 addi ra,ra,1999 # 13b53 + 1038c: ffd0cf03 lbu t5,-3(ra) + 10390: 0ff00e93 li t4,255 + 10394: 10300193 li gp,259 + 10398: 01df0463 beq t5,t4,103a0 + 1039c: 75c0206f j 12af8 + +000103a0 : + 103a0: 00003097 auipc ra,0x3 + 103a4: 7b308093 addi ra,ra,1971 # 13b53 + 103a8: ffe0cf03 lbu t5,-2(ra) + 103ac: 00000e93 li t4,0 + 103b0: 10400193 li gp,260 + 103b4: 01df0463 beq t5,t4,103bc + 103b8: 7400206f j 12af8 + +000103bc : + 103bc: 00003097 auipc ra,0x3 + 103c0: 79708093 addi ra,ra,1943 # 13b53 + 103c4: fff0cf03 lbu t5,-1(ra) + 103c8: 0f000e93 li t4,240 + 103cc: 10500193 li gp,261 + 103d0: 01df0463 beq t5,t4,103d8 + 103d4: 7240206f j 12af8 + +000103d8 : + 103d8: 00003097 auipc ra,0x3 + 103dc: 77b08093 addi ra,ra,1915 # 13b53 + 103e0: 0000cf03 lbu t5,0(ra) + 103e4: 00f00e93 li t4,15 + 103e8: 10600193 li gp,262 + 103ec: 01df0463 beq t5,t4,103f4 + 103f0: 7080206f j 12af8 + +000103f4 : + 103f4: 00003097 auipc ra,0x3 + 103f8: 75c08093 addi ra,ra,1884 # 13b50 + 103fc: fe008093 addi ra,ra,-32 + 10400: 0200c283 lbu t0,32(ra) + 10404: 0ff00e93 li t4,255 + 10408: 10700193 li gp,263 + 1040c: 01d28463 beq t0,t4,10414 + 10410: 6e80206f j 12af8 + +00010414 : + 10414: 00003097 auipc ra,0x3 + 10418: 73c08093 addi ra,ra,1852 # 13b50 + 1041c: ffa08093 addi ra,ra,-6 + 10420: 0070c283 lbu t0,7(ra) + 10424: 00000e93 li t4,0 + 10428: 10800193 li gp,264 + 1042c: 01d28463 beq t0,t4,10434 + 10430: 6c80206f j 12af8 + +00010434 : + 10434: 10900193 li gp,265 + 10438: 00000213 li tp,0 + 1043c: 00003097 auipc ra,0x3 + 10440: 71508093 addi ra,ra,1813 # 13b51 + 10444: 0010cf03 lbu t5,1(ra) + 10448: 000f0313 mv t1,t5 + 1044c: 0f000e93 li t4,240 + 10450: 01d30463 beq t1,t4,10458 + 10454: 6a40206f j 12af8 + 10458: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1045c: 00200293 li t0,2 + 10460: fc521ee3 bne tp,t0,1043c + +00010464 : + 10464: 10a00193 li gp,266 + 10468: 00000213 li tp,0 + 1046c: 00003097 auipc ra,0x3 + 10470: 6e608093 addi ra,ra,1766 # 13b52 + 10474: 0010cf03 lbu t5,1(ra) + 10478: 00000013 nop + 1047c: 000f0313 mv t1,t5 + 10480: 00f00e93 li t4,15 + 10484: 01d30463 beq t1,t4,1048c + 10488: 6700206f j 12af8 + 1048c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10490: 00200293 li t0,2 + 10494: fc521ce3 bne tp,t0,1046c + +00010498 : + 10498: 10b00193 li gp,267 + 1049c: 00000213 li tp,0 + 104a0: 00003097 auipc ra,0x3 + 104a4: 6b008093 addi ra,ra,1712 # 13b50 + 104a8: 0010cf03 lbu t5,1(ra) + 104ac: 00000013 nop + 104b0: 00000013 nop + 104b4: 000f0313 mv t1,t5 + 104b8: 00000e93 li t4,0 + 104bc: 01d30463 beq t1,t4,104c4 + 104c0: 6380206f j 12af8 + 104c4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 104c8: 00200293 li t0,2 + 104cc: fc521ae3 bne tp,t0,104a0 + +000104d0 : + 104d0: 10c00193 li gp,268 + 104d4: 00000213 li tp,0 + 104d8: 00003097 auipc ra,0x3 + 104dc: 67908093 addi ra,ra,1657 # 13b51 + 104e0: 0010cf03 lbu t5,1(ra) + 104e4: 0f000e93 li t4,240 + 104e8: 01df0463 beq t5,t4,104f0 + 104ec: 60c0206f j 12af8 + 104f0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 104f4: 00200293 li t0,2 + 104f8: fe5210e3 bne tp,t0,104d8 + +000104fc : + 104fc: 10d00193 li gp,269 + 10500: 00000213 li tp,0 + 10504: 00003097 auipc ra,0x3 + 10508: 64e08093 addi ra,ra,1614 # 13b52 + 1050c: 00000013 nop + 10510: 0010cf03 lbu t5,1(ra) + 10514: 00f00e93 li t4,15 + 10518: 01df0463 beq t5,t4,10520 + 1051c: 5dc0206f j 12af8 + 10520: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10524: 00200293 li t0,2 + 10528: fc521ee3 bne tp,t0,10504 + +0001052c : + 1052c: 10e00193 li gp,270 + 10530: 00000213 li tp,0 + 10534: 00003097 auipc ra,0x3 + 10538: 61c08093 addi ra,ra,1564 # 13b50 + 1053c: 00000013 nop + 10540: 00000013 nop + 10544: 0010cf03 lbu t5,1(ra) + 10548: 00000e93 li t4,0 + 1054c: 01df0463 beq t5,t4,10554 + 10550: 5a80206f j 12af8 + 10554: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10558: 00200293 li t0,2 + 1055c: fc521ce3 bne tp,t0,10534 + +00010560 : + 10560: 00003297 auipc t0,0x3 + 10564: 5f028293 addi t0,t0,1520 # 13b50 + 10568: 0002c103 lbu sp,0(t0) + 1056c: 00200113 li sp,2 + 10570: 00200e93 li t4,2 + 10574: 10f00193 li gp,271 + 10578: 01d10463 beq sp,t4,10580 + 1057c: 57c0206f j 12af8 + +00010580 : + 10580: 00003297 auipc t0,0x3 + 10584: 5d028293 addi t0,t0,1488 # 13b50 + 10588: 0002c103 lbu sp,0(t0) + 1058c: 00000013 nop + 10590: 00200113 li sp,2 + 10594: 00200e93 li t4,2 + 10598: 11000193 li gp,272 + 1059c: 01d10463 beq sp,t4,105a4 + 105a0: 5580206f j 12af8 + +000105a4 : + 105a4: 00003097 auipc ra,0x3 + 105a8: 5bc08093 addi ra,ra,1468 # 13b60 + 105ac: 00009f03 lh t5,0(ra) + 105b0: 0ff00e93 li t4,255 + 105b4: 11100193 li gp,273 + 105b8: 01df0463 beq t5,t4,105c0 + 105bc: 53c0206f j 12af8 + +000105c0 : + 105c0: 00003097 auipc ra,0x3 + 105c4: 5a008093 addi ra,ra,1440 # 13b60 + 105c8: 00209f03 lh t5,2(ra) + 105cc: f0000e93 li t4,-256 + 105d0: 11200193 li gp,274 + 105d4: 01df0463 beq t5,t4,105dc + 105d8: 5200206f j 12af8 + +000105dc : + 105dc: 00003097 auipc ra,0x3 + 105e0: 58408093 addi ra,ra,1412 # 13b60 + 105e4: 00409f03 lh t5,4(ra) + 105e8: 00001eb7 lui t4,0x1 + 105ec: ff0e8e93 addi t4,t4,-16 # ff0 <_start-0xf090> + 105f0: 11300193 li gp,275 + 105f4: 01df0463 beq t5,t4,105fc + 105f8: 5000206f j 12af8 + +000105fc : + 105fc: 00003097 auipc ra,0x3 + 10600: 56408093 addi ra,ra,1380 # 13b60 + 10604: 00609f03 lh t5,6(ra) + 10608: fffffeb7 lui t4,0xfffff + 1060c: 00fe8e93 addi t4,t4,15 # fffff00f <__global_pointer$+0xfffeabc7> + 10610: 11400193 li gp,276 + 10614: 01df0463 beq t5,t4,1061c + 10618: 4e00206f j 12af8 + +0001061c : + 1061c: 00003097 auipc ra,0x3 + 10620: 54a08093 addi ra,ra,1354 # 13b66 + 10624: ffa09f03 lh t5,-6(ra) + 10628: 0ff00e93 li t4,255 + 1062c: 11500193 li gp,277 + 10630: 01df0463 beq t5,t4,10638 + 10634: 4c40206f j 12af8 + +00010638 : + 10638: 00003097 auipc ra,0x3 + 1063c: 52e08093 addi ra,ra,1326 # 13b66 + 10640: ffc09f03 lh t5,-4(ra) + 10644: f0000e93 li t4,-256 + 10648: 11600193 li gp,278 + 1064c: 01df0463 beq t5,t4,10654 + 10650: 4a80206f j 12af8 + +00010654 : + 10654: 00003097 auipc ra,0x3 + 10658: 51208093 addi ra,ra,1298 # 13b66 + 1065c: ffe09f03 lh t5,-2(ra) + 10660: 00001eb7 lui t4,0x1 + 10664: ff0e8e93 addi t4,t4,-16 # ff0 <_start-0xf090> + 10668: 11700193 li gp,279 + 1066c: 01df0463 beq t5,t4,10674 + 10670: 4880206f j 12af8 + +00010674 : + 10674: 00003097 auipc ra,0x3 + 10678: 4f208093 addi ra,ra,1266 # 13b66 + 1067c: 00009f03 lh t5,0(ra) + 10680: fffffeb7 lui t4,0xfffff + 10684: 00fe8e93 addi t4,t4,15 # fffff00f <__global_pointer$+0xfffeabc7> + 10688: 11800193 li gp,280 + 1068c: 01df0463 beq t5,t4,10694 + 10690: 4680206f j 12af8 + +00010694 : + 10694: 00003097 auipc ra,0x3 + 10698: 4cc08093 addi ra,ra,1228 # 13b60 + 1069c: fe008093 addi ra,ra,-32 + 106a0: 02009283 lh t0,32(ra) + 106a4: 0ff00e93 li t4,255 + 106a8: 11900193 li gp,281 + 106ac: 01d28463 beq t0,t4,106b4 + 106b0: 4480206f j 12af8 + +000106b4 : + 106b4: 00003097 auipc ra,0x3 + 106b8: 4ac08093 addi ra,ra,1196 # 13b60 + 106bc: ffb08093 addi ra,ra,-5 + 106c0: 00709283 lh t0,7(ra) + 106c4: f0000e93 li t4,-256 + 106c8: 11a00193 li gp,282 + 106cc: 01d28463 beq t0,t4,106d4 + 106d0: 4280206f j 12af8 + +000106d4 : + 106d4: 11b00193 li gp,283 + 106d8: 00000213 li tp,0 + 106dc: 00003097 auipc ra,0x3 + 106e0: 48608093 addi ra,ra,1158 # 13b62 + 106e4: 00209f03 lh t5,2(ra) + 106e8: 000f0313 mv t1,t5 + 106ec: 00001eb7 lui t4,0x1 + 106f0: ff0e8e93 addi t4,t4,-16 # ff0 <_start-0xf090> + 106f4: 01d30463 beq t1,t4,106fc + 106f8: 4000206f j 12af8 + 106fc: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10700: 00200293 li t0,2 + 10704: fc521ce3 bne tp,t0,106dc + +00010708 : + 10708: 11c00193 li gp,284 + 1070c: 00000213 li tp,0 + 10710: 00003097 auipc ra,0x3 + 10714: 45408093 addi ra,ra,1108 # 13b64 + 10718: 00209f03 lh t5,2(ra) + 1071c: 00000013 nop + 10720: 000f0313 mv t1,t5 + 10724: fffffeb7 lui t4,0xfffff + 10728: 00fe8e93 addi t4,t4,15 # fffff00f <__global_pointer$+0xfffeabc7> + 1072c: 01d30463 beq t1,t4,10734 + 10730: 3c80206f j 12af8 + 10734: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10738: 00200293 li t0,2 + 1073c: fc521ae3 bne tp,t0,10710 + +00010740 : + 10740: 11d00193 li gp,285 + 10744: 00000213 li tp,0 + 10748: 00003097 auipc ra,0x3 + 1074c: 41808093 addi ra,ra,1048 # 13b60 + 10750: 00209f03 lh t5,2(ra) + 10754: 00000013 nop + 10758: 00000013 nop + 1075c: 000f0313 mv t1,t5 + 10760: f0000e93 li t4,-256 + 10764: 01d30463 beq t1,t4,1076c + 10768: 3900206f j 12af8 + 1076c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10770: 00200293 li t0,2 + 10774: fc521ae3 bne tp,t0,10748 + +00010778 : + 10778: 11e00193 li gp,286 + 1077c: 00000213 li tp,0 + 10780: 00003097 auipc ra,0x3 + 10784: 3e208093 addi ra,ra,994 # 13b62 + 10788: 00209f03 lh t5,2(ra) + 1078c: 00001eb7 lui t4,0x1 + 10790: ff0e8e93 addi t4,t4,-16 # ff0 <_start-0xf090> + 10794: 01df0463 beq t5,t4,1079c + 10798: 3600206f j 12af8 + 1079c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 107a0: 00200293 li t0,2 + 107a4: fc521ee3 bne tp,t0,10780 + +000107a8 : + 107a8: 11f00193 li gp,287 + 107ac: 00000213 li tp,0 + 107b0: 00003097 auipc ra,0x3 + 107b4: 3b408093 addi ra,ra,948 # 13b64 + 107b8: 00000013 nop + 107bc: 00209f03 lh t5,2(ra) + 107c0: fffffeb7 lui t4,0xfffff + 107c4: 00fe8e93 addi t4,t4,15 # fffff00f <__global_pointer$+0xfffeabc7> + 107c8: 01df0463 beq t5,t4,107d0 + 107cc: 32c0206f j 12af8 + 107d0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 107d4: 00200293 li t0,2 + 107d8: fc521ce3 bne tp,t0,107b0 + +000107dc : + 107dc: 12000193 li gp,288 + 107e0: 00000213 li tp,0 + 107e4: 00003097 auipc ra,0x3 + 107e8: 37c08093 addi ra,ra,892 # 13b60 + 107ec: 00000013 nop + 107f0: 00000013 nop + 107f4: 00209f03 lh t5,2(ra) + 107f8: f0000e93 li t4,-256 + 107fc: 01df0463 beq t5,t4,10804 + 10800: 2f80206f j 12af8 + 10804: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10808: 00200293 li t0,2 + 1080c: fc521ce3 bne tp,t0,107e4 + +00010810 : + 10810: 00003297 auipc t0,0x3 + 10814: 35028293 addi t0,t0,848 # 13b60 + 10818: 00029103 lh sp,0(t0) + 1081c: 00200113 li sp,2 + 10820: 00200e93 li t4,2 + 10824: 12100193 li gp,289 + 10828: 01d10463 beq sp,t4,10830 + 1082c: 2cc0206f j 12af8 + +00010830 : + 10830: 00003297 auipc t0,0x3 + 10834: 33028293 addi t0,t0,816 # 13b60 + 10838: 00029103 lh sp,0(t0) + 1083c: 00000013 nop + 10840: 00200113 li sp,2 + 10844: 00200e93 li t4,2 + 10848: 12200193 li gp,290 + 1084c: 01d10463 beq sp,t4,10854 + 10850: 2a80206f j 12af8 + +00010854 : + 10854: 00003097 auipc ra,0x3 + 10858: 30c08093 addi ra,ra,780 # 13b60 + 1085c: 0000df03 lhu t5,0(ra) + 10860: 0ff00e93 li t4,255 + 10864: 12300193 li gp,291 + 10868: 01df0463 beq t5,t4,10870 + 1086c: 28c0206f j 12af8 + +00010870 : + 10870: 00003097 auipc ra,0x3 + 10874: 2f008093 addi ra,ra,752 # 13b60 + 10878: 0020df03 lhu t5,2(ra) + 1087c: 00010eb7 lui t4,0x10 + 10880: f00e8e93 addi t4,t4,-256 # ff00 <_start-0x180> + 10884: 12400193 li gp,292 + 10888: 01df0463 beq t5,t4,10890 + 1088c: 26c0206f j 12af8 + +00010890 : + 10890: 00003097 auipc ra,0x3 + 10894: 2d008093 addi ra,ra,720 # 13b60 + 10898: 0040df03 lhu t5,4(ra) + 1089c: 00001eb7 lui t4,0x1 + 108a0: ff0e8e93 addi t4,t4,-16 # ff0 <_start-0xf090> + 108a4: 12500193 li gp,293 + 108a8: 01df0463 beq t5,t4,108b0 + 108ac: 24c0206f j 12af8 + +000108b0 : + 108b0: 00003097 auipc ra,0x3 + 108b4: 2b008093 addi ra,ra,688 # 13b60 + 108b8: 0060df03 lhu t5,6(ra) + 108bc: 0000feb7 lui t4,0xf + 108c0: 00fe8e93 addi t4,t4,15 # f00f <_start-0x1071> + 108c4: 12600193 li gp,294 + 108c8: 01df0463 beq t5,t4,108d0 + 108cc: 22c0206f j 12af8 + +000108d0 : + 108d0: 00003097 auipc ra,0x3 + 108d4: 29608093 addi ra,ra,662 # 13b66 + 108d8: ffa0df03 lhu t5,-6(ra) + 108dc: 0ff00e93 li t4,255 + 108e0: 12700193 li gp,295 + 108e4: 01df0463 beq t5,t4,108ec + 108e8: 2100206f j 12af8 + +000108ec : + 108ec: 00003097 auipc ra,0x3 + 108f0: 27a08093 addi ra,ra,634 # 13b66 + 108f4: ffc0df03 lhu t5,-4(ra) + 108f8: 00010eb7 lui t4,0x10 + 108fc: f00e8e93 addi t4,t4,-256 # ff00 <_start-0x180> + 10900: 12800193 li gp,296 + 10904: 01df0463 beq t5,t4,1090c + 10908: 1f00206f j 12af8 + +0001090c : + 1090c: 00003097 auipc ra,0x3 + 10910: 25a08093 addi ra,ra,602 # 13b66 + 10914: ffe0df03 lhu t5,-2(ra) + 10918: 00001eb7 lui t4,0x1 + 1091c: ff0e8e93 addi t4,t4,-16 # ff0 <_start-0xf090> + 10920: 12900193 li gp,297 + 10924: 01df0463 beq t5,t4,1092c + 10928: 1d00206f j 12af8 + +0001092c : + 1092c: 00003097 auipc ra,0x3 + 10930: 23a08093 addi ra,ra,570 # 13b66 + 10934: 0000df03 lhu t5,0(ra) + 10938: 0000feb7 lui t4,0xf + 1093c: 00fe8e93 addi t4,t4,15 # f00f <_start-0x1071> + 10940: 12a00193 li gp,298 + 10944: 01df0463 beq t5,t4,1094c + 10948: 1b00206f j 12af8 + +0001094c : + 1094c: 00003097 auipc ra,0x3 + 10950: 21408093 addi ra,ra,532 # 13b60 + 10954: fe008093 addi ra,ra,-32 + 10958: 0200d283 lhu t0,32(ra) + 1095c: 0ff00e93 li t4,255 + 10960: 12b00193 li gp,299 + 10964: 01d28463 beq t0,t4,1096c + 10968: 1900206f j 12af8 + +0001096c : + 1096c: 00003097 auipc ra,0x3 + 10970: 1f408093 addi ra,ra,500 # 13b60 + 10974: ffb08093 addi ra,ra,-5 + 10978: 0070d283 lhu t0,7(ra) + 1097c: 00010eb7 lui t4,0x10 + 10980: f00e8e93 addi t4,t4,-256 # ff00 <_start-0x180> + 10984: 12c00193 li gp,300 + 10988: 01d28463 beq t0,t4,10990 + 1098c: 16c0206f j 12af8 + +00010990 : + 10990: 12d00193 li gp,301 + 10994: 00000213 li tp,0 + 10998: 00003097 auipc ra,0x3 + 1099c: 1ca08093 addi ra,ra,458 # 13b62 + 109a0: 0020df03 lhu t5,2(ra) + 109a4: 000f0313 mv t1,t5 + 109a8: 00001eb7 lui t4,0x1 + 109ac: ff0e8e93 addi t4,t4,-16 # ff0 <_start-0xf090> + 109b0: 01d30463 beq t1,t4,109b8 + 109b4: 1440206f j 12af8 + 109b8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 109bc: 00200293 li t0,2 + 109c0: fc521ce3 bne tp,t0,10998 + +000109c4 : + 109c4: 12e00193 li gp,302 + 109c8: 00000213 li tp,0 + 109cc: 00003097 auipc ra,0x3 + 109d0: 19808093 addi ra,ra,408 # 13b64 + 109d4: 0020df03 lhu t5,2(ra) + 109d8: 00000013 nop + 109dc: 000f0313 mv t1,t5 + 109e0: 0000feb7 lui t4,0xf + 109e4: 00fe8e93 addi t4,t4,15 # f00f <_start-0x1071> + 109e8: 01d30463 beq t1,t4,109f0 + 109ec: 10c0206f j 12af8 + 109f0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 109f4: 00200293 li t0,2 + 109f8: fc521ae3 bne tp,t0,109cc + +000109fc : + 109fc: 12f00193 li gp,303 + 10a00: 00000213 li tp,0 + 10a04: 00003097 auipc ra,0x3 + 10a08: 15c08093 addi ra,ra,348 # 13b60 + 10a0c: 0020df03 lhu t5,2(ra) + 10a10: 00000013 nop + 10a14: 00000013 nop + 10a18: 000f0313 mv t1,t5 + 10a1c: 00010eb7 lui t4,0x10 + 10a20: f00e8e93 addi t4,t4,-256 # ff00 <_start-0x180> + 10a24: 01d30463 beq t1,t4,10a2c + 10a28: 0d00206f j 12af8 + 10a2c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10a30: 00200293 li t0,2 + 10a34: fc5218e3 bne tp,t0,10a04 + +00010a38 : + 10a38: 13000193 li gp,304 + 10a3c: 00000213 li tp,0 + 10a40: 00003097 auipc ra,0x3 + 10a44: 12208093 addi ra,ra,290 # 13b62 + 10a48: 0020df03 lhu t5,2(ra) + 10a4c: 00001eb7 lui t4,0x1 + 10a50: ff0e8e93 addi t4,t4,-16 # ff0 <_start-0xf090> + 10a54: 01df0463 beq t5,t4,10a5c + 10a58: 0a00206f j 12af8 + 10a5c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10a60: 00200293 li t0,2 + 10a64: fc521ee3 bne tp,t0,10a40 + +00010a68 : + 10a68: 13100193 li gp,305 + 10a6c: 00000213 li tp,0 + 10a70: 00003097 auipc ra,0x3 + 10a74: 0f408093 addi ra,ra,244 # 13b64 + 10a78: 00000013 nop + 10a7c: 0020df03 lhu t5,2(ra) + 10a80: 0000feb7 lui t4,0xf + 10a84: 00fe8e93 addi t4,t4,15 # f00f <_start-0x1071> + 10a88: 01df0463 beq t5,t4,10a90 + 10a8c: 06c0206f j 12af8 + 10a90: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10a94: 00200293 li t0,2 + 10a98: fc521ce3 bne tp,t0,10a70 + +00010a9c : + 10a9c: 13200193 li gp,306 + 10aa0: 00000213 li tp,0 + 10aa4: 00003097 auipc ra,0x3 + 10aa8: 0bc08093 addi ra,ra,188 # 13b60 + 10aac: 00000013 nop + 10ab0: 00000013 nop + 10ab4: 0020df03 lhu t5,2(ra) + 10ab8: 00010eb7 lui t4,0x10 + 10abc: f00e8e93 addi t4,t4,-256 # ff00 <_start-0x180> + 10ac0: 01df0463 beq t5,t4,10ac8 + 10ac4: 0340206f j 12af8 + 10ac8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10acc: 00200293 li t0,2 + 10ad0: fc521ae3 bne tp,t0,10aa4 + +00010ad4 : + 10ad4: 00003297 auipc t0,0x3 + 10ad8: 08c28293 addi t0,t0,140 # 13b60 + 10adc: 0002d103 lhu sp,0(t0) + 10ae0: 00200113 li sp,2 + 10ae4: 00200e93 li t4,2 + 10ae8: 13300193 li gp,307 + 10aec: 01d10463 beq sp,t4,10af4 + 10af0: 0080206f j 12af8 + +00010af4 : + 10af4: 00003297 auipc t0,0x3 + 10af8: 06c28293 addi t0,t0,108 # 13b60 + 10afc: 0002d103 lhu sp,0(t0) + 10b00: 00000013 nop + 10b04: 00200113 li sp,2 + 10b08: 00200e93 li t4,2 + 10b0c: 13400193 li gp,308 + 10b10: 01d10463 beq sp,t4,10b18 + 10b14: 7e50106f j 12af8 + +00010b18 : + 10b18: 000000b7 lui ra,0x0 + 10b1c: 00000e93 li t4,0 + 10b20: 13500193 li gp,309 + 10b24: 01d08463 beq ra,t4,10b2c + 10b28: 7d10106f j 12af8 + +00010b2c : + 10b2c: fffff0b7 lui ra,0xfffff + 10b30: 4010d093 srai ra,ra,0x1 + 10b34: 80000e93 li t4,-2048 + 10b38: 13600193 li gp,310 + 10b3c: 01d08463 beq ra,t4,10b44 + 10b40: 7b90106f j 12af8 + +00010b44 : + 10b44: 7ffff0b7 lui ra,0x7ffff + 10b48: 4140d093 srai ra,ra,0x14 + 10b4c: 7ff00e93 li t4,2047 + 10b50: 13700193 li gp,311 + 10b54: 01d08463 beq ra,t4,10b5c + 10b58: 7a10106f j 12af8 + +00010b5c : + 10b5c: 800000b7 lui ra,0x80000 + 10b60: 4140d093 srai ra,ra,0x14 + 10b64: 80000e93 li t4,-2048 + 10b68: 13800193 li gp,312 + 10b6c: 01d08463 beq ra,t4,10b74 + 10b70: 7890106f j 12af8 + +00010b74 : + 10b74: 80000037 lui zero,0x80000 + 10b78: 00000e93 li t4,0 + 10b7c: 13900193 li gp,313 + 10b80: 01d00463 beq zero,t4,10b88 + 10b84: 7750106f j 12af8 + +00010b88 : + 10b88: 00003097 auipc ra,0x3 + 10b8c: ff808093 addi ra,ra,-8 # 13b80 + 10b90: 0000af03 lw t5,0(ra) + 10b94: 00ff0eb7 lui t4,0xff0 + 10b98: 0ffe8e93 addi t4,t4,255 # ff00ff <__global_pointer$+0xfdbcb7> + 10b9c: 13a00193 li gp,314 + 10ba0: 01df0463 beq t5,t4,10ba8 + 10ba4: 7550106f j 12af8 + +00010ba8 : + 10ba8: 00003097 auipc ra,0x3 + 10bac: fd808093 addi ra,ra,-40 # 13b80 + 10bb0: 0040af03 lw t5,4(ra) + 10bb4: ff010eb7 lui t4,0xff010 + 10bb8: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 10bbc: 13b00193 li gp,315 + 10bc0: 01df0463 beq t5,t4,10bc8 + 10bc4: 7350106f j 12af8 + +00010bc8 : + 10bc8: 00003097 auipc ra,0x3 + 10bcc: fb808093 addi ra,ra,-72 # 13b80 + 10bd0: 0080af03 lw t5,8(ra) + 10bd4: 0ff01eb7 lui t4,0xff01 + 10bd8: ff0e8e93 addi t4,t4,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 10bdc: 13c00193 li gp,316 + 10be0: 01df0463 beq t5,t4,10be8 + 10be4: 7150106f j 12af8 + +00010be8 : + 10be8: 00003097 auipc ra,0x3 + 10bec: f9808093 addi ra,ra,-104 # 13b80 + 10bf0: 00c0af03 lw t5,12(ra) + 10bf4: f00ffeb7 lui t4,0xf00ff + 10bf8: 00fe8e93 addi t4,t4,15 # f00ff00f <__global_pointer$+0xf00eabc7> + 10bfc: 13d00193 li gp,317 + 10c00: 01df0463 beq t5,t4,10c08 + 10c04: 6f50106f j 12af8 + +00010c08 : + 10c08: 00003097 auipc ra,0x3 + 10c0c: f8408093 addi ra,ra,-124 # 13b8c + 10c10: ff40af03 lw t5,-12(ra) + 10c14: 00ff0eb7 lui t4,0xff0 + 10c18: 0ffe8e93 addi t4,t4,255 # ff00ff <__global_pointer$+0xfdbcb7> + 10c1c: 13e00193 li gp,318 + 10c20: 01df0463 beq t5,t4,10c28 + 10c24: 6d50106f j 12af8 + +00010c28 : + 10c28: 00003097 auipc ra,0x3 + 10c2c: f6408093 addi ra,ra,-156 # 13b8c + 10c30: ff80af03 lw t5,-8(ra) + 10c34: ff010eb7 lui t4,0xff010 + 10c38: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 10c3c: 13f00193 li gp,319 + 10c40: 01df0463 beq t5,t4,10c48 + 10c44: 6b50106f j 12af8 + +00010c48 : + 10c48: 00003097 auipc ra,0x3 + 10c4c: f4408093 addi ra,ra,-188 # 13b8c + 10c50: ffc0af03 lw t5,-4(ra) + 10c54: 0ff01eb7 lui t4,0xff01 + 10c58: ff0e8e93 addi t4,t4,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 10c5c: 14000193 li gp,320 + 10c60: 01df0463 beq t5,t4,10c68 + 10c64: 6950106f j 12af8 + +00010c68 : + 10c68: 00003097 auipc ra,0x3 + 10c6c: f2408093 addi ra,ra,-220 # 13b8c + 10c70: 0000af03 lw t5,0(ra) + 10c74: f00ffeb7 lui t4,0xf00ff + 10c78: 00fe8e93 addi t4,t4,15 # f00ff00f <__global_pointer$+0xf00eabc7> + 10c7c: 14100193 li gp,321 + 10c80: 01df0463 beq t5,t4,10c88 + 10c84: 6750106f j 12af8 + +00010c88 : + 10c88: 00003097 auipc ra,0x3 + 10c8c: ef808093 addi ra,ra,-264 # 13b80 + 10c90: fe008093 addi ra,ra,-32 + 10c94: 0200a283 lw t0,32(ra) + 10c98: 00ff0eb7 lui t4,0xff0 + 10c9c: 0ffe8e93 addi t4,t4,255 # ff00ff <__global_pointer$+0xfdbcb7> + 10ca0: 14200193 li gp,322 + 10ca4: 01d28463 beq t0,t4,10cac + 10ca8: 6510106f j 12af8 + +00010cac : + 10cac: 00003097 auipc ra,0x3 + 10cb0: ed408093 addi ra,ra,-300 # 13b80 + 10cb4: ffd08093 addi ra,ra,-3 + 10cb8: 0070a283 lw t0,7(ra) + 10cbc: ff010eb7 lui t4,0xff010 + 10cc0: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 10cc4: 14300193 li gp,323 + 10cc8: 01d28463 beq t0,t4,10cd0 + 10ccc: 62d0106f j 12af8 + +00010cd0 : + 10cd0: 14400193 li gp,324 + 10cd4: 00000213 li tp,0 + 10cd8: 00003097 auipc ra,0x3 + 10cdc: eac08093 addi ra,ra,-340 # 13b84 + 10ce0: 0040af03 lw t5,4(ra) + 10ce4: 000f0313 mv t1,t5 + 10ce8: 0ff01eb7 lui t4,0xff01 + 10cec: ff0e8e93 addi t4,t4,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 10cf0: 01d30463 beq t1,t4,10cf8 + 10cf4: 6050106f j 12af8 + 10cf8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10cfc: 00200293 li t0,2 + 10d00: fc521ce3 bne tp,t0,10cd8 + +00010d04 : + 10d04: 14500193 li gp,325 + 10d08: 00000213 li tp,0 + 10d0c: 00003097 auipc ra,0x3 + 10d10: e7c08093 addi ra,ra,-388 # 13b88 + 10d14: 0040af03 lw t5,4(ra) + 10d18: 00000013 nop + 10d1c: 000f0313 mv t1,t5 + 10d20: f00ffeb7 lui t4,0xf00ff + 10d24: 00fe8e93 addi t4,t4,15 # f00ff00f <__global_pointer$+0xf00eabc7> + 10d28: 01d30463 beq t1,t4,10d30 + 10d2c: 5cd0106f j 12af8 + 10d30: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10d34: 00200293 li t0,2 + 10d38: fc521ae3 bne tp,t0,10d0c + +00010d3c : + 10d3c: 14600193 li gp,326 + 10d40: 00000213 li tp,0 + 10d44: 00003097 auipc ra,0x3 + 10d48: e3c08093 addi ra,ra,-452 # 13b80 + 10d4c: 0040af03 lw t5,4(ra) + 10d50: 00000013 nop + 10d54: 00000013 nop + 10d58: 000f0313 mv t1,t5 + 10d5c: ff010eb7 lui t4,0xff010 + 10d60: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 10d64: 01d30463 beq t1,t4,10d6c + 10d68: 5910106f j 12af8 + 10d6c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10d70: 00200293 li t0,2 + 10d74: fc5218e3 bne tp,t0,10d44 + +00010d78 : + 10d78: 14700193 li gp,327 + 10d7c: 00000213 li tp,0 + 10d80: 00003097 auipc ra,0x3 + 10d84: e0408093 addi ra,ra,-508 # 13b84 + 10d88: 0040af03 lw t5,4(ra) + 10d8c: 0ff01eb7 lui t4,0xff01 + 10d90: ff0e8e93 addi t4,t4,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 10d94: 01df0463 beq t5,t4,10d9c + 10d98: 5610106f j 12af8 + 10d9c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10da0: 00200293 li t0,2 + 10da4: fc521ee3 bne tp,t0,10d80 + +00010da8 : + 10da8: 14800193 li gp,328 + 10dac: 00000213 li tp,0 + 10db0: 00003097 auipc ra,0x3 + 10db4: dd808093 addi ra,ra,-552 # 13b88 + 10db8: 00000013 nop + 10dbc: 0040af03 lw t5,4(ra) + 10dc0: f00ffeb7 lui t4,0xf00ff + 10dc4: 00fe8e93 addi t4,t4,15 # f00ff00f <__global_pointer$+0xf00eabc7> + 10dc8: 01df0463 beq t5,t4,10dd0 + 10dcc: 52d0106f j 12af8 + 10dd0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10dd4: 00200293 li t0,2 + 10dd8: fc521ce3 bne tp,t0,10db0 + +00010ddc : + 10ddc: 14900193 li gp,329 + 10de0: 00000213 li tp,0 + 10de4: 00003097 auipc ra,0x3 + 10de8: d9c08093 addi ra,ra,-612 # 13b80 + 10dec: 00000013 nop + 10df0: 00000013 nop + 10df4: 0040af03 lw t5,4(ra) + 10df8: ff010eb7 lui t4,0xff010 + 10dfc: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 10e00: 01df0463 beq t5,t4,10e08 + 10e04: 4f50106f j 12af8 + 10e08: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10e0c: 00200293 li t0,2 + 10e10: fc521ae3 bne tp,t0,10de4 + +00010e14 : + 10e14: 00003297 auipc t0,0x3 + 10e18: d6c28293 addi t0,t0,-660 # 13b80 + 10e1c: 0002a103 lw sp,0(t0) + 10e20: 00200113 li sp,2 + 10e24: 00200e93 li t4,2 + 10e28: 14a00193 li gp,330 + 10e2c: 01d10463 beq sp,t4,10e34 + 10e30: 4c90106f j 12af8 + +00010e34 : + 10e34: 00003297 auipc t0,0x3 + 10e38: d4c28293 addi t0,t0,-692 # 13b80 + 10e3c: 0002a103 lw sp,0(t0) + 10e40: 00000013 nop + 10e44: 00200113 li sp,2 + 10e48: 00200e93 li t4,2 + 10e4c: 14b00193 li gp,331 + 10e50: 01d10463 beq sp,t4,10e58 + 10e54: 4a50106f j 12af8 + +00010e58 : + 10e58: ff0100b7 lui ra,0xff010 + 10e5c: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 10e60: 0f0f1137 lui sp,0xf0f1 + 10e64: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 10e68: 0020ef33 or t5,ra,sp + 10e6c: ff100eb7 lui t4,0xff100 + 10e70: f0fe8e93 addi t4,t4,-241 # ff0fff0f <__global_pointer$+0xff0ebac7> + 10e74: 14c00193 li gp,332 + 10e78: 01df0463 beq t5,t4,10e80 + 10e7c: 47d0106f j 12af8 + +00010e80 : + 10e80: 0ff010b7 lui ra,0xff01 + 10e84: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 10e88: f0f0f137 lui sp,0xf0f0f + 10e8c: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efaca8> + 10e90: 0020ef33 or t5,ra,sp + 10e94: fff10eb7 lui t4,0xfff10 + 10e98: ff0e8e93 addi t4,t4,-16 # fff0fff0 <__global_pointer$+0xffefbba8> + 10e9c: 14d00193 li gp,333 + 10ea0: 01df0463 beq t5,t4,10ea8 + 10ea4: 4550106f j 12af8 + +00010ea8 : + 10ea8: 00ff00b7 lui ra,0xff0 + 10eac: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdbcb7> + 10eb0: 0f0f1137 lui sp,0xf0f1 + 10eb4: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 10eb8: 0020ef33 or t5,ra,sp + 10ebc: 0fff1eb7 lui t4,0xfff1 + 10ec0: fffe8e93 addi t4,t4,-1 # fff0fff <__global_pointer$+0xffdcbb7> + 10ec4: 14e00193 li gp,334 + 10ec8: 01df0463 beq t5,t4,10ed0 + 10ecc: 42d0106f j 12af8 + +00010ed0 : + 10ed0: f00ff0b7 lui ra,0xf00ff + 10ed4: 00f08093 addi ra,ra,15 # f00ff00f <__global_pointer$+0xf00eabc7> + 10ed8: f0f0f137 lui sp,0xf0f0f + 10edc: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efaca8> + 10ee0: 0020ef33 or t5,ra,sp + 10ee4: f0fffeb7 lui t4,0xf0fff + 10ee8: 0ffe8e93 addi t4,t4,255 # f0fff0ff <__global_pointer$+0xf0feacb7> + 10eec: 14f00193 li gp,335 + 10ef0: 01df0463 beq t5,t4,10ef8 + 10ef4: 4050106f j 12af8 + +00010ef8 : + 10ef8: ff0100b7 lui ra,0xff010 + 10efc: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 10f00: 0f0f1137 lui sp,0xf0f1 + 10f04: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 10f08: 0020e0b3 or ra,ra,sp + 10f0c: ff100eb7 lui t4,0xff100 + 10f10: f0fe8e93 addi t4,t4,-241 # ff0fff0f <__global_pointer$+0xff0ebac7> + 10f14: 15000193 li gp,336 + 10f18: 01d08463 beq ra,t4,10f20 + 10f1c: 3dd0106f j 12af8 + +00010f20 : + 10f20: ff0100b7 lui ra,0xff010 + 10f24: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 10f28: 0f0f1137 lui sp,0xf0f1 + 10f2c: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 10f30: 0020e133 or sp,ra,sp + 10f34: ff100eb7 lui t4,0xff100 + 10f38: f0fe8e93 addi t4,t4,-241 # ff0fff0f <__global_pointer$+0xff0ebac7> + 10f3c: 15100193 li gp,337 + 10f40: 01d10463 beq sp,t4,10f48 + 10f44: 3b50106f j 12af8 + +00010f48 : + 10f48: ff0100b7 lui ra,0xff010 + 10f4c: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 10f50: 0010e0b3 or ra,ra,ra + 10f54: ff010eb7 lui t4,0xff010 + 10f58: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 10f5c: 15200193 li gp,338 + 10f60: 01d08463 beq ra,t4,10f68 + 10f64: 3950106f j 12af8 + +00010f68 : + 10f68: 00000213 li tp,0 + 10f6c: ff0100b7 lui ra,0xff010 + 10f70: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 10f74: 0f0f1137 lui sp,0xf0f1 + 10f78: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 10f7c: 0020ef33 or t5,ra,sp + 10f80: 000f0313 mv t1,t5 + 10f84: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10f88: 00200293 li t0,2 + 10f8c: fe5210e3 bne tp,t0,10f6c + 10f90: ff100eb7 lui t4,0xff100 + 10f94: f0fe8e93 addi t4,t4,-241 # ff0fff0f <__global_pointer$+0xff0ebac7> + 10f98: 15300193 li gp,339 + 10f9c: 01d30463 beq t1,t4,10fa4 + 10fa0: 3590106f j 12af8 + +00010fa4 : + 10fa4: 00000213 li tp,0 + 10fa8: 0ff010b7 lui ra,0xff01 + 10fac: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 10fb0: f0f0f137 lui sp,0xf0f0f + 10fb4: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efaca8> + 10fb8: 0020ef33 or t5,ra,sp + 10fbc: 00000013 nop + 10fc0: 000f0313 mv t1,t5 + 10fc4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10fc8: 00200293 li t0,2 + 10fcc: fc521ee3 bne tp,t0,10fa8 + 10fd0: fff10eb7 lui t4,0xfff10 + 10fd4: ff0e8e93 addi t4,t4,-16 # fff0fff0 <__global_pointer$+0xffefbba8> + 10fd8: 15400193 li gp,340 + 10fdc: 01d30463 beq t1,t4,10fe4 + 10fe0: 3190106f j 12af8 + +00010fe4 : + 10fe4: 00000213 li tp,0 + 10fe8: 00ff00b7 lui ra,0xff0 + 10fec: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdbcb7> + 10ff0: 0f0f1137 lui sp,0xf0f1 + 10ff4: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 10ff8: 0020ef33 or t5,ra,sp + 10ffc: 00000013 nop + 11000: 00000013 nop + 11004: 000f0313 mv t1,t5 + 11008: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1100c: 00200293 li t0,2 + 11010: fc521ce3 bne tp,t0,10fe8 + 11014: 0fff1eb7 lui t4,0xfff1 + 11018: fffe8e93 addi t4,t4,-1 # fff0fff <__global_pointer$+0xffdcbb7> + 1101c: 15500193 li gp,341 + 11020: 01d30463 beq t1,t4,11028 + 11024: 2d50106f j 12af8 + +00011028 : + 11028: 00000213 li tp,0 + 1102c: ff0100b7 lui ra,0xff010 + 11030: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 11034: 0f0f1137 lui sp,0xf0f1 + 11038: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 1103c: 0020ef33 or t5,ra,sp + 11040: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11044: 00200293 li t0,2 + 11048: fe5212e3 bne tp,t0,1102c + 1104c: ff100eb7 lui t4,0xff100 + 11050: f0fe8e93 addi t4,t4,-241 # ff0fff0f <__global_pointer$+0xff0ebac7> + 11054: 15600193 li gp,342 + 11058: 01df0463 beq t5,t4,11060 + 1105c: 29d0106f j 12af8 + +00011060 : + 11060: 00000213 li tp,0 + 11064: 0ff010b7 lui ra,0xff01 + 11068: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 1106c: f0f0f137 lui sp,0xf0f0f + 11070: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efaca8> + 11074: 00000013 nop + 11078: 0020ef33 or t5,ra,sp + 1107c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11080: 00200293 li t0,2 + 11084: fe5210e3 bne tp,t0,11064 + 11088: fff10eb7 lui t4,0xfff10 + 1108c: ff0e8e93 addi t4,t4,-16 # fff0fff0 <__global_pointer$+0xffefbba8> + 11090: 15700193 li gp,343 + 11094: 01df0463 beq t5,t4,1109c + 11098: 2610106f j 12af8 + +0001109c : + 1109c: 00000213 li tp,0 + 110a0: 00ff00b7 lui ra,0xff0 + 110a4: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdbcb7> + 110a8: 0f0f1137 lui sp,0xf0f1 + 110ac: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 110b0: 00000013 nop + 110b4: 00000013 nop + 110b8: 0020ef33 or t5,ra,sp + 110bc: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 110c0: 00200293 li t0,2 + 110c4: fc521ee3 bne tp,t0,110a0 + 110c8: 0fff1eb7 lui t4,0xfff1 + 110cc: fffe8e93 addi t4,t4,-1 # fff0fff <__global_pointer$+0xffdcbb7> + 110d0: 15800193 li gp,344 + 110d4: 01df0463 beq t5,t4,110dc + 110d8: 2210106f j 12af8 + +000110dc : + 110dc: 00000213 li tp,0 + 110e0: ff0100b7 lui ra,0xff010 + 110e4: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 110e8: 00000013 nop + 110ec: 0f0f1137 lui sp,0xf0f1 + 110f0: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 110f4: 0020ef33 or t5,ra,sp + 110f8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 110fc: 00200293 li t0,2 + 11100: fe5210e3 bne tp,t0,110e0 + 11104: ff100eb7 lui t4,0xff100 + 11108: f0fe8e93 addi t4,t4,-241 # ff0fff0f <__global_pointer$+0xff0ebac7> + 1110c: 15900193 li gp,345 + 11110: 01df0463 beq t5,t4,11118 + 11114: 1e50106f j 12af8 + +00011118 : + 11118: 00000213 li tp,0 + 1111c: 0ff010b7 lui ra,0xff01 + 11120: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 11124: 00000013 nop + 11128: f0f0f137 lui sp,0xf0f0f + 1112c: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efaca8> + 11130: 00000013 nop + 11134: 0020ef33 or t5,ra,sp + 11138: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1113c: 00200293 li t0,2 + 11140: fc521ee3 bne tp,t0,1111c + 11144: fff10eb7 lui t4,0xfff10 + 11148: ff0e8e93 addi t4,t4,-16 # fff0fff0 <__global_pointer$+0xffefbba8> + 1114c: 15a00193 li gp,346 + 11150: 01df0463 beq t5,t4,11158 + 11154: 1a50106f j 12af8 + +00011158 : + 11158: 00000213 li tp,0 + 1115c: 00ff00b7 lui ra,0xff0 + 11160: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdbcb7> + 11164: 00000013 nop + 11168: 00000013 nop + 1116c: 0f0f1137 lui sp,0xf0f1 + 11170: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 11174: 0020ef33 or t5,ra,sp + 11178: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1117c: 00200293 li t0,2 + 11180: fc521ee3 bne tp,t0,1115c + 11184: 0fff1eb7 lui t4,0xfff1 + 11188: fffe8e93 addi t4,t4,-1 # fff0fff <__global_pointer$+0xffdcbb7> + 1118c: 15b00193 li gp,347 + 11190: 01df0463 beq t5,t4,11198 + 11194: 1650106f j 12af8 + +00011198 : + 11198: 00000213 li tp,0 + 1119c: 0f0f1137 lui sp,0xf0f1 + 111a0: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 111a4: ff0100b7 lui ra,0xff010 + 111a8: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 111ac: 0020ef33 or t5,ra,sp + 111b0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 111b4: 00200293 li t0,2 + 111b8: fe5212e3 bne tp,t0,1119c + 111bc: ff100eb7 lui t4,0xff100 + 111c0: f0fe8e93 addi t4,t4,-241 # ff0fff0f <__global_pointer$+0xff0ebac7> + 111c4: 15c00193 li gp,348 + 111c8: 01df0463 beq t5,t4,111d0 + 111cc: 12d0106f j 12af8 + +000111d0 : + 111d0: 00000213 li tp,0 + 111d4: f0f0f137 lui sp,0xf0f0f + 111d8: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efaca8> + 111dc: 0ff010b7 lui ra,0xff01 + 111e0: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 111e4: 00000013 nop + 111e8: 0020ef33 or t5,ra,sp + 111ec: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 111f0: 00200293 li t0,2 + 111f4: fe5210e3 bne tp,t0,111d4 + 111f8: fff10eb7 lui t4,0xfff10 + 111fc: ff0e8e93 addi t4,t4,-16 # fff0fff0 <__global_pointer$+0xffefbba8> + 11200: 15d00193 li gp,349 + 11204: 01df0463 beq t5,t4,1120c + 11208: 0f10106f j 12af8 + +0001120c : + 1120c: 00000213 li tp,0 + 11210: 0f0f1137 lui sp,0xf0f1 + 11214: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 11218: 00ff00b7 lui ra,0xff0 + 1121c: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdbcb7> + 11220: 00000013 nop + 11224: 00000013 nop + 11228: 0020ef33 or t5,ra,sp + 1122c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11230: 00200293 li t0,2 + 11234: fc521ee3 bne tp,t0,11210 + 11238: 0fff1eb7 lui t4,0xfff1 + 1123c: fffe8e93 addi t4,t4,-1 # fff0fff <__global_pointer$+0xffdcbb7> + 11240: 15e00193 li gp,350 + 11244: 01df0463 beq t5,t4,1124c + 11248: 0b10106f j 12af8 + +0001124c : + 1124c: 00000213 li tp,0 + 11250: 0f0f1137 lui sp,0xf0f1 + 11254: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 11258: 00000013 nop + 1125c: ff0100b7 lui ra,0xff010 + 11260: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 11264: 0020ef33 or t5,ra,sp + 11268: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1126c: 00200293 li t0,2 + 11270: fe5210e3 bne tp,t0,11250 + 11274: ff100eb7 lui t4,0xff100 + 11278: f0fe8e93 addi t4,t4,-241 # ff0fff0f <__global_pointer$+0xff0ebac7> + 1127c: 15f00193 li gp,351 + 11280: 01df0463 beq t5,t4,11288 + 11284: 0750106f j 12af8 + +00011288 : + 11288: 00000213 li tp,0 + 1128c: f0f0f137 lui sp,0xf0f0f + 11290: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efaca8> + 11294: 00000013 nop + 11298: 0ff010b7 lui ra,0xff01 + 1129c: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 112a0: 00000013 nop + 112a4: 0020ef33 or t5,ra,sp + 112a8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 112ac: 00200293 li t0,2 + 112b0: fc521ee3 bne tp,t0,1128c + 112b4: fff10eb7 lui t4,0xfff10 + 112b8: ff0e8e93 addi t4,t4,-16 # fff0fff0 <__global_pointer$+0xffefbba8> + 112bc: 16000193 li gp,352 + 112c0: 01df0463 beq t5,t4,112c8 + 112c4: 0350106f j 12af8 + +000112c8 : + 112c8: 00000213 li tp,0 + 112cc: 0f0f1137 lui sp,0xf0f1 + 112d0: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dcac7> + 112d4: 00000013 nop + 112d8: 00000013 nop + 112dc: 00ff00b7 lui ra,0xff0 + 112e0: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdbcb7> + 112e4: 0020ef33 or t5,ra,sp + 112e8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 112ec: 00200293 li t0,2 + 112f0: fc521ee3 bne tp,t0,112cc + 112f4: 0fff1eb7 lui t4,0xfff1 + 112f8: fffe8e93 addi t4,t4,-1 # fff0fff <__global_pointer$+0xffdcbb7> + 112fc: 16100193 li gp,353 + 11300: 01df0463 beq t5,t4,11308 + 11304: 7f40106f j 12af8 + +00011308 : + 11308: ff0100b7 lui ra,0xff010 + 1130c: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 11310: 00106133 or sp,zero,ra + 11314: ff010eb7 lui t4,0xff010 + 11318: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 1131c: 16200193 li gp,354 + 11320: 01d10463 beq sp,t4,11328 + 11324: 7d40106f j 12af8 + +00011328 : + 11328: 00ff00b7 lui ra,0xff0 + 1132c: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdbcb7> + 11330: 0000e133 or sp,ra,zero + 11334: 00ff0eb7 lui t4,0xff0 + 11338: 0ffe8e93 addi t4,t4,255 # ff00ff <__global_pointer$+0xfdbcb7> + 1133c: 16300193 li gp,355 + 11340: 01d10463 beq sp,t4,11348 + 11344: 7b40106f j 12af8 + +00011348 : + 11348: 000060b3 or ra,zero,zero + 1134c: 00000e93 li t4,0 + 11350: 16400193 li gp,356 + 11354: 01d08463 beq ra,t4,1135c + 11358: 7a00106f j 12af8 + +0001135c : + 1135c: 111110b7 lui ra,0x11111 + 11360: 11108093 addi ra,ra,273 # 11111111 <__global_pointer$+0x110fccc9> + 11364: 22222137 lui sp,0x22222 + 11368: 22210113 addi sp,sp,546 # 22222222 <__global_pointer$+0x2220ddda> + 1136c: 0020e033 or zero,ra,sp + 11370: 00000e93 li t4,0 + 11374: 16500193 li gp,357 + 11378: 01d00463 beq zero,t4,11380 + 1137c: 77c0106f j 12af8 + +00011380 : + 11380: ff0100b7 lui ra,0xff010 + 11384: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 11388: f0f0ef13 ori t5,ra,-241 + 1138c: f0f00e93 li t4,-241 + 11390: 16600193 li gp,358 + 11394: 01df0463 beq t5,t4,1139c + 11398: 7600106f j 12af8 + +0001139c : + 1139c: 0ff010b7 lui ra,0xff01 + 113a0: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 113a4: 0f00ef13 ori t5,ra,240 + 113a8: 0ff01eb7 lui t4,0xff01 + 113ac: ff0e8e93 addi t4,t4,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 113b0: 16700193 li gp,359 + 113b4: 01df0463 beq t5,t4,113bc + 113b8: 7400106f j 12af8 + +000113bc : + 113bc: 00ff00b7 lui ra,0xff0 + 113c0: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdbcb7> + 113c4: 70f0ef13 ori t5,ra,1807 + 113c8: 00ff0eb7 lui t4,0xff0 + 113cc: 7ffe8e93 addi t4,t4,2047 # ff07ff <__global_pointer$+0xfdc3b7> + 113d0: 16800193 li gp,360 + 113d4: 01df0463 beq t5,t4,113dc + 113d8: 7200106f j 12af8 + +000113dc : + 113dc: f00ff0b7 lui ra,0xf00ff + 113e0: 00f08093 addi ra,ra,15 # f00ff00f <__global_pointer$+0xf00eabc7> + 113e4: 0f00ef13 ori t5,ra,240 + 113e8: f00ffeb7 lui t4,0xf00ff + 113ec: 0ffe8e93 addi t4,t4,255 # f00ff0ff <__global_pointer$+0xf00eacb7> + 113f0: 16900193 li gp,361 + 113f4: 01df0463 beq t5,t4,113fc + 113f8: 7000106f j 12af8 + +000113fc : + 113fc: ff0100b7 lui ra,0xff010 + 11400: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffbab8> + 11404: 0f00e093 ori ra,ra,240 + 11408: ff010eb7 lui t4,0xff010 + 1140c: ff0e8e93 addi t4,t4,-16 # ff00fff0 <__global_pointer$+0xfeffbba8> + 11410: 16a00193 li gp,362 + 11414: 01d08463 beq ra,t4,1141c + 11418: 6e00106f j 12af8 + +0001141c : + 1141c: 00000213 li tp,0 + 11420: 0ff010b7 lui ra,0xff01 + 11424: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 11428: 0f00ef13 ori t5,ra,240 + 1142c: 000f0313 mv t1,t5 + 11430: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11434: 00200293 li t0,2 + 11438: fe5214e3 bne tp,t0,11420 + 1143c: 0ff01eb7 lui t4,0xff01 + 11440: ff0e8e93 addi t4,t4,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 11444: 16b00193 li gp,363 + 11448: 01d30463 beq t1,t4,11450 + 1144c: 6ac0106f j 12af8 + +00011450 : + 11450: 00000213 li tp,0 + 11454: 00ff00b7 lui ra,0xff0 + 11458: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdbcb7> + 1145c: 70f0ef13 ori t5,ra,1807 + 11460: 00000013 nop + 11464: 000f0313 mv t1,t5 + 11468: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1146c: 00200293 li t0,2 + 11470: fe5212e3 bne tp,t0,11454 + 11474: 00ff0eb7 lui t4,0xff0 + 11478: 7ffe8e93 addi t4,t4,2047 # ff07ff <__global_pointer$+0xfdc3b7> + 1147c: 16c00193 li gp,364 + 11480: 01d30463 beq t1,t4,11488 + 11484: 6740106f j 12af8 + +00011488 : + 11488: 00000213 li tp,0 + 1148c: f00ff0b7 lui ra,0xf00ff + 11490: 00f08093 addi ra,ra,15 # f00ff00f <__global_pointer$+0xf00eabc7> + 11494: 0f00ef13 ori t5,ra,240 + 11498: 00000013 nop + 1149c: 00000013 nop + 114a0: 000f0313 mv t1,t5 + 114a4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 114a8: 00200293 li t0,2 + 114ac: fe5210e3 bne tp,t0,1148c + 114b0: f00ffeb7 lui t4,0xf00ff + 114b4: 0ffe8e93 addi t4,t4,255 # f00ff0ff <__global_pointer$+0xf00eacb7> + 114b8: 16d00193 li gp,365 + 114bc: 01d30463 beq t1,t4,114c4 + 114c0: 6380106f j 12af8 + +000114c4 : + 114c4: 00000213 li tp,0 + 114c8: 0ff010b7 lui ra,0xff01 + 114cc: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 114d0: 0f00ef13 ori t5,ra,240 + 114d4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 114d8: 00200293 li t0,2 + 114dc: fe5216e3 bne tp,t0,114c8 + 114e0: 0ff01eb7 lui t4,0xff01 + 114e4: ff0e8e93 addi t4,t4,-16 # ff00ff0 <__global_pointer$+0xfeecba8> + 114e8: 16e00193 li gp,366 + 114ec: 01df0463 beq t5,t4,114f4 + 114f0: 6080106f j 12af8 + +000114f4 : + 114f4: 00000213 li tp,0 + 114f8: 00ff00b7 lui ra,0xff0 + 114fc: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdbcb7> + 11500: 00000013 nop + 11504: f0f0ef13 ori t5,ra,-241 + 11508: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1150c: 00200293 li t0,2 + 11510: fe5214e3 bne tp,t0,114f8 + 11514: fff00e93 li t4,-1 + 11518: 16f00193 li gp,367 + 1151c: 01df0463 beq t5,t4,11524 + 11520: 5d80106f j 12af8 + +00011524 : + 11524: 00000213 li tp,0 + 11528: f00ff0b7 lui ra,0xf00ff + 1152c: 00f08093 addi ra,ra,15 # f00ff00f <__global_pointer$+0xf00eabc7> + 11530: 00000013 nop + 11534: 00000013 nop + 11538: 0f00ef13 ori t5,ra,240 + 1153c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11540: 00200293 li t0,2 + 11544: fe5212e3 bne tp,t0,11528 + 11548: f00ffeb7 lui t4,0xf00ff + 1154c: 0ffe8e93 addi t4,t4,255 # f00ff0ff <__global_pointer$+0xf00eacb7> + 11550: 17000193 li gp,368 + 11554: 01df0463 beq t5,t4,1155c + 11558: 5a00106f j 12af8 + +0001155c : + 1155c: 0f006093 ori ra,zero,240 + 11560: 0f000e93 li t4,240 + 11564: 17100193 li gp,369 + 11568: 01d08463 beq ra,t4,11570 + 1156c: 58c0106f j 12af8 + +00011570 : + 11570: 00ff00b7 lui ra,0xff0 + 11574: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdbcb7> + 11578: 70f0e013 ori zero,ra,1807 + 1157c: 00000e93 li t4,0 + 11580: 17200193 li gp,370 + 11584: 01d00463 beq zero,t4,1158c + 11588: 5700106f j 12af8 + +0001158c : + 1158c: 00002097 auipc ra,0x2 + 11590: 5c808093 addi ra,ra,1480 # 13b54 + 11594: faa00113 li sp,-86 + 11598: 00208023 sb sp,0(ra) + 1159c: 00008f03 lb t5,0(ra) + 115a0: faa00e93 li t4,-86 + 115a4: 17300193 li gp,371 + 115a8: 01df0463 beq t5,t4,115b0 + 115ac: 54c0106f j 12af8 + +000115b0 : + 115b0: 00002097 auipc ra,0x2 + 115b4: 5a408093 addi ra,ra,1444 # 13b54 + 115b8: 00000113 li sp,0 + 115bc: 002080a3 sb sp,1(ra) + 115c0: 00108f03 lb t5,1(ra) + 115c4: 00000e93 li t4,0 + 115c8: 17400193 li gp,372 + 115cc: 01df0463 beq t5,t4,115d4 + 115d0: 5280106f j 12af8 + +000115d4 : + 115d4: 00002097 auipc ra,0x2 + 115d8: 58008093 addi ra,ra,1408 # 13b54 + 115dc: fffff137 lui sp,0xfffff + 115e0: fa010113 addi sp,sp,-96 # ffffefa0 <__global_pointer$+0xfffeab58> + 115e4: 00208123 sb sp,2(ra) + 115e8: 00209f03 lh t5,2(ra) + 115ec: fffffeb7 lui t4,0xfffff + 115f0: fa0e8e93 addi t4,t4,-96 # ffffefa0 <__global_pointer$+0xfffeab58> + 115f4: 17500193 li gp,373 + 115f8: 01df0463 beq t5,t4,11600 + 115fc: 4fc0106f j 12af8 + +00011600 : + 11600: 00002097 auipc ra,0x2 + 11604: 55408093 addi ra,ra,1364 # 13b54 + 11608: 00a00113 li sp,10 + 1160c: 002081a3 sb sp,3(ra) + 11610: 00308f03 lb t5,3(ra) + 11614: 00a00e93 li t4,10 + 11618: 17600193 li gp,374 + 1161c: 01df0463 beq t5,t4,11624 + 11620: 4d80106f j 12af8 + +00011624 : + 11624: 00002097 auipc ra,0x2 + 11628: 53708093 addi ra,ra,1335 # 13b5b + 1162c: faa00113 li sp,-86 + 11630: fe208ea3 sb sp,-3(ra) + 11634: ffd08f03 lb t5,-3(ra) + 11638: faa00e93 li t4,-86 + 1163c: 17700193 li gp,375 + 11640: 01df0463 beq t5,t4,11648 + 11644: 4b40106f j 12af8 + +00011648 : + 11648: 00002097 auipc ra,0x2 + 1164c: 51308093 addi ra,ra,1299 # 13b5b + 11650: 00000113 li sp,0 + 11654: fe208f23 sb sp,-2(ra) + 11658: ffe08f03 lb t5,-2(ra) + 1165c: 00000e93 li t4,0 + 11660: 17800193 li gp,376 + 11664: 01df0463 beq t5,t4,1166c + 11668: 4900106f j 12af8 + +0001166c : + 1166c: 00002097 auipc ra,0x2 + 11670: 4ef08093 addi ra,ra,1263 # 13b5b + 11674: fa000113 li sp,-96 + 11678: fe208fa3 sb sp,-1(ra) + 1167c: fff08f03 lb t5,-1(ra) + 11680: fa000e93 li t4,-96 + 11684: 17900193 li gp,377 + 11688: 01df0463 beq t5,t4,11690 + 1168c: 46c0106f j 12af8 + +00011690 : + 11690: 00002097 auipc ra,0x2 + 11694: 4cb08093 addi ra,ra,1227 # 13b5b + 11698: 00a00113 li sp,10 + 1169c: 00208023 sb sp,0(ra) + 116a0: 00008f03 lb t5,0(ra) + 116a4: 00a00e93 li t4,10 + 116a8: 17a00193 li gp,378 + 116ac: 01df0463 beq t5,t4,116b4 + 116b0: 4480106f j 12af8 + +000116b4 : + 116b4: 00002097 auipc ra,0x2 + 116b8: 4a808093 addi ra,ra,1192 # 13b5c + 116bc: 12345137 lui sp,0x12345 + 116c0: 67810113 addi sp,sp,1656 # 12345678 <__global_pointer$+0x12331230> + 116c4: fe008213 addi tp,ra,-32 + 116c8: 02220023 sb sp,32(tp) # 20 <_start-0x10060> + 116cc: 00008283 lb t0,0(ra) + 116d0: 07800e93 li t4,120 + 116d4: 17b00193 li gp,379 + 116d8: 01d28463 beq t0,t4,116e0 + 116dc: 41c0106f j 12af8 + +000116e0 : + 116e0: 00002097 auipc ra,0x2 + 116e4: 47c08093 addi ra,ra,1148 # 13b5c + 116e8: 00003137 lui sp,0x3 + 116ec: 09810113 addi sp,sp,152 # 3098 <_start-0xcfe8> + 116f0: ffa08093 addi ra,ra,-6 + 116f4: 002083a3 sb sp,7(ra) + 116f8: 00002217 auipc tp,0x2 + 116fc: 46520213 addi tp,tp,1125 # 13b5d + 11700: 00020283 lb t0,0(tp) # 0 <_start-0x10080> + 11704: f9800e93 li t4,-104 + 11708: 17c00193 li gp,380 + 1170c: 01d28463 beq t0,t4,11714 + 11710: 3e80106f j 12af8 + +00011714 : + 11714: 17d00193 li gp,381 + 11718: 00000213 li tp,0 + 1171c: fdd00093 li ra,-35 + 11720: 00002117 auipc sp,0x2 + 11724: 43410113 addi sp,sp,1076 # 13b54 + 11728: 00110023 sb ra,0(sp) + 1172c: 00010f03 lb t5,0(sp) + 11730: fdd00e93 li t4,-35 + 11734: 01df0463 beq t5,t4,1173c + 11738: 3c00106f j 12af8 + 1173c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11740: 00200293 li t0,2 + 11744: fc521ce3 bne tp,t0,1171c + +00011748 : + 11748: 17e00193 li gp,382 + 1174c: 00000213 li tp,0 + 11750: fcd00093 li ra,-51 + 11754: 00002117 auipc sp,0x2 + 11758: 40010113 addi sp,sp,1024 # 13b54 + 1175c: 00000013 nop + 11760: 001100a3 sb ra,1(sp) + 11764: 00110f03 lb t5,1(sp) + 11768: fcd00e93 li t4,-51 + 1176c: 01df0463 beq t5,t4,11774 + 11770: 3880106f j 12af8 + 11774: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11778: 00200293 li t0,2 + 1177c: fc521ae3 bne tp,t0,11750 + +00011780 : + 11780: 17f00193 li gp,383 + 11784: 00000213 li tp,0 + 11788: fcc00093 li ra,-52 + 1178c: 00002117 auipc sp,0x2 + 11790: 3c810113 addi sp,sp,968 # 13b54 + 11794: 00000013 nop + 11798: 00000013 nop + 1179c: 00110123 sb ra,2(sp) + 117a0: 00210f03 lb t5,2(sp) + 117a4: fcc00e93 li t4,-52 + 117a8: 01df0463 beq t5,t4,117b0 + 117ac: 34c0106f j 12af8 + 117b0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 117b4: 00200293 li t0,2 + 117b8: fc5218e3 bne tp,t0,11788 + +000117bc : + 117bc: 18000193 li gp,384 + 117c0: 00000213 li tp,0 + 117c4: fbc00093 li ra,-68 + 117c8: 00000013 nop + 117cc: 00002117 auipc sp,0x2 + 117d0: 38810113 addi sp,sp,904 # 13b54 + 117d4: 001101a3 sb ra,3(sp) + 117d8: 00310f03 lb t5,3(sp) + 117dc: fbc00e93 li t4,-68 + 117e0: 01df0463 beq t5,t4,117e8 + 117e4: 3140106f j 12af8 + 117e8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 117ec: 00200293 li t0,2 + 117f0: fc521ae3 bne tp,t0,117c4 + +000117f4 : + 117f4: 18100193 li gp,385 + 117f8: 00000213 li tp,0 + 117fc: fbb00093 li ra,-69 + 11800: 00000013 nop + 11804: 00002117 auipc sp,0x2 + 11808: 35010113 addi sp,sp,848 # 13b54 + 1180c: 00000013 nop + 11810: 00110223 sb ra,4(sp) + 11814: 00410f03 lb t5,4(sp) + 11818: fbb00e93 li t4,-69 + 1181c: 01df0463 beq t5,t4,11824 + 11820: 2d80106f j 12af8 + 11824: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11828: 00200293 li t0,2 + 1182c: fc5218e3 bne tp,t0,117fc + +00011830 : + 11830: 18200193 li gp,386 + 11834: 00000213 li tp,0 + 11838: fab00093 li ra,-85 + 1183c: 00000013 nop + 11840: 00000013 nop + 11844: 00002117 auipc sp,0x2 + 11848: 31010113 addi sp,sp,784 # 13b54 + 1184c: 001102a3 sb ra,5(sp) + 11850: 00510f03 lb t5,5(sp) + 11854: fab00e93 li t4,-85 + 11858: 01df0463 beq t5,t4,11860 + 1185c: 29c0106f j 12af8 + 11860: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11864: 00200293 li t0,2 + 11868: fc5218e3 bne tp,t0,11838 + +0001186c : + 1186c: 18300193 li gp,387 + 11870: 00000213 li tp,0 + 11874: 00002117 auipc sp,0x2 + 11878: 2e010113 addi sp,sp,736 # 13b54 + 1187c: 03300093 li ra,51 + 11880: 00110023 sb ra,0(sp) + 11884: 00010f03 lb t5,0(sp) + 11888: 03300e93 li t4,51 + 1188c: 01df0463 beq t5,t4,11894 + 11890: 2680106f j 12af8 + 11894: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11898: 00200293 li t0,2 + 1189c: fc521ce3 bne tp,t0,11874 + +000118a0 : + 118a0: 18400193 li gp,388 + 118a4: 00000213 li tp,0 + 118a8: 00002117 auipc sp,0x2 + 118ac: 2ac10113 addi sp,sp,684 # 13b54 + 118b0: 02300093 li ra,35 + 118b4: 00000013 nop + 118b8: 001100a3 sb ra,1(sp) + 118bc: 00110f03 lb t5,1(sp) + 118c0: 02300e93 li t4,35 + 118c4: 01df0463 beq t5,t4,118cc + 118c8: 2300106f j 12af8 + 118cc: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 118d0: 00200293 li t0,2 + 118d4: fc521ae3 bne tp,t0,118a8 + +000118d8 : + 118d8: 18500193 li gp,389 + 118dc: 00000213 li tp,0 + 118e0: 00002117 auipc sp,0x2 + 118e4: 27410113 addi sp,sp,628 # 13b54 + 118e8: 02200093 li ra,34 + 118ec: 00000013 nop + 118f0: 00000013 nop + 118f4: 00110123 sb ra,2(sp) + 118f8: 00210f03 lb t5,2(sp) + 118fc: 02200e93 li t4,34 + 11900: 01df0463 beq t5,t4,11908 + 11904: 1f40106f j 12af8 + 11908: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1190c: 00200293 li t0,2 + 11910: fc5218e3 bne tp,t0,118e0 + +00011914 : + 11914: 18600193 li gp,390 + 11918: 00000213 li tp,0 + 1191c: 00002117 auipc sp,0x2 + 11920: 23810113 addi sp,sp,568 # 13b54 + 11924: 00000013 nop + 11928: 01200093 li ra,18 + 1192c: 001101a3 sb ra,3(sp) + 11930: 00310f03 lb t5,3(sp) + 11934: 01200e93 li t4,18 + 11938: 01df0463 beq t5,t4,11940 + 1193c: 1bc0106f j 12af8 + 11940: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11944: 00200293 li t0,2 + 11948: fc521ae3 bne tp,t0,1191c + +0001194c : + 1194c: 18700193 li gp,391 + 11950: 00000213 li tp,0 + 11954: 00002117 auipc sp,0x2 + 11958: 20010113 addi sp,sp,512 # 13b54 + 1195c: 00000013 nop + 11960: 01100093 li ra,17 + 11964: 00000013 nop + 11968: 00110223 sb ra,4(sp) + 1196c: 00410f03 lb t5,4(sp) + 11970: 01100e93 li t4,17 + 11974: 01df0463 beq t5,t4,1197c + 11978: 1800106f j 12af8 + 1197c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11980: 00200293 li t0,2 + 11984: fc5218e3 bne tp,t0,11954 + +00011988 : + 11988: 18800193 li gp,392 + 1198c: 00000213 li tp,0 + 11990: 00002117 auipc sp,0x2 + 11994: 1c410113 addi sp,sp,452 # 13b54 + 11998: 00000013 nop + 1199c: 00000013 nop + 119a0: 00100093 li ra,1 + 119a4: 001102a3 sb ra,5(sp) + 119a8: 00510f03 lb t5,5(sp) + 119ac: 00100e93 li t4,1 + 119b0: 01df0463 beq t5,t4,119b8 + 119b4: 1440106f j 12af8 + 119b8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 119bc: 00200293 li t0,2 + 119c0: fc5218e3 bne tp,t0,11990 + 119c4: 0ef00513 li a0,239 + 119c8: 00002597 auipc a1,0x2 + 119cc: 18c58593 addi a1,a1,396 # 13b54 + 119d0: 00a581a3 sb a0,3(a1) + +000119d4 : + 119d4: 00002097 auipc ra,0x2 + 119d8: 19408093 addi ra,ra,404 # 13b68 + 119dc: 0aa00113 li sp,170 + 119e0: 00209023 sh sp,0(ra) + 119e4: 00009f03 lh t5,0(ra) + 119e8: 0aa00e93 li t4,170 + 119ec: 18900193 li gp,393 + 119f0: 01df0463 beq t5,t4,119f8 + 119f4: 1040106f j 12af8 + +000119f8 : + 119f8: 00002097 auipc ra,0x2 + 119fc: 17008093 addi ra,ra,368 # 13b68 + 11a00: ffffb137 lui sp,0xffffb + 11a04: a0010113 addi sp,sp,-1536 # ffffaa00 <__global_pointer$+0xfffe65b8> + 11a08: 00209123 sh sp,2(ra) + 11a0c: 00209f03 lh t5,2(ra) + 11a10: ffffbeb7 lui t4,0xffffb + 11a14: a00e8e93 addi t4,t4,-1536 # ffffaa00 <__global_pointer$+0xfffe65b8> + 11a18: 18a00193 li gp,394 + 11a1c: 01df0463 beq t5,t4,11a24 + 11a20: 0d80106f j 12af8 + +00011a24 : + 11a24: 00002097 auipc ra,0x2 + 11a28: 14408093 addi ra,ra,324 # 13b68 + 11a2c: beef1137 lui sp,0xbeef1 + 11a30: aa010113 addi sp,sp,-1376 # beef0aa0 <__global_pointer$+0xbeedc658> + 11a34: 00209223 sh sp,4(ra) + 11a38: 0040af03 lw t5,4(ra) + 11a3c: beef1eb7 lui t4,0xbeef1 + 11a40: aa0e8e93 addi t4,t4,-1376 # beef0aa0 <__global_pointer$+0xbeedc658> + 11a44: 18b00193 li gp,395 + 11a48: 01df0463 beq t5,t4,11a50 + 11a4c: 0ac0106f j 12af8 + +00011a50 : + 11a50: 00002097 auipc ra,0x2 + 11a54: 11808093 addi ra,ra,280 # 13b68 + 11a58: ffffa137 lui sp,0xffffa + 11a5c: 00a10113 addi sp,sp,10 # ffffa00a <__global_pointer$+0xfffe5bc2> + 11a60: 00209323 sh sp,6(ra) + 11a64: 00609f03 lh t5,6(ra) + 11a68: ffffaeb7 lui t4,0xffffa + 11a6c: 00ae8e93 addi t4,t4,10 # ffffa00a <__global_pointer$+0xfffe5bc2> + 11a70: 18c00193 li gp,396 + 11a74: 01df0463 beq t5,t4,11a7c + 11a78: 0800106f j 12af8 + +00011a7c : + 11a7c: 00002097 auipc ra,0x2 + 11a80: 0fa08093 addi ra,ra,250 # 13b76 + 11a84: 0aa00113 li sp,170 + 11a88: fe209d23 sh sp,-6(ra) + 11a8c: ffa09f03 lh t5,-6(ra) + 11a90: 0aa00e93 li t4,170 + 11a94: 18d00193 li gp,397 + 11a98: 01df0463 beq t5,t4,11aa0 + 11a9c: 05c0106f j 12af8 + +00011aa0 : + 11aa0: 00002097 auipc ra,0x2 + 11aa4: 0d608093 addi ra,ra,214 # 13b76 + 11aa8: ffffb137 lui sp,0xffffb + 11aac: a0010113 addi sp,sp,-1536 # ffffaa00 <__global_pointer$+0xfffe65b8> + 11ab0: fe209e23 sh sp,-4(ra) + 11ab4: ffc09f03 lh t5,-4(ra) + 11ab8: ffffbeb7 lui t4,0xffffb + 11abc: a00e8e93 addi t4,t4,-1536 # ffffaa00 <__global_pointer$+0xfffe65b8> + 11ac0: 18e00193 li gp,398 + 11ac4: 01df0463 beq t5,t4,11acc + 11ac8: 0300106f j 12af8 + +00011acc : + 11acc: 00002097 auipc ra,0x2 + 11ad0: 0aa08093 addi ra,ra,170 # 13b76 + 11ad4: 00001137 lui sp,0x1 + 11ad8: aa010113 addi sp,sp,-1376 # aa0 <_start-0xf5e0> + 11adc: fe209f23 sh sp,-2(ra) + 11ae0: ffe09f03 lh t5,-2(ra) + 11ae4: 00001eb7 lui t4,0x1 + 11ae8: aa0e8e93 addi t4,t4,-1376 # aa0 <_start-0xf5e0> + 11aec: 18f00193 li gp,399 + 11af0: 01df0463 beq t5,t4,11af8 + 11af4: 0040106f j 12af8 + +00011af8 : + 11af8: 00002097 auipc ra,0x2 + 11afc: 07e08093 addi ra,ra,126 # 13b76 + 11b00: ffffa137 lui sp,0xffffa + 11b04: 00a10113 addi sp,sp,10 # ffffa00a <__global_pointer$+0xfffe5bc2> + 11b08: 00209023 sh sp,0(ra) + 11b0c: 00009f03 lh t5,0(ra) + 11b10: ffffaeb7 lui t4,0xffffa + 11b14: 00ae8e93 addi t4,t4,10 # ffffa00a <__global_pointer$+0xfffe5bc2> + 11b18: 19000193 li gp,400 + 11b1c: 7ddf1ee3 bne t5,t4,12af8 + +00011b20 : + 11b20: 00002097 auipc ra,0x2 + 11b24: 05808093 addi ra,ra,88 # 13b78 + 11b28: 12345137 lui sp,0x12345 + 11b2c: 67810113 addi sp,sp,1656 # 12345678 <__global_pointer$+0x12331230> + 11b30: fe008213 addi tp,ra,-32 + 11b34: 02221023 sh sp,32(tp) # 20 <_start-0x10060> + 11b38: 00009283 lh t0,0(ra) + 11b3c: 00005eb7 lui t4,0x5 + 11b40: 678e8e93 addi t4,t4,1656 # 5678 <_start-0xaa08> + 11b44: 19100193 li gp,401 + 11b48: 7bd298e3 bne t0,t4,12af8 + +00011b4c : + 11b4c: 00002097 auipc ra,0x2 + 11b50: 02c08093 addi ra,ra,44 # 13b78 + 11b54: 00003137 lui sp,0x3 + 11b58: 09810113 addi sp,sp,152 # 3098 <_start-0xcfe8> + 11b5c: ffb08093 addi ra,ra,-5 + 11b60: 002093a3 sh sp,7(ra) + 11b64: 00002217 auipc tp,0x2 + 11b68: 01620213 addi tp,tp,22 # 13b7a + 11b6c: 00021283 lh t0,0(tp) # 0 <_start-0x10080> + 11b70: 00003eb7 lui t4,0x3 + 11b74: 098e8e93 addi t4,t4,152 # 3098 <_start-0xcfe8> + 11b78: 19200193 li gp,402 + 11b7c: 77d29ee3 bne t0,t4,12af8 + +00011b80 : + 11b80: 19300193 li gp,403 + 11b84: 00000213 li tp,0 + 11b88: ffffd0b7 lui ra,0xffffd + 11b8c: cdd08093 addi ra,ra,-803 # ffffccdd <__global_pointer$+0xfffe8895> + 11b90: 00002117 auipc sp,0x2 + 11b94: fd810113 addi sp,sp,-40 # 13b68 + 11b98: 00111023 sh ra,0(sp) + 11b9c: 00011f03 lh t5,0(sp) + 11ba0: ffffdeb7 lui t4,0xffffd + 11ba4: cdde8e93 addi t4,t4,-803 # ffffccdd <__global_pointer$+0xfffe8895> + 11ba8: 75df18e3 bne t5,t4,12af8 + 11bac: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11bb0: 00200293 li t0,2 + 11bb4: fc521ae3 bne tp,t0,11b88 + +00011bb8 : + 11bb8: 19400193 li gp,404 + 11bbc: 00000213 li tp,0 + 11bc0: ffffc0b7 lui ra,0xffffc + 11bc4: ccd08093 addi ra,ra,-819 # ffffbccd <__global_pointer$+0xfffe7885> + 11bc8: 00002117 auipc sp,0x2 + 11bcc: fa010113 addi sp,sp,-96 # 13b68 + 11bd0: 00000013 nop + 11bd4: 00111123 sh ra,2(sp) + 11bd8: 00211f03 lh t5,2(sp) + 11bdc: ffffceb7 lui t4,0xffffc + 11be0: ccde8e93 addi t4,t4,-819 # ffffbccd <__global_pointer$+0xfffe7885> + 11be4: 71df1ae3 bne t5,t4,12af8 + 11be8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11bec: 00200293 li t0,2 + 11bf0: fc5218e3 bne tp,t0,11bc0 + +00011bf4 : + 11bf4: 19500193 li gp,405 + 11bf8: 00000213 li tp,0 + 11bfc: ffffc0b7 lui ra,0xffffc + 11c00: bcc08093 addi ra,ra,-1076 # ffffbbcc <__global_pointer$+0xfffe7784> + 11c04: 00002117 auipc sp,0x2 + 11c08: f6410113 addi sp,sp,-156 # 13b68 + 11c0c: 00000013 nop + 11c10: 00000013 nop + 11c14: 00111223 sh ra,4(sp) + 11c18: 00411f03 lh t5,4(sp) + 11c1c: ffffceb7 lui t4,0xffffc + 11c20: bcce8e93 addi t4,t4,-1076 # ffffbbcc <__global_pointer$+0xfffe7784> + 11c24: 6ddf1ae3 bne t5,t4,12af8 + 11c28: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11c2c: 00200293 li t0,2 + 11c30: fc5216e3 bne tp,t0,11bfc + +00011c34 : + 11c34: 19600193 li gp,406 + 11c38: 00000213 li tp,0 + 11c3c: ffffb0b7 lui ra,0xffffb + 11c40: bbc08093 addi ra,ra,-1092 # ffffabbc <__global_pointer$+0xfffe6774> + 11c44: 00000013 nop + 11c48: 00002117 auipc sp,0x2 + 11c4c: f2010113 addi sp,sp,-224 # 13b68 + 11c50: 00111323 sh ra,6(sp) + 11c54: 00611f03 lh t5,6(sp) + 11c58: ffffbeb7 lui t4,0xffffb + 11c5c: bbce8e93 addi t4,t4,-1092 # ffffabbc <__global_pointer$+0xfffe6774> + 11c60: 69df1ce3 bne t5,t4,12af8 + 11c64: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11c68: 00200293 li t0,2 + 11c6c: fc5218e3 bne tp,t0,11c3c + +00011c70 : + 11c70: 19700193 li gp,407 + 11c74: 00000213 li tp,0 + 11c78: ffffb0b7 lui ra,0xffffb + 11c7c: abb08093 addi ra,ra,-1349 # ffffaabb <__global_pointer$+0xfffe6673> + 11c80: 00000013 nop + 11c84: 00002117 auipc sp,0x2 + 11c88: ee410113 addi sp,sp,-284 # 13b68 + 11c8c: 00000013 nop + 11c90: 00111423 sh ra,8(sp) + 11c94: 00811f03 lh t5,8(sp) + 11c98: ffffbeb7 lui t4,0xffffb + 11c9c: abbe8e93 addi t4,t4,-1349 # ffffaabb <__global_pointer$+0xfffe6673> + 11ca0: 65df1ce3 bne t5,t4,12af8 + 11ca4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11ca8: 00200293 li t0,2 + 11cac: fc5216e3 bne tp,t0,11c78 + +00011cb0 : + 11cb0: 19800193 li gp,408 + 11cb4: 00000213 li tp,0 + 11cb8: ffffe0b7 lui ra,0xffffe + 11cbc: aab08093 addi ra,ra,-1365 # ffffdaab <__global_pointer$+0xfffe9663> + 11cc0: 00000013 nop + 11cc4: 00000013 nop + 11cc8: 00002117 auipc sp,0x2 + 11ccc: ea010113 addi sp,sp,-352 # 13b68 + 11cd0: 00111523 sh ra,10(sp) + 11cd4: 00a11f03 lh t5,10(sp) + 11cd8: ffffeeb7 lui t4,0xffffe + 11cdc: aabe8e93 addi t4,t4,-1365 # ffffdaab <__global_pointer$+0xfffe9663> + 11ce0: 61df1ce3 bne t5,t4,12af8 + 11ce4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11ce8: 00200293 li t0,2 + 11cec: fc5216e3 bne tp,t0,11cb8 + +00011cf0 : + 11cf0: 19900193 li gp,409 + 11cf4: 00000213 li tp,0 + 11cf8: 00002117 auipc sp,0x2 + 11cfc: e7010113 addi sp,sp,-400 # 13b68 + 11d00: 000020b7 lui ra,0x2 + 11d04: 23308093 addi ra,ra,563 # 2233 <_start-0xde4d> + 11d08: 00111023 sh ra,0(sp) + 11d0c: 00011f03 lh t5,0(sp) + 11d10: 00002eb7 lui t4,0x2 + 11d14: 233e8e93 addi t4,t4,563 # 2233 <_start-0xde4d> + 11d18: 5fdf10e3 bne t5,t4,12af8 + 11d1c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11d20: 00200293 li t0,2 + 11d24: fc521ae3 bne tp,t0,11cf8 + +00011d28 : + 11d28: 19a00193 li gp,410 + 11d2c: 00000213 li tp,0 + 11d30: 00002117 auipc sp,0x2 + 11d34: e3810113 addi sp,sp,-456 # 13b68 + 11d38: 000010b7 lui ra,0x1 + 11d3c: 22308093 addi ra,ra,547 # 1223 <_start-0xee5d> + 11d40: 00000013 nop + 11d44: 00111123 sh ra,2(sp) + 11d48: 00211f03 lh t5,2(sp) + 11d4c: 00001eb7 lui t4,0x1 + 11d50: 223e8e93 addi t4,t4,547 # 1223 <_start-0xee5d> + 11d54: 5bdf12e3 bne t5,t4,12af8 + 11d58: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11d5c: 00200293 li t0,2 + 11d60: fc5218e3 bne tp,t0,11d30 + +00011d64 : + 11d64: 19b00193 li gp,411 + 11d68: 00000213 li tp,0 + 11d6c: 00002117 auipc sp,0x2 + 11d70: dfc10113 addi sp,sp,-516 # 13b68 + 11d74: 000010b7 lui ra,0x1 + 11d78: 12208093 addi ra,ra,290 # 1122 <_start-0xef5e> + 11d7c: 00000013 nop + 11d80: 00000013 nop + 11d84: 00111223 sh ra,4(sp) + 11d88: 00411f03 lh t5,4(sp) + 11d8c: 00001eb7 lui t4,0x1 + 11d90: 122e8e93 addi t4,t4,290 # 1122 <_start-0xef5e> + 11d94: 57df12e3 bne t5,t4,12af8 + 11d98: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11d9c: 00200293 li t0,2 + 11da0: fc5216e3 bne tp,t0,11d6c + +00011da4 : + 11da4: 19c00193 li gp,412 + 11da8: 00000213 li tp,0 + 11dac: 00002117 auipc sp,0x2 + 11db0: dbc10113 addi sp,sp,-580 # 13b68 + 11db4: 00000013 nop + 11db8: 11200093 li ra,274 + 11dbc: 00111323 sh ra,6(sp) + 11dc0: 00611f03 lh t5,6(sp) + 11dc4: 11200e93 li t4,274 + 11dc8: 53df18e3 bne t5,t4,12af8 + 11dcc: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11dd0: 00200293 li t0,2 + 11dd4: fc521ce3 bne tp,t0,11dac + +00011dd8 : + 11dd8: 19d00193 li gp,413 + 11ddc: 00000213 li tp,0 + 11de0: 00002117 auipc sp,0x2 + 11de4: d8810113 addi sp,sp,-632 # 13b68 + 11de8: 00000013 nop + 11dec: 01100093 li ra,17 + 11df0: 00000013 nop + 11df4: 00111423 sh ra,8(sp) + 11df8: 00811f03 lh t5,8(sp) + 11dfc: 01100e93 li t4,17 + 11e00: 4fdf1ce3 bne t5,t4,12af8 + 11e04: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11e08: 00200293 li t0,2 + 11e0c: fc521ae3 bne tp,t0,11de0 + +00011e10 : + 11e10: 19e00193 li gp,414 + 11e14: 00000213 li tp,0 + 11e18: 00002117 auipc sp,0x2 + 11e1c: d5010113 addi sp,sp,-688 # 13b68 + 11e20: 00000013 nop + 11e24: 00000013 nop + 11e28: 000030b7 lui ra,0x3 + 11e2c: 00108093 addi ra,ra,1 # 3001 <_start-0xd07f> + 11e30: 00111523 sh ra,10(sp) + 11e34: 00a11f03 lh t5,10(sp) + 11e38: 00003eb7 lui t4,0x3 + 11e3c: 001e8e93 addi t4,t4,1 # 3001 <_start-0xd07f> + 11e40: 4bdf1ce3 bne t5,t4,12af8 + 11e44: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11e48: 00200293 li t0,2 + 11e4c: fc5216e3 bne tp,t0,11e18 + 11e50: 0000c537 lui a0,0xc + 11e54: eef50513 addi a0,a0,-273 # beef <_start-0x4191> + 11e58: 00002597 auipc a1,0x2 + 11e5c: d1058593 addi a1,a1,-752 # 13b68 + 11e60: 00a59323 sh a0,6(a1) + +00011e64 : + 11e64: 00100093 li ra,1 + 11e68: 00000113 li sp,0 + 11e6c: 00209f33 sll t5,ra,sp + 11e70: 00100e93 li t4,1 + 11e74: 19f00193 li gp,415 + 11e78: 49df10e3 bne t5,t4,12af8 + +00011e7c : + 11e7c: 00100093 li ra,1 + 11e80: 00100113 li sp,1 + 11e84: 00209f33 sll t5,ra,sp + 11e88: 00200e93 li t4,2 + 11e8c: 1a000193 li gp,416 + 11e90: 47df14e3 bne t5,t4,12af8 + +00011e94 : + 11e94: 00100093 li ra,1 + 11e98: 00700113 li sp,7 + 11e9c: 00209f33 sll t5,ra,sp + 11ea0: 08000e93 li t4,128 + 11ea4: 1a100193 li gp,417 + 11ea8: 45df18e3 bne t5,t4,12af8 + +00011eac : + 11eac: 00100093 li ra,1 + 11eb0: 00e00113 li sp,14 + 11eb4: 00209f33 sll t5,ra,sp + 11eb8: 00004eb7 lui t4,0x4 + 11ebc: 1a200193 li gp,418 + 11ec0: 43df1ce3 bne t5,t4,12af8 + +00011ec4 : + 11ec4: 00100093 li ra,1 + 11ec8: 01f00113 li sp,31 + 11ecc: 00209f33 sll t5,ra,sp + 11ed0: 80000eb7 lui t4,0x80000 + 11ed4: 1a300193 li gp,419 + 11ed8: 43df10e3 bne t5,t4,12af8 + +00011edc : + 11edc: fff00093 li ra,-1 + 11ee0: 00000113 li sp,0 + 11ee4: 00209f33 sll t5,ra,sp + 11ee8: fff00e93 li t4,-1 + 11eec: 1a400193 li gp,420 + 11ef0: 41df14e3 bne t5,t4,12af8 + +00011ef4 : + 11ef4: fff00093 li ra,-1 + 11ef8: 00100113 li sp,1 + 11efc: 00209f33 sll t5,ra,sp + 11f00: ffe00e93 li t4,-2 + 11f04: 1a500193 li gp,421 + 11f08: 3fdf18e3 bne t5,t4,12af8 + +00011f0c : + 11f0c: fff00093 li ra,-1 + 11f10: 00700113 li sp,7 + 11f14: 00209f33 sll t5,ra,sp + 11f18: f8000e93 li t4,-128 + 11f1c: 1a600193 li gp,422 + 11f20: 3ddf1ce3 bne t5,t4,12af8 + +00011f24 : + 11f24: fff00093 li ra,-1 + 11f28: 00e00113 li sp,14 + 11f2c: 00209f33 sll t5,ra,sp + 11f30: ffffceb7 lui t4,0xffffc + 11f34: 1a700193 li gp,423 + 11f38: 3ddf10e3 bne t5,t4,12af8 + +00011f3c : + 11f3c: fff00093 li ra,-1 + 11f40: 01f00113 li sp,31 + 11f44: 00209f33 sll t5,ra,sp + 11f48: 80000eb7 lui t4,0x80000 + 11f4c: 1a800193 li gp,424 + 11f50: 3bdf14e3 bne t5,t4,12af8 + +00011f54 : + 11f54: 212120b7 lui ra,0x21212 + 11f58: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 11f5c: 00000113 li sp,0 + 11f60: 00209f33 sll t5,ra,sp + 11f64: 21212eb7 lui t4,0x21212 + 11f68: 121e8e93 addi t4,t4,289 # 21212121 <__global_pointer$+0x211fdcd9> + 11f6c: 1a900193 li gp,425 + 11f70: 39df14e3 bne t5,t4,12af8 + +00011f74 : + 11f74: 212120b7 lui ra,0x21212 + 11f78: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 11f7c: 00100113 li sp,1 + 11f80: 00209f33 sll t5,ra,sp + 11f84: 42424eb7 lui t4,0x42424 + 11f88: 242e8e93 addi t4,t4,578 # 42424242 <__global_pointer$+0x4240fdfa> + 11f8c: 1aa00193 li gp,426 + 11f90: 37df14e3 bne t5,t4,12af8 + +00011f94 : + 11f94: 212120b7 lui ra,0x21212 + 11f98: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 11f9c: 00700113 li sp,7 + 11fa0: 00209f33 sll t5,ra,sp + 11fa4: 90909eb7 lui t4,0x90909 + 11fa8: 080e8e93 addi t4,t4,128 # 90909080 <__global_pointer$+0x908f4c38> + 11fac: 1ab00193 li gp,427 + 11fb0: 35df14e3 bne t5,t4,12af8 + +00011fb4 : + 11fb4: 212120b7 lui ra,0x21212 + 11fb8: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 11fbc: 00e00113 li sp,14 + 11fc0: 00209f33 sll t5,ra,sp + 11fc4: 48484eb7 lui t4,0x48484 + 11fc8: 1ac00193 li gp,428 + 11fcc: 33df16e3 bne t5,t4,12af8 + +00011fd0 : + 11fd0: 212120b7 lui ra,0x21212 + 11fd4: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 11fd8: 01f00113 li sp,31 + 11fdc: 00209f33 sll t5,ra,sp + 11fe0: 80000eb7 lui t4,0x80000 + 11fe4: 1ad00193 li gp,429 + 11fe8: 31df18e3 bne t5,t4,12af8 + +00011fec : + 11fec: 212120b7 lui ra,0x21212 + 11ff0: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 11ff4: fc000113 li sp,-64 + 11ff8: 00209f33 sll t5,ra,sp + 11ffc: 21212eb7 lui t4,0x21212 + 12000: 121e8e93 addi t4,t4,289 # 21212121 <__global_pointer$+0x211fdcd9> + 12004: 1ae00193 li gp,430 + 12008: 2fdf18e3 bne t5,t4,12af8 + +0001200c : + 1200c: 212120b7 lui ra,0x21212 + 12010: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 12014: fc100113 li sp,-63 + 12018: 00209f33 sll t5,ra,sp + 1201c: 42424eb7 lui t4,0x42424 + 12020: 242e8e93 addi t4,t4,578 # 42424242 <__global_pointer$+0x4240fdfa> + 12024: 1af00193 li gp,431 + 12028: 2ddf18e3 bne t5,t4,12af8 + +0001202c : + 1202c: 212120b7 lui ra,0x21212 + 12030: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 12034: fc700113 li sp,-57 + 12038: 00209f33 sll t5,ra,sp + 1203c: 90909eb7 lui t4,0x90909 + 12040: 080e8e93 addi t4,t4,128 # 90909080 <__global_pointer$+0x908f4c38> + 12044: 1b000193 li gp,432 + 12048: 2bdf18e3 bne t5,t4,12af8 + +0001204c : + 1204c: 212120b7 lui ra,0x21212 + 12050: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 12054: fce00113 li sp,-50 + 12058: 00209f33 sll t5,ra,sp + 1205c: 48484eb7 lui t4,0x48484 + 12060: 1b100193 li gp,433 + 12064: 29df1ae3 bne t5,t4,12af8 + +00012068 : + 12068: 00100093 li ra,1 + 1206c: 00700113 li sp,7 + 12070: 002090b3 sll ra,ra,sp + 12074: 08000e93 li t4,128 + 12078: 1b600193 li gp,438 + 1207c: 27d09ee3 bne ra,t4,12af8 + +00012080 : + 12080: 00100093 li ra,1 + 12084: 00e00113 li sp,14 + 12088: 00209133 sll sp,ra,sp + 1208c: 00004eb7 lui t4,0x4 + 12090: 1b700193 li gp,439 + 12094: 27d112e3 bne sp,t4,12af8 + +00012098 : + 12098: 00300093 li ra,3 + 1209c: 001090b3 sll ra,ra,ra + 120a0: 01800e93 li t4,24 + 120a4: 1b800193 li gp,440 + 120a8: 25d098e3 bne ra,t4,12af8 + +000120ac : + 120ac: 00000213 li tp,0 + 120b0: 00100093 li ra,1 + 120b4: 00700113 li sp,7 + 120b8: 00209f33 sll t5,ra,sp + 120bc: 000f0313 mv t1,t5 + 120c0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 120c4: 00200293 li t0,2 + 120c8: fe5214e3 bne tp,t0,120b0 + 120cc: 08000e93 li t4,128 + 120d0: 1b900193 li gp,441 + 120d4: 23d312e3 bne t1,t4,12af8 + +000120d8 : + 120d8: 00000213 li tp,0 + 120dc: 00100093 li ra,1 + 120e0: 00e00113 li sp,14 + 120e4: 00209f33 sll t5,ra,sp + 120e8: 00000013 nop + 120ec: 000f0313 mv t1,t5 + 120f0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 120f4: 00200293 li t0,2 + 120f8: fe5212e3 bne tp,t0,120dc + 120fc: 00004eb7 lui t4,0x4 + 12100: 1ba00193 li gp,442 + 12104: 1fd31ae3 bne t1,t4,12af8 + +00012108 : + 12108: 00000213 li tp,0 + 1210c: 00100093 li ra,1 + 12110: 01f00113 li sp,31 + 12114: 00209f33 sll t5,ra,sp + 12118: 00000013 nop + 1211c: 00000013 nop + 12120: 000f0313 mv t1,t5 + 12124: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12128: 00200293 li t0,2 + 1212c: fe5210e3 bne tp,t0,1210c + 12130: 80000eb7 lui t4,0x80000 + 12134: 1bb00193 li gp,443 + 12138: 1dd310e3 bne t1,t4,12af8 + +0001213c : + 1213c: 00000213 li tp,0 + 12140: 00100093 li ra,1 + 12144: 00700113 li sp,7 + 12148: 00209f33 sll t5,ra,sp + 1214c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12150: 00200293 li t0,2 + 12154: fe5216e3 bne tp,t0,12140 + 12158: 08000e93 li t4,128 + 1215c: 1bc00193 li gp,444 + 12160: 19df1ce3 bne t5,t4,12af8 + +00012164 : + 12164: 00000213 li tp,0 + 12168: 00100093 li ra,1 + 1216c: 00e00113 li sp,14 + 12170: 00000013 nop + 12174: 00209f33 sll t5,ra,sp + 12178: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1217c: 00200293 li t0,2 + 12180: fe5214e3 bne tp,t0,12168 + 12184: 00004eb7 lui t4,0x4 + 12188: 1bd00193 li gp,445 + 1218c: 17df16e3 bne t5,t4,12af8 + +00012190 : + 12190: 00000213 li tp,0 + 12194: 00100093 li ra,1 + 12198: 01f00113 li sp,31 + 1219c: 00000013 nop + 121a0: 00000013 nop + 121a4: 00209f33 sll t5,ra,sp + 121a8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 121ac: 00200293 li t0,2 + 121b0: fe5212e3 bne tp,t0,12194 + 121b4: 80000eb7 lui t4,0x80000 + 121b8: 1be00193 li gp,446 + 121bc: 13df1ee3 bne t5,t4,12af8 + +000121c0 : + 121c0: 00000213 li tp,0 + 121c4: 00100093 li ra,1 + 121c8: 00000013 nop + 121cc: 00700113 li sp,7 + 121d0: 00209f33 sll t5,ra,sp + 121d4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 121d8: 00200293 li t0,2 + 121dc: fe5214e3 bne tp,t0,121c4 + 121e0: 08000e93 li t4,128 + 121e4: 1bf00193 li gp,447 + 121e8: 11df18e3 bne t5,t4,12af8 + +000121ec : + 121ec: 00000213 li tp,0 + 121f0: 00100093 li ra,1 + 121f4: 00000013 nop + 121f8: 00e00113 li sp,14 + 121fc: 00000013 nop + 12200: 00209f33 sll t5,ra,sp + 12204: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12208: 00200293 li t0,2 + 1220c: fe5212e3 bne tp,t0,121f0 + 12210: 00004eb7 lui t4,0x4 + 12214: 1c000193 li gp,448 + 12218: 0fdf10e3 bne t5,t4,12af8 + +0001221c : + 1221c: 00000213 li tp,0 + 12220: 00100093 li ra,1 + 12224: 00000013 nop + 12228: 00000013 nop + 1222c: 01f00113 li sp,31 + 12230: 00209f33 sll t5,ra,sp + 12234: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12238: 00200293 li t0,2 + 1223c: fe5212e3 bne tp,t0,12220 + 12240: 80000eb7 lui t4,0x80000 + 12244: 1c100193 li gp,449 + 12248: 0bdf18e3 bne t5,t4,12af8 + +0001224c : + 1224c: 00000213 li tp,0 + 12250: 00700113 li sp,7 + 12254: 00100093 li ra,1 + 12258: 00209f33 sll t5,ra,sp + 1225c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12260: 00200293 li t0,2 + 12264: fe5216e3 bne tp,t0,12250 + 12268: 08000e93 li t4,128 + 1226c: 1c200193 li gp,450 + 12270: 09df14e3 bne t5,t4,12af8 + +00012274 : + 12274: 00000213 li tp,0 + 12278: 00e00113 li sp,14 + 1227c: 00100093 li ra,1 + 12280: 00000013 nop + 12284: 00209f33 sll t5,ra,sp + 12288: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1228c: 00200293 li t0,2 + 12290: fe5214e3 bne tp,t0,12278 + 12294: 00004eb7 lui t4,0x4 + 12298: 1c300193 li gp,451 + 1229c: 05df1ee3 bne t5,t4,12af8 + +000122a0 : + 122a0: 00000213 li tp,0 + 122a4: 01f00113 li sp,31 + 122a8: 00100093 li ra,1 + 122ac: 00000013 nop + 122b0: 00000013 nop + 122b4: 00209f33 sll t5,ra,sp + 122b8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 122bc: 00200293 li t0,2 + 122c0: fe5212e3 bne tp,t0,122a4 + 122c4: 80000eb7 lui t4,0x80000 + 122c8: 1c400193 li gp,452 + 122cc: 03df16e3 bne t5,t4,12af8 + +000122d0 : + 122d0: 00000213 li tp,0 + 122d4: 00700113 li sp,7 + 122d8: 00000013 nop + 122dc: 00100093 li ra,1 + 122e0: 00209f33 sll t5,ra,sp + 122e4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 122e8: 00200293 li t0,2 + 122ec: fe5214e3 bne tp,t0,122d4 + 122f0: 08000e93 li t4,128 + 122f4: 1c500193 li gp,453 + 122f8: 01df10e3 bne t5,t4,12af8 + +000122fc : + 122fc: 00000213 li tp,0 + 12300: 00e00113 li sp,14 + 12304: 00000013 nop + 12308: 00100093 li ra,1 + 1230c: 00000013 nop + 12310: 00209f33 sll t5,ra,sp + 12314: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12318: 00200293 li t0,2 + 1231c: fe5212e3 bne tp,t0,12300 + 12320: 00004eb7 lui t4,0x4 + 12324: 1c600193 li gp,454 + 12328: 7ddf1863 bne t5,t4,12af8 + +0001232c : + 1232c: 00000213 li tp,0 + 12330: 01f00113 li sp,31 + 12334: 00000013 nop + 12338: 00000013 nop + 1233c: 00100093 li ra,1 + 12340: 00209f33 sll t5,ra,sp + 12344: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12348: 00200293 li t0,2 + 1234c: fe5212e3 bne tp,t0,12330 + 12350: 80000eb7 lui t4,0x80000 + 12354: 1c700193 li gp,455 + 12358: 7bdf1063 bne t5,t4,12af8 + +0001235c : + 1235c: 00f00093 li ra,15 + 12360: 00101133 sll sp,zero,ra + 12364: 00000e93 li t4,0 + 12368: 1c800193 li gp,456 + 1236c: 79d11663 bne sp,t4,12af8 + +00012370 : + 12370: 02000093 li ra,32 + 12374: 00009133 sll sp,ra,zero + 12378: 02000e93 li t4,32 + 1237c: 1c900193 li gp,457 + 12380: 77d11c63 bne sp,t4,12af8 + +00012384 : + 12384: 000010b3 sll ra,zero,zero + 12388: 00000e93 li t4,0 + 1238c: 1ca00193 li gp,458 + 12390: 77d09463 bne ra,t4,12af8 + +00012394 : + 12394: 40000093 li ra,1024 + 12398: 00001137 lui sp,0x1 + 1239c: 80010113 addi sp,sp,-2048 # 800 <_start-0xf880> + 123a0: 00209033 sll zero,ra,sp + 123a4: 00000e93 li t4,0 + 123a8: 1cb00193 li gp,459 + 123ac: 75d01663 bne zero,t4,12af8 + +000123b0 : + 123b0: 00100093 li ra,1 + 123b4: 00009f13 slli t5,ra,0x0 + 123b8: 00100e93 li t4,1 + 123bc: 1cc00193 li gp,460 + 123c0: 73df1c63 bne t5,t4,12af8 + +000123c4 : + 123c4: 00100093 li ra,1 + 123c8: 00109f13 slli t5,ra,0x1 + 123cc: 00200e93 li t4,2 + 123d0: 1cd00193 li gp,461 + 123d4: 73df1263 bne t5,t4,12af8 + +000123d8 : + 123d8: 00100093 li ra,1 + 123dc: 00709f13 slli t5,ra,0x7 + 123e0: 08000e93 li t4,128 + 123e4: 1ce00193 li gp,462 + 123e8: 71df1863 bne t5,t4,12af8 + +000123ec : + 123ec: 00100093 li ra,1 + 123f0: 00e09f13 slli t5,ra,0xe + 123f4: 00004eb7 lui t4,0x4 + 123f8: 1cf00193 li gp,463 + 123fc: 6fdf1e63 bne t5,t4,12af8 + +00012400 : + 12400: 00100093 li ra,1 + 12404: 01f09f13 slli t5,ra,0x1f + 12408: 80000eb7 lui t4,0x80000 + 1240c: 1d000193 li gp,464 + 12410: 6fdf1463 bne t5,t4,12af8 + +00012414 : + 12414: fff00093 li ra,-1 + 12418: 00009f13 slli t5,ra,0x0 + 1241c: fff00e93 li t4,-1 + 12420: 1d100193 li gp,465 + 12424: 6ddf1a63 bne t5,t4,12af8 + +00012428 : + 12428: fff00093 li ra,-1 + 1242c: 00109f13 slli t5,ra,0x1 + 12430: ffe00e93 li t4,-2 + 12434: 1d200193 li gp,466 + 12438: 6ddf1063 bne t5,t4,12af8 + +0001243c : + 1243c: fff00093 li ra,-1 + 12440: 00709f13 slli t5,ra,0x7 + 12444: f8000e93 li t4,-128 + 12448: 1d300193 li gp,467 + 1244c: 6bdf1663 bne t5,t4,12af8 + +00012450 : + 12450: fff00093 li ra,-1 + 12454: 00e09f13 slli t5,ra,0xe + 12458: ffffceb7 lui t4,0xffffc + 1245c: 1d400193 li gp,468 + 12460: 69df1c63 bne t5,t4,12af8 + +00012464 : + 12464: fff00093 li ra,-1 + 12468: 01f09f13 slli t5,ra,0x1f + 1246c: 80000eb7 lui t4,0x80000 + 12470: 1d500193 li gp,469 + 12474: 69df1263 bne t5,t4,12af8 + +00012478 : + 12478: 212120b7 lui ra,0x21212 + 1247c: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 12480: 00009f13 slli t5,ra,0x0 + 12484: 21212eb7 lui t4,0x21212 + 12488: 121e8e93 addi t4,t4,289 # 21212121 <__global_pointer$+0x211fdcd9> + 1248c: 1d600193 li gp,470 + 12490: 67df1463 bne t5,t4,12af8 + +00012494 : + 12494: 212120b7 lui ra,0x21212 + 12498: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 1249c: 00109f13 slli t5,ra,0x1 + 124a0: 42424eb7 lui t4,0x42424 + 124a4: 242e8e93 addi t4,t4,578 # 42424242 <__global_pointer$+0x4240fdfa> + 124a8: 1d700193 li gp,471 + 124ac: 65df1663 bne t5,t4,12af8 + +000124b0 : + 124b0: 212120b7 lui ra,0x21212 + 124b4: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 124b8: 00709f13 slli t5,ra,0x7 + 124bc: 90909eb7 lui t4,0x90909 + 124c0: 080e8e93 addi t4,t4,128 # 90909080 <__global_pointer$+0x908f4c38> + 124c4: 1d800193 li gp,472 + 124c8: 63df1863 bne t5,t4,12af8 + +000124cc : + 124cc: 212120b7 lui ra,0x21212 + 124d0: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 124d4: 00e09f13 slli t5,ra,0xe + 124d8: 48484eb7 lui t4,0x48484 + 124dc: 1d900193 li gp,473 + 124e0: 61df1c63 bne t5,t4,12af8 + +000124e4 : + 124e4: 212120b7 lui ra,0x21212 + 124e8: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fdcd9> + 124ec: 01f09f13 slli t5,ra,0x1f + 124f0: 80000eb7 lui t4,0x80000 + 124f4: 1da00193 li gp,474 + 124f8: 61df1063 bne t5,t4,12af8 + +000124fc : + 124fc: 00100093 li ra,1 + 12500: 00709093 slli ra,ra,0x7 + 12504: 08000e93 li t4,128 + 12508: 1de00193 li gp,478 + 1250c: 5fd09663 bne ra,t4,12af8 + +00012510 : + 12510: 00000213 li tp,0 + 12514: 00100093 li ra,1 + 12518: 00709f13 slli t5,ra,0x7 + 1251c: 000f0313 mv t1,t5 + 12520: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12524: 00200293 li t0,2 + 12528: fe5216e3 bne tp,t0,12514 + 1252c: 08000e93 li t4,128 + 12530: 1df00193 li gp,479 + 12534: 5dd31263 bne t1,t4,12af8 + +00012538 : + 12538: 00000213 li tp,0 + 1253c: 00100093 li ra,1 + 12540: 00e09f13 slli t5,ra,0xe + 12544: 00000013 nop + 12548: 000f0313 mv t1,t5 + 1254c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12550: 00200293 li t0,2 + 12554: fe5214e3 bne tp,t0,1253c + 12558: 00004eb7 lui t4,0x4 + 1255c: 1e000193 li gp,480 + 12560: 59d31c63 bne t1,t4,12af8 + +00012564 : + 12564: 00000213 li tp,0 + 12568: 00100093 li ra,1 + 1256c: 01f09f13 slli t5,ra,0x1f + 12570: 00000013 nop + 12574: 00000013 nop + 12578: 000f0313 mv t1,t5 + 1257c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12580: 00200293 li t0,2 + 12584: fe5212e3 bne tp,t0,12568 + 12588: 80000eb7 lui t4,0x80000 + 1258c: 1e100193 li gp,481 + 12590: 57d31463 bne t1,t4,12af8 + +00012594 : + 12594: 00000213 li tp,0 + 12598: 00100093 li ra,1 + 1259c: 00709f13 slli t5,ra,0x7 + 125a0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 125a4: 00200293 li t0,2 + 125a8: fe5218e3 bne tp,t0,12598 + 125ac: 08000e93 li t4,128 + 125b0: 1e200193 li gp,482 + 125b4: 55df1263 bne t5,t4,12af8 + +000125b8 : + 125b8: 00000213 li tp,0 + 125bc: 00100093 li ra,1 + 125c0: 00000013 nop + 125c4: 00e09f13 slli t5,ra,0xe + 125c8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 125cc: 00200293 li t0,2 + 125d0: fe5216e3 bne tp,t0,125bc + 125d4: 00004eb7 lui t4,0x4 + 125d8: 1e300193 li gp,483 + 125dc: 51df1e63 bne t5,t4,12af8 + +000125e0 : + 125e0: 00000213 li tp,0 + 125e4: 00100093 li ra,1 + 125e8: 00000013 nop + 125ec: 00000013 nop + 125f0: 01f09f13 slli t5,ra,0x1f + 125f4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 125f8: 00200293 li t0,2 + 125fc: fe5214e3 bne tp,t0,125e4 + 12600: 80000eb7 lui t4,0x80000 + 12604: 1e400193 li gp,484 + 12608: 4fdf1863 bne t5,t4,12af8 + +0001260c : + 1260c: 01f01093 slli ra,zero,0x1f + 12610: 00000e93 li t4,0 + 12614: 1e500193 li gp,485 + 12618: 4fd09063 bne ra,t4,12af8 + +0001261c : + 1261c: 02100093 li ra,33 + 12620: 01409013 slli zero,ra,0x14 + 12624: 00000e93 li t4,0 + 12628: 1e600193 li gp,486 + 1262c: 4dd01663 bne zero,t4,12af8 + +00012630 : + 12630: 00000093 li ra,0 + 12634: 00000113 li sp,0 + 12638: 0020af33 slt t5,ra,sp + 1263c: 00000e93 li t4,0 + 12640: 1e700193 li gp,487 + 12644: 4bdf1a63 bne t5,t4,12af8 + +00012648 : + 12648: 00100093 li ra,1 + 1264c: 00100113 li sp,1 + 12650: 0020af33 slt t5,ra,sp + 12654: 00000e93 li t4,0 + 12658: 1e800193 li gp,488 + 1265c: 49df1e63 bne t5,t4,12af8 + +00012660 : + 12660: 00300093 li ra,3 + 12664: 00700113 li sp,7 + 12668: 0020af33 slt t5,ra,sp + 1266c: 00100e93 li t4,1 + 12670: 1e900193 li gp,489 + 12674: 49df1263 bne t5,t4,12af8 + +00012678 : + 12678: 00700093 li ra,7 + 1267c: 00300113 li sp,3 + 12680: 0020af33 slt t5,ra,sp + 12684: 00000e93 li t4,0 + 12688: 1ea00193 li gp,490 + 1268c: 47df1663 bne t5,t4,12af8 + +00012690 : + 12690: 00000093 li ra,0 + 12694: ffff8137 lui sp,0xffff8 + 12698: 0020af33 slt t5,ra,sp + 1269c: 00000e93 li t4,0 + 126a0: 1eb00193 li gp,491 + 126a4: 45df1a63 bne t5,t4,12af8 + +000126a8 : + 126a8: 800000b7 lui ra,0x80000 + 126ac: 00000113 li sp,0 + 126b0: 0020af33 slt t5,ra,sp + 126b4: 00100e93 li t4,1 + 126b8: 1ec00193 li gp,492 + 126bc: 43df1e63 bne t5,t4,12af8 + +000126c0 : + 126c0: 800000b7 lui ra,0x80000 + 126c4: ffff8137 lui sp,0xffff8 + 126c8: 0020af33 slt t5,ra,sp + 126cc: 00100e93 li t4,1 + 126d0: 1ed00193 li gp,493 + 126d4: 43df1263 bne t5,t4,12af8 + +000126d8 : + 126d8: 00000093 li ra,0 + 126dc: 00008137 lui sp,0x8 + 126e0: fff10113 addi sp,sp,-1 # 7fff <_start-0x8081> + 126e4: 0020af33 slt t5,ra,sp + 126e8: 00100e93 li t4,1 + 126ec: 1ee00193 li gp,494 + 126f0: 41df1463 bne t5,t4,12af8 + +000126f4 : + 126f4: 800000b7 lui ra,0x80000 + 126f8: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffebbb7> + 126fc: 00000113 li sp,0 + 12700: 0020af33 slt t5,ra,sp + 12704: 00000e93 li t4,0 + 12708: 1ef00193 li gp,495 + 1270c: 3fdf1663 bne t5,t4,12af8 + +00012710 : + 12710: 800000b7 lui ra,0x80000 + 12714: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffebbb7> + 12718: 00008137 lui sp,0x8 + 1271c: fff10113 addi sp,sp,-1 # 7fff <_start-0x8081> + 12720: 0020af33 slt t5,ra,sp + 12724: 00000e93 li t4,0 + 12728: 1f000193 li gp,496 + 1272c: 3ddf1663 bne t5,t4,12af8 + +00012730 : + 12730: 800000b7 lui ra,0x80000 + 12734: 00008137 lui sp,0x8 + 12738: fff10113 addi sp,sp,-1 # 7fff <_start-0x8081> + 1273c: 0020af33 slt t5,ra,sp + 12740: 00100e93 li t4,1 + 12744: 1f100193 li gp,497 + 12748: 3bdf1863 bne t5,t4,12af8 + +0001274c : + 1274c: 800000b7 lui ra,0x80000 + 12750: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffebbb7> + 12754: ffff8137 lui sp,0xffff8 + 12758: 0020af33 slt t5,ra,sp + 1275c: 00000e93 li t4,0 + 12760: 1f200193 li gp,498 + 12764: 39df1a63 bne t5,t4,12af8 + +00012768 : + 12768: 00000093 li ra,0 + 1276c: fff00113 li sp,-1 + 12770: 0020af33 slt t5,ra,sp + 12774: 00000e93 li t4,0 + 12778: 1f300193 li gp,499 + 1277c: 37df1e63 bne t5,t4,12af8 + +00012780 : + 12780: fff00093 li ra,-1 + 12784: 00100113 li sp,1 + 12788: 0020af33 slt t5,ra,sp + 1278c: 00100e93 li t4,1 + 12790: 1f400193 li gp,500 + 12794: 37df1263 bne t5,t4,12af8 + +00012798 : + 12798: fff00093 li ra,-1 + 1279c: fff00113 li sp,-1 + 127a0: 0020af33 slt t5,ra,sp + 127a4: 00000e93 li t4,0 + 127a8: 1f500193 li gp,501 + 127ac: 35df1663 bne t5,t4,12af8 + +000127b0 : + 127b0: 00e00093 li ra,14 + 127b4: 00d00113 li sp,13 + 127b8: 0020a0b3 slt ra,ra,sp + 127bc: 00000e93 li t4,0 + 127c0: 1f600193 li gp,502 + 127c4: 33d09a63 bne ra,t4,12af8 + +000127c8 : + 127c8: 00b00093 li ra,11 + 127cc: 00d00113 li sp,13 + 127d0: 0020a133 slt sp,ra,sp + 127d4: 00100e93 li t4,1 + 127d8: 1f700193 li gp,503 + 127dc: 31d11e63 bne sp,t4,12af8 + +000127e0 : + 127e0: 00d00093 li ra,13 + 127e4: 0010a0b3 slt ra,ra,ra + 127e8: 00000e93 li t4,0 + 127ec: 1f800193 li gp,504 + 127f0: 31d09463 bne ra,t4,12af8 + +000127f4 : + 127f4: 00000213 li tp,0 + 127f8: 00b00093 li ra,11 + 127fc: 00d00113 li sp,13 + 12800: 0020af33 slt t5,ra,sp + 12804: 000f0313 mv t1,t5 + 12808: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1280c: 00200293 li t0,2 + 12810: fe5214e3 bne tp,t0,127f8 + 12814: 00100e93 li t4,1 + 12818: 1f900193 li gp,505 + 1281c: 2dd31e63 bne t1,t4,12af8 + +00012820 : + 12820: 00000213 li tp,0 + 12824: 00e00093 li ra,14 + 12828: 00d00113 li sp,13 + 1282c: 0020af33 slt t5,ra,sp + 12830: 00000013 nop + 12834: 000f0313 mv t1,t5 + 12838: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1283c: 00200293 li t0,2 + 12840: fe5212e3 bne tp,t0,12824 + 12844: 00000e93 li t4,0 + 12848: 1fa00193 li gp,506 + 1284c: 2bd31663 bne t1,t4,12af8 + +00012850 : + 12850: 00000213 li tp,0 + 12854: 00c00093 li ra,12 + 12858: 00d00113 li sp,13 + 1285c: 0020af33 slt t5,ra,sp + 12860: 00000013 nop + 12864: 00000013 nop + 12868: 000f0313 mv t1,t5 + 1286c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12870: 00200293 li t0,2 + 12874: fe5210e3 bne tp,t0,12854 + 12878: 00100e93 li t4,1 + 1287c: 1fb00193 li gp,507 + 12880: 27d31c63 bne t1,t4,12af8 + +00012884 : + 12884: 00000213 li tp,0 + 12888: 00e00093 li ra,14 + 1288c: 00d00113 li sp,13 + 12890: 0020af33 slt t5,ra,sp + 12894: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12898: 00200293 li t0,2 + 1289c: fe5216e3 bne tp,t0,12888 + 128a0: 00000e93 li t4,0 + 128a4: 1fc00193 li gp,508 + 128a8: 25df1863 bne t5,t4,12af8 + +000128ac : + 128ac: 00000213 li tp,0 + 128b0: 00b00093 li ra,11 + 128b4: 00d00113 li sp,13 + 128b8: 00000013 nop + 128bc: 0020af33 slt t5,ra,sp + 128c0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 128c4: 00200293 li t0,2 + 128c8: fe5214e3 bne tp,t0,128b0 + 128cc: 00100e93 li t4,1 + 128d0: 1fd00193 li gp,509 + 128d4: 23df1263 bne t5,t4,12af8 + +000128d8 : + 128d8: 00000213 li tp,0 + 128dc: 00f00093 li ra,15 + 128e0: 00d00113 li sp,13 + 128e4: 00000013 nop + 128e8: 00000013 nop + 128ec: 0020af33 slt t5,ra,sp + 128f0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 128f4: 00200293 li t0,2 + 128f8: fe5212e3 bne tp,t0,128dc + 128fc: 00000e93 li t4,0 + 12900: 1fe00193 li gp,510 + 12904: 1fdf1a63 bne t5,t4,12af8 + +00012908 : + 12908: 00000213 li tp,0 + 1290c: 00a00093 li ra,10 + 12910: 00000013 nop + 12914: 00d00113 li sp,13 + 12918: 0020af33 slt t5,ra,sp + 1291c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12920: 00200293 li t0,2 + 12924: fe5214e3 bne tp,t0,1290c + 12928: 00100e93 li t4,1 + 1292c: 1ff00193 li gp,511 + 12930: 1ddf1463 bne t5,t4,12af8 + +00012934 : + 12934: 00000213 li tp,0 + 12938: 01000093 li ra,16 + 1293c: 00000013 nop + 12940: 00d00113 li sp,13 + 12944: 00000013 nop + 12948: 0020af33 slt t5,ra,sp + 1294c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12950: 00200293 li t0,2 + 12954: fe5212e3 bne tp,t0,12938 + 12958: 00000e93 li t4,0 + 1295c: 20000193 li gp,512 + 12960: 19df1c63 bne t5,t4,12af8 + +00012964 : + 12964: 00000213 li tp,0 + 12968: 00900093 li ra,9 + 1296c: 00000013 nop + 12970: 00000013 nop + 12974: 00d00113 li sp,13 + 12978: 0020af33 slt t5,ra,sp + 1297c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12980: 00200293 li t0,2 + 12984: fe5212e3 bne tp,t0,12968 + 12988: 00100e93 li t4,1 + 1298c: 20100193 li gp,513 + 12990: 17df1463 bne t5,t4,12af8 + +00012994 : + 12994: 00000213 li tp,0 + 12998: 00d00113 li sp,13 + 1299c: 01100093 li ra,17 + 129a0: 0020af33 slt t5,ra,sp + 129a4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 129a8: 00200293 li t0,2 + 129ac: fe5216e3 bne tp,t0,12998 + 129b0: 00000e93 li t4,0 + 129b4: 20200193 li gp,514 + 129b8: 15df1063 bne t5,t4,12af8 + +000129bc : + 129bc: 00000213 li tp,0 + 129c0: 00d00113 li sp,13 + 129c4: 00800093 li ra,8 + 129c8: 00000013 nop + 129cc: 0020af33 slt t5,ra,sp + 129d0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 129d4: 00200293 li t0,2 + 129d8: fe5214e3 bne tp,t0,129c0 + 129dc: 00100e93 li t4,1 + 129e0: 20300193 li gp,515 + 129e4: 11df1a63 bne t5,t4,12af8 + +000129e8 : + 129e8: 00000213 li tp,0 + 129ec: 00d00113 li sp,13 + 129f0: 01200093 li ra,18 + 129f4: 00000013 nop + 129f8: 00000013 nop + 129fc: 0020af33 slt t5,ra,sp + 12a00: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12a04: 00200293 li t0,2 + 12a08: fe5212e3 bne tp,t0,129ec + 12a0c: 00000e93 li t4,0 + 12a10: 20400193 li gp,516 + 12a14: 0fdf1263 bne t5,t4,12af8 + +00012a18 : + 12a18: 00000213 li tp,0 + 12a1c: 00d00113 li sp,13 + 12a20: 00000013 nop + 12a24: 00700093 li ra,7 + 12a28: 0020af33 slt t5,ra,sp + 12a2c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12a30: 00200293 li t0,2 + 12a34: fe5214e3 bne tp,t0,12a1c + 12a38: 00100e93 li t4,1 + 12a3c: 20500193 li gp,517 + 12a40: 0bdf1c63 bne t5,t4,12af8 + +00012a44 : + 12a44: 00000213 li tp,0 + 12a48: 00d00113 li sp,13 + 12a4c: 00000013 nop + 12a50: 01300093 li ra,19 + 12a54: 00000013 nop + 12a58: 0020af33 slt t5,ra,sp + 12a5c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12a60: 00200293 li t0,2 + 12a64: fe5212e3 bne tp,t0,12a48 + 12a68: 00000e93 li t4,0 + 12a6c: 20600193 li gp,518 + 12a70: 09df1463 bne t5,t4,12af8 + +00012a74 : + 12a74: 00000213 li tp,0 + 12a78: 00d00113 li sp,13 + 12a7c: 00000013 nop + 12a80: 00000013 nop + 12a84: 00600093 li ra,6 + 12a88: 0020af33 slt t5,ra,sp + 12a8c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12a90: 00200293 li t0,2 + 12a94: fe5212e3 bne tp,t0,12a78 + 12a98: 00100e93 li t4,1 + 12a9c: 20700193 li gp,519 + 12aa0: 05df1c63 bne t5,t4,12af8 + +00012aa4 : + 12aa4: fff00093 li ra,-1 + 12aa8: 00102133 sgtz sp,ra + 12aac: 00000e93 li t4,0 + 12ab0: 20800193 li gp,520 + 12ab4: 05d11263 bne sp,t4,12af8 + +00012ab8 : + 12ab8: fff00093 li ra,-1 + 12abc: 0000a133 sltz sp,ra + 12ac0: 00100e93 li t4,1 + 12ac4: 20900193 li gp,521 + 12ac8: 03d11863 bne sp,t4,12af8 + +00012acc : + 12acc: 000020b3 sltz ra,zero + 12ad0: 00000e93 li t4,0 + 12ad4: 20a00193 li gp,522 + 12ad8: 03d09063 bne ra,t4,12af8 + +00012adc : + 12adc: 01000093 li ra,16 + 12ae0: 01e00113 li sp,30 + 12ae4: 0020a033 slt zero,ra,sp + 12ae8: 00000e93 li t4,0 + 12aec: 20b00193 li gp,523 + 12af0: 01d01463 bne zero,t4,12af8 + 12af4: 00301463 bne zero,gp,12afc + +00012af8 : + 12af8: 00000a6f jal s4,12af8 + +00012afc : + 12afc: 00100193 li gp,1 + +00012b00 : + 12b00: 00000a6f jal s4,12b00 diff --git a/src/Rv32iCPU/benchmark/testB_data.txt b/src/Rv32iCPU/benchmark/testB_data.txt new file mode 100644 index 0000000..ec3e1bd --- /dev/null +++ b/src/Rv32iCPU/benchmark/testB_data.txt @@ -0,0 +1,3825 @@ +00004097 +acc08093 +00008f03 +fff00e93 +0ed00193 +01df0463 +25d0206f +00004097 +ab008093 +00108f03 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+00000213 +00d00113 +00000013 +00700093 +0020af33 +00120213 +00200293 +fe5214e3 +00100e93 +20500193 +0bdf1c63 +00000213 +00d00113 +00000013 +01300093 +00000013 +0020af33 +00120213 +00200293 +fe5212e3 +00000e93 +20600193 +09df1463 +00000213 +00d00113 +00000013 +00000013 +00600093 +0020af33 +00120213 +00200293 +fe5212e3 +00100e93 +20700193 +05df1c63 +fff00093 +00102133 +00000e93 +20800193 +05d11263 +fff00093 +0000a133 +00100e93 +20900193 +03d11863 +000020b3 +00000e93 +20a00193 +03d09063 +01000093 +01e00113 +0020a033 +00000e93 +20b00193 +01d01463 +00301463 +00000a6f +00100193 +00000a6f +00000000 diff --git a/src/Rv32iCPU/benchmark/testC_assembly.txt b/src/Rv32iCPU/benchmark/testC_assembly.txt new file mode 100644 index 0000000..fd648f4 --- /dev/null +++ b/src/Rv32iCPU/benchmark/testC_assembly.txt @@ -0,0 +1,3538 @@ +00010084 : + 10084: 00000093 li ra,0 + 10088: 0000af13 slti t5,ra,0 + 1008c: 00000e93 li t4,0 + 10090: 20c00193 li gp,524 + 10094: 01df0463 beq t5,t4,1009c + 10098: 54d0206f j 12de4 + +0001009c : + 1009c: 00100093 li ra,1 + 100a0: 0010af13 slti t5,ra,1 + 100a4: 00000e93 li t4,0 + 100a8: 20d00193 li gp,525 + 100ac: 01df0463 beq t5,t4,100b4 + 100b0: 5350206f j 12de4 + +000100b4 : + 100b4: 00300093 li ra,3 + 100b8: 0070af13 slti t5,ra,7 + 100bc: 00100e93 li t4,1 + 100c0: 20e00193 li gp,526 + 100c4: 01df0463 beq t5,t4,100cc + 100c8: 51d0206f j 12de4 + +000100cc : + 100cc: 00700093 li ra,7 + 100d0: 0030af13 slti t5,ra,3 + 100d4: 00000e93 li t4,0 + 100d8: 20f00193 li gp,527 + 100dc: 01df0463 beq t5,t4,100e4 + 100e0: 5050206f j 12de4 + +000100e4 : + 100e4: 00000093 li ra,0 + 100e8: 8000af13 slti t5,ra,-2048 + 100ec: 00000e93 li t4,0 + 100f0: 21000193 li gp,528 + 100f4: 01df0463 beq t5,t4,100fc + 100f8: 4ed0206f j 12de4 + +000100fc : + 100fc: 800000b7 lui ra,0x80000 + 10100: 0000af13 slti t5,ra,0 + 10104: 00100e93 li t4,1 + 10108: 21100193 li gp,529 + 1010c: 01df0463 beq t5,t4,10114 + 10110: 4d50206f j 12de4 + +00010114 : + 10114: 800000b7 lui ra,0x80000 + 10118: 8000af13 slti t5,ra,-2048 + 1011c: 00100e93 li t4,1 + 10120: 21200193 li gp,530 + 10124: 01df0463 beq t5,t4,1012c + 10128: 4bd0206f j 12de4 + +0001012c : + 1012c: 00000093 li ra,0 + 10130: 7ff0af13 slti t5,ra,2047 + 10134: 00100e93 li t4,1 + 10138: 21300193 li gp,531 + 1013c: 01df0463 beq t5,t4,10144 + 10140: 4a50206f j 12de4 + +00010144 : + 10144: 800000b7 lui ra,0x80000 + 10148: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 1014c: 0000af13 slti t5,ra,0 + 10150: 00000e93 li t4,0 + 10154: 21400193 li gp,532 + 10158: 01df0463 beq t5,t4,10160 + 1015c: 4890206f j 12de4 + +00010160 : + 10160: 800000b7 lui ra,0x80000 + 10164: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 10168: 7ff0af13 slti t5,ra,2047 + 1016c: 00000e93 li t4,0 + 10170: 21500193 li gp,533 + 10174: 01df0463 beq t5,t4,1017c + 10178: 46d0206f j 12de4 + +0001017c : + 1017c: 800000b7 lui ra,0x80000 + 10180: 7ff0af13 slti t5,ra,2047 + 10184: 00100e93 li t4,1 + 10188: 21600193 li gp,534 + 1018c: 01df0463 beq t5,t4,10194 + 10190: 4550206f j 12de4 + +00010194 : + 10194: 800000b7 lui ra,0x80000 + 10198: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 1019c: 8000af13 slti t5,ra,-2048 + 101a0: 00000e93 li t4,0 + 101a4: 21700193 li gp,535 + 101a8: 01df0463 beq t5,t4,101b0 + 101ac: 4390206f j 12de4 + +000101b0 : + 101b0: 00000093 li ra,0 + 101b4: fff0af13 slti t5,ra,-1 + 101b8: 00000e93 li t4,0 + 101bc: 21800193 li gp,536 + 101c0: 01df0463 beq t5,t4,101c8 + 101c4: 4210206f j 12de4 + +000101c8 : + 101c8: fff00093 li ra,-1 + 101cc: 0010af13 slti t5,ra,1 + 101d0: 00100e93 li t4,1 + 101d4: 21900193 li gp,537 + 101d8: 01df0463 beq t5,t4,101e0 + 101dc: 4090206f j 12de4 + +000101e0 : + 101e0: fff00093 li ra,-1 + 101e4: fff0af13 slti t5,ra,-1 + 101e8: 00000e93 li t4,0 + 101ec: 21a00193 li gp,538 + 101f0: 01df0463 beq t5,t4,101f8 + 101f4: 3f10206f j 12de4 + +000101f8 : + 101f8: 00b00093 li ra,11 + 101fc: 00d0a093 slti ra,ra,13 + 10200: 00100e93 li t4,1 + 10204: 21b00193 li gp,539 + 10208: 01d08463 beq ra,t4,10210 + 1020c: 3d90206f j 12de4 + +00010210 : + 10210: 00000213 li tp,0 + 10214: 00f00093 li ra,15 + 10218: 00a0af13 slti t5,ra,10 + 1021c: 000f0313 mv t1,t5 + 10220: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10224: 00200293 li t0,2 + 10228: fe5216e3 bne tp,t0,10214 + 1022c: 00000e93 li t4,0 + 10230: 21c00193 li gp,540 + 10234: 01d30463 beq t1,t4,1023c + 10238: 3ad0206f j 12de4 + +0001023c : + 1023c: 00000213 li tp,0 + 10240: 00a00093 li ra,10 + 10244: 0100af13 slti t5,ra,16 + 10248: 00000013 nop + 1024c: 000f0313 mv t1,t5 + 10250: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10254: 00200293 li t0,2 + 10258: fe5214e3 bne tp,t0,10240 + 1025c: 00100e93 li t4,1 + 10260: 21d00193 li gp,541 + 10264: 01d30463 beq t1,t4,1026c + 10268: 37d0206f j 12de4 + +0001026c : + 1026c: 00000213 li tp,0 + 10270: 01000093 li ra,16 + 10274: 0090af13 slti t5,ra,9 + 10278: 00000013 nop + 1027c: 00000013 nop + 10280: 000f0313 mv t1,t5 + 10284: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10288: 00200293 li t0,2 + 1028c: fe5212e3 bne tp,t0,10270 + 10290: 00000e93 li t4,0 + 10294: 21e00193 li gp,542 + 10298: 01d30463 beq t1,t4,102a0 + 1029c: 3490206f j 12de4 + +000102a0 : + 102a0: 00000213 li tp,0 + 102a4: 00b00093 li ra,11 + 102a8: 00f0af13 slti t5,ra,15 + 102ac: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 102b0: 00200293 li t0,2 + 102b4: fe5218e3 bne tp,t0,102a4 + 102b8: 00100e93 li t4,1 + 102bc: 21f00193 li gp,543 + 102c0: 01df0463 beq t5,t4,102c8 + 102c4: 3210206f j 12de4 + +000102c8 : + 102c8: 00000213 li tp,0 + 102cc: 01100093 li ra,17 + 102d0: 00000013 nop + 102d4: 0080af13 slti t5,ra,8 + 102d8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 102dc: 00200293 li t0,2 + 102e0: fe5216e3 bne tp,t0,102cc + 102e4: 00000e93 li t4,0 + 102e8: 22000193 li gp,544 + 102ec: 01df0463 beq t5,t4,102f4 + 102f0: 2f50206f j 12de4 + +000102f4 : + 102f4: 00000213 li tp,0 + 102f8: 00c00093 li ra,12 + 102fc: 00000013 nop + 10300: 00000013 nop + 10304: 00e0af13 slti t5,ra,14 + 10308: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1030c: 00200293 li t0,2 + 10310: fe5214e3 bne tp,t0,102f8 + 10314: 00100e93 li t4,1 + 10318: 22100193 li gp,545 + 1031c: 01df0463 beq t5,t4,10324 + 10320: 2c50206f j 12de4 + +00010324 : + 10324: fff02093 slti ra,zero,-1 + 10328: 00000e93 li t4,0 + 1032c: 22200193 li gp,546 + 10330: 01d08463 beq ra,t4,10338 + 10334: 2b10206f j 12de4 + +00010338 : + 10338: 00ff00b7 lui ra,0xff0 + 1033c: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdb9f7> + 10340: fff0a013 slti zero,ra,-1 + 10344: 00000e93 li t4,0 + 10348: 22300193 li gp,547 + 1034c: 01d00463 beq zero,t4,10354 + 10350: 2950206f j 12de4 + +00010354 : + 10354: 00000093 li ra,0 + 10358: 0000bf13 sltiu t5,ra,0 + 1035c: 00000e93 li t4,0 + 10360: 22400193 li gp,548 + 10364: 01df0463 beq t5,t4,1036c + 10368: 27d0206f j 12de4 + +0001036c : + 1036c: 00100093 li ra,1 + 10370: 0010bf13 seqz t5,ra + 10374: 00000e93 li t4,0 + 10378: 22500193 li gp,549 + 1037c: 01df0463 beq t5,t4,10384 + 10380: 2650206f j 12de4 + +00010384 : + 10384: 00300093 li ra,3 + 10388: 0070bf13 sltiu t5,ra,7 + 1038c: 00100e93 li t4,1 + 10390: 22600193 li gp,550 + 10394: 01df0463 beq t5,t4,1039c + 10398: 24d0206f j 12de4 + +0001039c : + 1039c: 00700093 li ra,7 + 103a0: 0030bf13 sltiu t5,ra,3 + 103a4: 00000e93 li t4,0 + 103a8: 22700193 li gp,551 + 103ac: 01df0463 beq t5,t4,103b4 + 103b0: 2350206f j 12de4 + +000103b4 : + 103b4: 00000093 li ra,0 + 103b8: 8000bf13 sltiu t5,ra,-2048 + 103bc: 00100e93 li t4,1 + 103c0: 22800193 li gp,552 + 103c4: 01df0463 beq t5,t4,103cc + 103c8: 21d0206f j 12de4 + +000103cc : + 103cc: 800000b7 lui ra,0x80000 + 103d0: 0000bf13 sltiu t5,ra,0 + 103d4: 00000e93 li t4,0 + 103d8: 22900193 li gp,553 + 103dc: 01df0463 beq t5,t4,103e4 + 103e0: 2050206f j 12de4 + +000103e4 : + 103e4: 800000b7 lui ra,0x80000 + 103e8: 8000bf13 sltiu t5,ra,-2048 + 103ec: 00100e93 li t4,1 + 103f0: 22a00193 li gp,554 + 103f4: 01df0463 beq t5,t4,103fc + 103f8: 1ed0206f j 12de4 + +000103fc : + 103fc: 00000093 li ra,0 + 10400: 7ff0bf13 sltiu t5,ra,2047 + 10404: 00100e93 li t4,1 + 10408: 22b00193 li gp,555 + 1040c: 01df0463 beq t5,t4,10414 + 10410: 1d50206f j 12de4 + +00010414 : + 10414: 800000b7 lui ra,0x80000 + 10418: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 1041c: 0000bf13 sltiu t5,ra,0 + 10420: 00000e93 li t4,0 + 10424: 22c00193 li gp,556 + 10428: 01df0463 beq t5,t4,10430 + 1042c: 1b90206f j 12de4 + +00010430 : + 10430: 800000b7 lui ra,0x80000 + 10434: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 10438: 7ff0bf13 sltiu t5,ra,2047 + 1043c: 00000e93 li t4,0 + 10440: 22d00193 li gp,557 + 10444: 01df0463 beq t5,t4,1044c + 10448: 19d0206f j 12de4 + +0001044c : + 1044c: 800000b7 lui ra,0x80000 + 10450: 7ff0bf13 sltiu t5,ra,2047 + 10454: 00000e93 li t4,0 + 10458: 22e00193 li gp,558 + 1045c: 01df0463 beq t5,t4,10464 + 10460: 1850206f j 12de4 + +00010464 : + 10464: 800000b7 lui ra,0x80000 + 10468: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 1046c: 8000bf13 sltiu t5,ra,-2048 + 10470: 00100e93 li t4,1 + 10474: 22f00193 li gp,559 + 10478: 01df0463 beq t5,t4,10480 + 1047c: 1690206f j 12de4 + +00010480 : + 10480: 00000093 li ra,0 + 10484: fff0bf13 sltiu t5,ra,-1 + 10488: 00100e93 li t4,1 + 1048c: 23000193 li gp,560 + 10490: 01df0463 beq t5,t4,10498 + 10494: 1510206f j 12de4 + +00010498 : + 10498: fff00093 li ra,-1 + 1049c: 0010bf13 seqz t5,ra + 104a0: 00000e93 li t4,0 + 104a4: 23100193 li gp,561 + 104a8: 01df0463 beq t5,t4,104b0 + 104ac: 1390206f j 12de4 + +000104b0 : + 104b0: fff00093 li ra,-1 + 104b4: fff0bf13 sltiu t5,ra,-1 + 104b8: 00000e93 li t4,0 + 104bc: 23200193 li gp,562 + 104c0: 01df0463 beq t5,t4,104c8 + 104c4: 1210206f j 12de4 + +000104c8 : + 104c8: 00b00093 li ra,11 + 104cc: 00d0b093 sltiu ra,ra,13 + 104d0: 00100e93 li t4,1 + 104d4: 23300193 li gp,563 + 104d8: 01d08463 beq ra,t4,104e0 + 104dc: 1090206f j 12de4 + +000104e0 : + 104e0: 00000213 li tp,0 + 104e4: 00f00093 li ra,15 + 104e8: 00a0bf13 sltiu t5,ra,10 + 104ec: 000f0313 mv t1,t5 + 104f0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 104f4: 00200293 li t0,2 + 104f8: fe5216e3 bne tp,t0,104e4 + 104fc: 00000e93 li t4,0 + 10500: 23400193 li gp,564 + 10504: 01d30463 beq t1,t4,1050c + 10508: 0dd0206f j 12de4 + +0001050c : + 1050c: 00000213 li tp,0 + 10510: 00a00093 li ra,10 + 10514: 0100bf13 sltiu t5,ra,16 + 10518: 00000013 nop + 1051c: 000f0313 mv t1,t5 + 10520: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10524: 00200293 li t0,2 + 10528: fe5214e3 bne tp,t0,10510 + 1052c: 00100e93 li t4,1 + 10530: 23500193 li gp,565 + 10534: 01d30463 beq t1,t4,1053c + 10538: 0ad0206f j 12de4 + +0001053c : + 1053c: 00000213 li tp,0 + 10540: 01000093 li ra,16 + 10544: 0090bf13 sltiu t5,ra,9 + 10548: 00000013 nop + 1054c: 00000013 nop + 10550: 000f0313 mv t1,t5 + 10554: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10558: 00200293 li t0,2 + 1055c: fe5212e3 bne tp,t0,10540 + 10560: 00000e93 li t4,0 + 10564: 23700193 li gp,567 + 10568: 01d30463 beq t1,t4,10570 + 1056c: 0790206f j 12de4 + +00010570 : + 10570: 00000213 li tp,0 + 10574: 00b00093 li ra,11 + 10578: 00f0bf13 sltiu t5,ra,15 + 1057c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10580: 00200293 li t0,2 + 10584: fe5218e3 bne tp,t0,10574 + 10588: 00100e93 li t4,1 + 1058c: 23800193 li gp,568 + 10590: 01df0463 beq t5,t4,10598 + 10594: 0510206f j 12de4 + +00010598 : + 10598: 00000213 li tp,0 + 1059c: 01100093 li ra,17 + 105a0: 00000013 nop + 105a4: 0080bf13 sltiu t5,ra,8 + 105a8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 105ac: 00200293 li t0,2 + 105b0: fe5216e3 bne tp,t0,1059c + 105b4: 00000e93 li t4,0 + 105b8: 23900193 li gp,569 + 105bc: 01df0463 beq t5,t4,105c4 + 105c0: 0250206f j 12de4 + +000105c4 : + 105c4: 00000213 li tp,0 + 105c8: 00c00093 li ra,12 + 105cc: 00000013 nop + 105d0: 00000013 nop + 105d4: 00e0bf13 sltiu t5,ra,14 + 105d8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 105dc: 00200293 li t0,2 + 105e0: fe5214e3 bne tp,t0,105c8 + 105e4: 00100e93 li t4,1 + 105e8: 23a00193 li gp,570 + 105ec: 01df0463 beq t5,t4,105f4 + 105f0: 7f40206f j 12de4 + +000105f4 : + 105f4: fff03093 sltiu ra,zero,-1 + 105f8: 00100e93 li t4,1 + 105fc: 23b00193 li gp,571 + 10600: 01d08463 beq ra,t4,10608 + 10604: 7e00206f j 12de4 + +00010608 : + 10608: 00ff00b7 lui ra,0xff0 + 1060c: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdb9f7> + 10610: fff0b013 sltiu zero,ra,-1 + 10614: 00000e93 li t4,0 + 10618: 23c00193 li gp,572 + 1061c: 01d00463 beq zero,t4,10624 + 10620: 7c40206f j 12de4 + +00010624 : + 10624: 00000093 li ra,0 + 10628: 00000113 li sp,0 + 1062c: 0020bf33 sltu t5,ra,sp + 10630: 00000e93 li t4,0 + 10634: 23d00193 li gp,573 + 10638: 01df0463 beq t5,t4,10640 + 1063c: 7a80206f j 12de4 + +00010640 : + 10640: 00100093 li ra,1 + 10644: 00100113 li sp,1 + 10648: 0020bf33 sltu t5,ra,sp + 1064c: 00000e93 li t4,0 + 10650: 23e00193 li gp,574 + 10654: 01df0463 beq t5,t4,1065c + 10658: 78c0206f j 12de4 + +0001065c : + 1065c: 00300093 li ra,3 + 10660: 00700113 li sp,7 + 10664: 0020bf33 sltu t5,ra,sp + 10668: 00100e93 li t4,1 + 1066c: 23f00193 li gp,575 + 10670: 01df0463 beq t5,t4,10678 + 10674: 7700206f j 12de4 + +00010678 : + 10678: 00700093 li ra,7 + 1067c: 00300113 li sp,3 + 10680: 0020bf33 sltu t5,ra,sp + 10684: 00000e93 li t4,0 + 10688: 24000193 li gp,576 + 1068c: 01df0463 beq t5,t4,10694 + 10690: 7540206f j 12de4 + +00010694 : + 10694: 00000093 li ra,0 + 10698: ffff8137 lui sp,0xffff8 + 1069c: 0020bf33 sltu t5,ra,sp + 106a0: 00100e93 li t4,1 + 106a4: 24100193 li gp,577 + 106a8: 01df0463 beq t5,t4,106b0 + 106ac: 7380206f j 12de4 + +000106b0 : + 106b0: 800000b7 lui ra,0x80000 + 106b4: 00000113 li sp,0 + 106b8: 0020bf33 sltu t5,ra,sp + 106bc: 00000e93 li t4,0 + 106c0: 24200193 li gp,578 + 106c4: 01df0463 beq t5,t4,106cc + 106c8: 71c0206f j 12de4 + +000106cc : + 106cc: 800000b7 lui ra,0x80000 + 106d0: ffff8137 lui sp,0xffff8 + 106d4: 0020bf33 sltu t5,ra,sp + 106d8: 00100e93 li t4,1 + 106dc: 24300193 li gp,579 + 106e0: 01df0463 beq t5,t4,106e8 + 106e4: 7000206f j 12de4 + +000106e8 : + 106e8: 00000093 li ra,0 + 106ec: 00008137 lui sp,0x8 + 106f0: fff10113 addi sp,sp,-1 # 7fff <_start-0x8081> + 106f4: 0020bf33 sltu t5,ra,sp + 106f8: 00100e93 li t4,1 + 106fc: 24400193 li gp,580 + 10700: 01df0463 beq t5,t4,10708 + 10704: 6e00206f j 12de4 + +00010708 : + 10708: 800000b7 lui ra,0x80000 + 1070c: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 10710: 00000113 li sp,0 + 10714: 0020bf33 sltu t5,ra,sp + 10718: 00000e93 li t4,0 + 1071c: 24500193 li gp,581 + 10720: 01df0463 beq t5,t4,10728 + 10724: 6c00206f j 12de4 + +00010728 : + 10728: 800000b7 lui ra,0x80000 + 1072c: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 10730: 00008137 lui sp,0x8 + 10734: fff10113 addi sp,sp,-1 # 7fff <_start-0x8081> + 10738: 0020bf33 sltu t5,ra,sp + 1073c: 00000e93 li t4,0 + 10740: 24600193 li gp,582 + 10744: 01df0463 beq t5,t4,1074c + 10748: 69c0206f j 12de4 + +0001074c : + 1074c: 800000b7 lui ra,0x80000 + 10750: 00008137 lui sp,0x8 + 10754: fff10113 addi sp,sp,-1 # 7fff <_start-0x8081> + 10758: 0020bf33 sltu t5,ra,sp + 1075c: 00000e93 li t4,0 + 10760: 24700193 li gp,583 + 10764: 01df0463 beq t5,t4,1076c + 10768: 67c0206f j 12de4 + +0001076c : + 1076c: 800000b7 lui ra,0x80000 + 10770: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 10774: ffff8137 lui sp,0xffff8 + 10778: 0020bf33 sltu t5,ra,sp + 1077c: 00100e93 li t4,1 + 10780: 24800193 li gp,584 + 10784: 01df0463 beq t5,t4,1078c + 10788: 65c0206f j 12de4 + +0001078c : + 1078c: 00000093 li ra,0 + 10790: fff00113 li sp,-1 + 10794: 0020bf33 sltu t5,ra,sp + 10798: 00100e93 li t4,1 + 1079c: 24900193 li gp,585 + 107a0: 01df0463 beq t5,t4,107a8 + 107a4: 6400206f j 12de4 + +000107a8 : + 107a8: fff00093 li ra,-1 + 107ac: 00100113 li sp,1 + 107b0: 0020bf33 sltu t5,ra,sp + 107b4: 00000e93 li t4,0 + 107b8: 24a00193 li gp,586 + 107bc: 01df0463 beq t5,t4,107c4 + 107c0: 6240206f j 12de4 + +000107c4 : + 107c4: fff00093 li ra,-1 + 107c8: fff00113 li sp,-1 + 107cc: 0020bf33 sltu t5,ra,sp + 107d0: 00000e93 li t4,0 + 107d4: 24b00193 li gp,587 + 107d8: 01df0463 beq t5,t4,107e0 + 107dc: 6080206f j 12de4 + +000107e0 : + 107e0: 00e00093 li ra,14 + 107e4: 00d00113 li sp,13 + 107e8: 0020b0b3 sltu ra,ra,sp + 107ec: 00000e93 li t4,0 + 107f0: 24c00193 li gp,588 + 107f4: 01d08463 beq ra,t4,107fc + 107f8: 5ec0206f j 12de4 + +000107fc : + 107fc: 00b00093 li ra,11 + 10800: 00d00113 li sp,13 + 10804: 0020b133 sltu sp,ra,sp + 10808: 00100e93 li t4,1 + 1080c: 24d00193 li gp,589 + 10810: 01d10463 beq sp,t4,10818 + 10814: 5d00206f j 12de4 + +00010818 : + 10818: 00d00093 li ra,13 + 1081c: 0010b0b3 sltu ra,ra,ra + 10820: 00000e93 li t4,0 + 10824: 24e00193 li gp,590 + 10828: 01d08463 beq ra,t4,10830 + 1082c: 5b80206f j 12de4 + +00010830 : + 10830: 00000213 li tp,0 + 10834: 00b00093 li ra,11 + 10838: 00d00113 li sp,13 + 1083c: 0020bf33 sltu t5,ra,sp + 10840: 000f0313 mv t1,t5 + 10844: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10848: 00200293 li t0,2 + 1084c: fe5214e3 bne tp,t0,10834 + 10850: 00100e93 li t4,1 + 10854: 24f00193 li gp,591 + 10858: 01d30463 beq t1,t4,10860 + 1085c: 5880206f j 12de4 + +00010860 : + 10860: 00000213 li tp,0 + 10864: 00e00093 li ra,14 + 10868: 00d00113 li sp,13 + 1086c: 0020bf33 sltu t5,ra,sp + 10870: 00000013 nop + 10874: 000f0313 mv t1,t5 + 10878: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1087c: 00200293 li t0,2 + 10880: fe5212e3 bne tp,t0,10864 + 10884: 00000e93 li t4,0 + 10888: 25000193 li gp,592 + 1088c: 01d30463 beq t1,t4,10894 + 10890: 5540206f j 12de4 + +00010894 : + 10894: 00000213 li tp,0 + 10898: 00c00093 li ra,12 + 1089c: 00d00113 li sp,13 + 108a0: 0020bf33 sltu t5,ra,sp + 108a4: 00000013 nop + 108a8: 00000013 nop + 108ac: 000f0313 mv t1,t5 + 108b0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 108b4: 00200293 li t0,2 + 108b8: fe5210e3 bne tp,t0,10898 + 108bc: 00100e93 li t4,1 + 108c0: 25100193 li gp,593 + 108c4: 01d30463 beq t1,t4,108cc + 108c8: 51c0206f j 12de4 + +000108cc : + 108cc: 00000213 li tp,0 + 108d0: 00e00093 li ra,14 + 108d4: 00d00113 li sp,13 + 108d8: 0020bf33 sltu t5,ra,sp + 108dc: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 108e0: 00200293 li t0,2 + 108e4: fe5216e3 bne tp,t0,108d0 + 108e8: 00000e93 li t4,0 + 108ec: 25200193 li gp,594 + 108f0: 01df0463 beq t5,t4,108f8 + 108f4: 4f00206f j 12de4 + +000108f8 : + 108f8: 00000213 li tp,0 + 108fc: 00b00093 li ra,11 + 10900: 00d00113 li sp,13 + 10904: 00000013 nop + 10908: 0020bf33 sltu t5,ra,sp + 1090c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10910: 00200293 li t0,2 + 10914: fe5214e3 bne tp,t0,108fc + 10918: 00100e93 li t4,1 + 1091c: 25300193 li gp,595 + 10920: 01df0463 beq t5,t4,10928 + 10924: 4c00206f j 12de4 + +00010928 : + 10928: 00000213 li tp,0 + 1092c: 00f00093 li ra,15 + 10930: 00d00113 li sp,13 + 10934: 00000013 nop + 10938: 00000013 nop + 1093c: 0020bf33 sltu t5,ra,sp + 10940: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10944: 00200293 li t0,2 + 10948: fe5212e3 bne tp,t0,1092c + 1094c: 00000e93 li t4,0 + 10950: 25400193 li gp,596 + 10954: 01df0463 beq t5,t4,1095c + 10958: 48c0206f j 12de4 + +0001095c : + 1095c: 00000213 li tp,0 + 10960: 00a00093 li ra,10 + 10964: 00000013 nop + 10968: 00d00113 li sp,13 + 1096c: 0020bf33 sltu t5,ra,sp + 10970: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10974: 00200293 li t0,2 + 10978: fe5214e3 bne tp,t0,10960 + 1097c: 00100e93 li t4,1 + 10980: 25500193 li gp,597 + 10984: 01df0463 beq t5,t4,1098c + 10988: 45c0206f j 12de4 + +0001098c : + 1098c: 00000213 li tp,0 + 10990: 01000093 li ra,16 + 10994: 00000013 nop + 10998: 00d00113 li sp,13 + 1099c: 00000013 nop + 109a0: 0020bf33 sltu t5,ra,sp + 109a4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 109a8: 00200293 li t0,2 + 109ac: fe5212e3 bne tp,t0,10990 + 109b0: 00000e93 li t4,0 + 109b4: 25600193 li gp,598 + 109b8: 01df0463 beq t5,t4,109c0 + 109bc: 4280206f j 12de4 + +000109c0 : + 109c0: 00000213 li tp,0 + 109c4: 00900093 li ra,9 + 109c8: 00000013 nop + 109cc: 00000013 nop + 109d0: 00d00113 li sp,13 + 109d4: 0020bf33 sltu t5,ra,sp + 109d8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 109dc: 00200293 li t0,2 + 109e0: fe5212e3 bne tp,t0,109c4 + 109e4: 00100e93 li t4,1 + 109e8: 25700193 li gp,599 + 109ec: 01df0463 beq t5,t4,109f4 + 109f0: 3f40206f j 12de4 + +000109f4 : + 109f4: 00000213 li tp,0 + 109f8: 00d00113 li sp,13 + 109fc: 01100093 li ra,17 + 10a00: 0020bf33 sltu t5,ra,sp + 10a04: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10a08: 00200293 li t0,2 + 10a0c: fe5216e3 bne tp,t0,109f8 + 10a10: 00000e93 li t4,0 + 10a14: 25900193 li gp,601 + 10a18: 01df0463 beq t5,t4,10a20 + 10a1c: 3c80206f j 12de4 + +00010a20 : + 10a20: 00000213 li tp,0 + 10a24: 00d00113 li sp,13 + 10a28: 00800093 li ra,8 + 10a2c: 00000013 nop + 10a30: 0020bf33 sltu t5,ra,sp + 10a34: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10a38: 00200293 li t0,2 + 10a3c: fe5214e3 bne tp,t0,10a24 + 10a40: 00100e93 li t4,1 + 10a44: 25a00193 li gp,602 + 10a48: 01df0463 beq t5,t4,10a50 + 10a4c: 3980206f j 12de4 + +00010a50 : + 10a50: 00000213 li tp,0 + 10a54: 00d00113 li sp,13 + 10a58: 01200093 li ra,18 + 10a5c: 00000013 nop + 10a60: 00000013 nop + 10a64: 0020bf33 sltu t5,ra,sp + 10a68: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10a6c: 00200293 li t0,2 + 10a70: fe5212e3 bne tp,t0,10a54 + 10a74: 00000e93 li t4,0 + 10a78: 25b00193 li gp,603 + 10a7c: 01df0463 beq t5,t4,10a84 + 10a80: 3640206f j 12de4 + +00010a84 : + 10a84: 00000213 li tp,0 + 10a88: 00d00113 li sp,13 + 10a8c: 00000013 nop + 10a90: 00700093 li ra,7 + 10a94: 0020bf33 sltu t5,ra,sp + 10a98: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10a9c: 00200293 li t0,2 + 10aa0: fe5214e3 bne tp,t0,10a88 + 10aa4: 00100e93 li t4,1 + 10aa8: 25c00193 li gp,604 + 10aac: 01df0463 beq t5,t4,10ab4 + 10ab0: 3340206f j 12de4 + +00010ab4 : + 10ab4: 00000213 li tp,0 + 10ab8: 00d00113 li sp,13 + 10abc: 00000013 nop + 10ac0: 01300093 li ra,19 + 10ac4: 00000013 nop + 10ac8: 0020bf33 sltu t5,ra,sp + 10acc: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10ad0: 00200293 li t0,2 + 10ad4: fe5212e3 bne tp,t0,10ab8 + 10ad8: 00000e93 li t4,0 + 10adc: 25d00193 li gp,605 + 10ae0: 01df0463 beq t5,t4,10ae8 + 10ae4: 3000206f j 12de4 + +00010ae8 : + 10ae8: 00000213 li tp,0 + 10aec: 00d00113 li sp,13 + 10af0: 00000013 nop + 10af4: 00000013 nop + 10af8: 00600093 li ra,6 + 10afc: 0020bf33 sltu t5,ra,sp + 10b00: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10b04: 00200293 li t0,2 + 10b08: fe5212e3 bne tp,t0,10aec + 10b0c: 00100e93 li t4,1 + 10b10: 25e00193 li gp,606 + 10b14: 01df0463 beq t5,t4,10b1c + 10b18: 2cc0206f j 12de4 + +00010b1c : + 10b1c: fff00093 li ra,-1 + 10b20: 00103133 snez sp,ra + 10b24: 00100e93 li t4,1 + 10b28: 25f00193 li gp,607 + 10b2c: 01d10463 beq sp,t4,10b34 + 10b30: 2b40206f j 12de4 + +00010b34 : + 10b34: fff00093 li ra,-1 + 10b38: 0000b133 sltu sp,ra,zero + 10b3c: 00000e93 li t4,0 + 10b40: 26000193 li gp,608 + 10b44: 01d10463 beq sp,t4,10b4c + 10b48: 29c0206f j 12de4 + +00010b4c : + 10b4c: 000030b3 snez ra,zero + 10b50: 00000e93 li t4,0 + 10b54: 26100193 li gp,609 + 10b58: 01d08463 beq ra,t4,10b60 + 10b5c: 2880206f j 12de4 + +00010b60 : + 10b60: 01000093 li ra,16 + 10b64: 01e00113 li sp,30 + 10b68: 0020b033 sltu zero,ra,sp + 10b6c: 00000e93 li t4,0 + 10b70: 26200193 li gp,610 + 10b74: 01d00463 beq zero,t4,10b7c + 10b78: 26c0206f j 12de4 + +00010b7c : + 10b7c: 800000b7 lui ra,0x80000 + 10b80: 00000113 li sp,0 + 10b84: 4020df33 sra t5,ra,sp + 10b88: 80000eb7 lui t4,0x80000 + 10b8c: 26300193 li gp,611 + 10b90: 01df0463 beq t5,t4,10b98 + 10b94: 2500206f j 12de4 + +00010b98 : + 10b98: 800000b7 lui ra,0x80000 + 10b9c: 00100113 li sp,1 + 10ba0: 4020df33 sra t5,ra,sp + 10ba4: c0000eb7 lui t4,0xc0000 + 10ba8: 26400193 li gp,612 + 10bac: 01df0463 beq t5,t4,10bb4 + 10bb0: 2340206f j 12de4 + +00010bb4 : + 10bb4: 800000b7 lui ra,0x80000 + 10bb8: 00700113 li sp,7 + 10bbc: 4020df33 sra t5,ra,sp + 10bc0: ff000eb7 lui t4,0xff000 + 10bc4: 26500193 li gp,613 + 10bc8: 01df0463 beq t5,t4,10bd0 + 10bcc: 2180206f j 12de4 + +00010bd0 : + 10bd0: 800000b7 lui ra,0x80000 + 10bd4: 00e00113 li sp,14 + 10bd8: 4020df33 sra t5,ra,sp + 10bdc: fffe0eb7 lui t4,0xfffe0 + 10be0: 26600193 li gp,614 + 10be4: 01df0463 beq t5,t4,10bec + 10be8: 1fc0206f j 12de4 + +00010bec : + 10bec: 800000b7 lui ra,0x80000 + 10bf0: 00108093 addi ra,ra,1 # 80000001 <__global_pointer$+0x7ffeb8f9> + 10bf4: 01f00113 li sp,31 + 10bf8: 4020df33 sra t5,ra,sp + 10bfc: fff00e93 li t4,-1 + 10c00: 26700193 li gp,615 + 10c04: 01df0463 beq t5,t4,10c0c + 10c08: 1dc0206f j 12de4 + +00010c0c : + 10c0c: 800000b7 lui ra,0x80000 + 10c10: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 10c14: 00000113 li sp,0 + 10c18: 4020df33 sra t5,ra,sp + 10c1c: 80000eb7 lui t4,0x80000 + 10c20: fffe8e93 addi t4,t4,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 10c24: 26800193 li gp,616 + 10c28: 01df0463 beq t5,t4,10c30 + 10c2c: 1b80206f j 12de4 + +00010c30 : + 10c30: 800000b7 lui ra,0x80000 + 10c34: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 10c38: 00100113 li sp,1 + 10c3c: 4020df33 sra t5,ra,sp + 10c40: 40000eb7 lui t4,0x40000 + 10c44: fffe8e93 addi t4,t4,-1 # 3fffffff <__global_pointer$+0x3ffeb8f7> + 10c48: 26900193 li gp,617 + 10c4c: 01df0463 beq t5,t4,10c54 + 10c50: 1940206f j 12de4 + +00010c54 : + 10c54: 800000b7 lui ra,0x80000 + 10c58: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 10c5c: 00700113 li sp,7 + 10c60: 4020df33 sra t5,ra,sp + 10c64: 01000eb7 lui t4,0x1000 + 10c68: fffe8e93 addi t4,t4,-1 # ffffff <__global_pointer$+0xfeb8f7> + 10c6c: 26a00193 li gp,618 + 10c70: 01df0463 beq t5,t4,10c78 + 10c74: 1700206f j 12de4 + +00010c78 : + 10c78: 800000b7 lui ra,0x80000 + 10c7c: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 10c80: 00e00113 li sp,14 + 10c84: 4020df33 sra t5,ra,sp + 10c88: 00020eb7 lui t4,0x20 + 10c8c: fffe8e93 addi t4,t4,-1 # 1ffff <__global_pointer$+0xb8f7> + 10c90: 26b00193 li gp,619 + 10c94: 01df0463 beq t5,t4,10c9c + 10c98: 14c0206f j 12de4 + +00010c9c : + 10c9c: 800000b7 lui ra,0x80000 + 10ca0: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 10ca4: 01f00113 li sp,31 + 10ca8: 4020df33 sra t5,ra,sp + 10cac: 00000e93 li t4,0 + 10cb0: 26c00193 li gp,620 + 10cb4: 01df0463 beq t5,t4,10cbc + 10cb8: 12c0206f j 12de4 + +00010cbc : + 10cbc: 818180b7 lui ra,0x81818 + 10cc0: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 10cc4: 00000113 li sp,0 + 10cc8: 4020df33 sra t5,ra,sp + 10ccc: 81818eb7 lui t4,0x81818 + 10cd0: 181e8e93 addi t4,t4,385 # 81818181 <__global_pointer$+0x81803a79> + 10cd4: 26d00193 li gp,621 + 10cd8: 01df0463 beq t5,t4,10ce0 + 10cdc: 1080206f j 12de4 + +00010ce0 : + 10ce0: 818180b7 lui ra,0x81818 + 10ce4: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 10ce8: 00100113 li sp,1 + 10cec: 4020df33 sra t5,ra,sp + 10cf0: c0c0ceb7 lui t4,0xc0c0c + 10cf4: 0c0e8e93 addi t4,t4,192 # c0c0c0c0 <__global_pointer$+0xc0bf79b8> + 10cf8: 26e00193 li gp,622 + 10cfc: 01df0463 beq t5,t4,10d04 + 10d00: 0e40206f j 12de4 + +00010d04 : + 10d04: 818180b7 lui ra,0x81818 + 10d08: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 10d0c: 00700113 li sp,7 + 10d10: 4020df33 sra t5,ra,sp + 10d14: ff030eb7 lui t4,0xff030 + 10d18: 303e8e93 addi t4,t4,771 # ff030303 <__global_pointer$+0xff01bbfb> + 10d1c: 26f00193 li gp,623 + 10d20: 01df0463 beq t5,t4,10d28 + 10d24: 0c00206f j 12de4 + +00010d28 : + 10d28: 818180b7 lui ra,0x81818 + 10d2c: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 10d30: 00e00113 li sp,14 + 10d34: 4020df33 sra t5,ra,sp + 10d38: fffe0eb7 lui t4,0xfffe0 + 10d3c: 606e8e93 addi t4,t4,1542 # fffe0606 <__global_pointer$+0xfffcbefe> + 10d40: 27000193 li gp,624 + 10d44: 01df0463 beq t5,t4,10d4c + 10d48: 09c0206f j 12de4 + +00010d4c : + 10d4c: 818180b7 lui ra,0x81818 + 10d50: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 10d54: 01f00113 li sp,31 + 10d58: 4020df33 sra t5,ra,sp + 10d5c: fff00e93 li t4,-1 + 10d60: 27100193 li gp,625 + 10d64: 01df0463 beq t5,t4,10d6c + 10d68: 07c0206f j 12de4 + +00010d6c : + 10d6c: 818180b7 lui ra,0x81818 + 10d70: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 10d74: fc000113 li sp,-64 + 10d78: 4020df33 sra t5,ra,sp + 10d7c: 81818eb7 lui t4,0x81818 + 10d80: 181e8e93 addi t4,t4,385 # 81818181 <__global_pointer$+0x81803a79> + 10d84: 27200193 li gp,626 + 10d88: 01df0463 beq t5,t4,10d90 + 10d8c: 0580206f j 12de4 + +00010d90 : + 10d90: 818180b7 lui ra,0x81818 + 10d94: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 10d98: fc100113 li sp,-63 + 10d9c: 4020df33 sra t5,ra,sp + 10da0: c0c0ceb7 lui t4,0xc0c0c + 10da4: 0c0e8e93 addi t4,t4,192 # c0c0c0c0 <__global_pointer$+0xc0bf79b8> + 10da8: 27300193 li gp,627 + 10dac: 01df0463 beq t5,t4,10db4 + 10db0: 0340206f j 12de4 + +00010db4 : + 10db4: 818180b7 lui ra,0x81818 + 10db8: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 10dbc: fc700113 li sp,-57 + 10dc0: 4020df33 sra t5,ra,sp + 10dc4: ff030eb7 lui t4,0xff030 + 10dc8: 303e8e93 addi t4,t4,771 # ff030303 <__global_pointer$+0xff01bbfb> + 10dcc: 27400193 li gp,628 + 10dd0: 01df0463 beq t5,t4,10dd8 + 10dd4: 0100206f j 12de4 + +00010dd8 : + 10dd8: 818180b7 lui ra,0x81818 + 10ddc: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 10de0: fce00113 li sp,-50 + 10de4: 4020df33 sra t5,ra,sp + 10de8: fffe0eb7 lui t4,0xfffe0 + 10dec: 606e8e93 addi t4,t4,1542 # fffe0606 <__global_pointer$+0xfffcbefe> + 10df0: 27500193 li gp,629 + 10df4: 01df0463 beq t5,t4,10dfc + 10df8: 7ed0106f j 12de4 + +00010dfc : + 10dfc: 818180b7 lui ra,0x81818 + 10e00: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 10e04: fff00113 li sp,-1 + 10e08: 4020df33 sra t5,ra,sp + 10e0c: fff00e93 li t4,-1 + 10e10: 27600193 li gp,630 + 10e14: 01df0463 beq t5,t4,10e1c + 10e18: 7cd0106f j 12de4 + +00010e1c : + 10e1c: 800000b7 lui ra,0x80000 + 10e20: 00700113 li sp,7 + 10e24: 4020d0b3 sra ra,ra,sp + 10e28: ff000eb7 lui t4,0xff000 + 10e2c: 27700193 li gp,631 + 10e30: 01d08463 beq ra,t4,10e38 + 10e34: 7b10106f j 12de4 + +00010e38 : + 10e38: 800000b7 lui ra,0x80000 + 10e3c: 00e00113 li sp,14 + 10e40: 4020d133 sra sp,ra,sp + 10e44: fffe0eb7 lui t4,0xfffe0 + 10e48: 27800193 li gp,632 + 10e4c: 01d10463 beq sp,t4,10e54 + 10e50: 7950106f j 12de4 + +00010e54 : + 10e54: 00700093 li ra,7 + 10e58: 4010d0b3 sra ra,ra,ra + 10e5c: 00000e93 li t4,0 + 10e60: 27900193 li gp,633 + 10e64: 01d08463 beq ra,t4,10e6c + 10e68: 77d0106f j 12de4 + +00010e6c : + 10e6c: 00000213 li tp,0 + 10e70: 800000b7 lui ra,0x80000 + 10e74: 00700113 li sp,7 + 10e78: 4020df33 sra t5,ra,sp + 10e7c: 000f0313 mv t1,t5 + 10e80: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10e84: 00200293 li t0,2 + 10e88: fe5214e3 bne tp,t0,10e70 + 10e8c: ff000eb7 lui t4,0xff000 + 10e90: 27a00193 li gp,634 + 10e94: 01d30463 beq t1,t4,10e9c + 10e98: 74d0106f j 12de4 + +00010e9c : + 10e9c: 00000213 li tp,0 + 10ea0: 800000b7 lui ra,0x80000 + 10ea4: 00e00113 li sp,14 + 10ea8: 4020df33 sra t5,ra,sp + 10eac: 00000013 nop + 10eb0: 000f0313 mv t1,t5 + 10eb4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10eb8: 00200293 li t0,2 + 10ebc: fe5212e3 bne tp,t0,10ea0 + 10ec0: fffe0eb7 lui t4,0xfffe0 + 10ec4: 27b00193 li gp,635 + 10ec8: 01d30463 beq t1,t4,10ed0 + 10ecc: 7190106f j 12de4 + +00010ed0 : + 10ed0: 00000213 li tp,0 + 10ed4: 800000b7 lui ra,0x80000 + 10ed8: 01f00113 li sp,31 + 10edc: 4020df33 sra t5,ra,sp + 10ee0: 00000013 nop + 10ee4: 00000013 nop + 10ee8: 000f0313 mv t1,t5 + 10eec: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10ef0: 00200293 li t0,2 + 10ef4: fe5210e3 bne tp,t0,10ed4 + 10ef8: fff00e93 li t4,-1 + 10efc: 27c00193 li gp,636 + 10f00: 01d30463 beq t1,t4,10f08 + 10f04: 6e10106f j 12de4 + +00010f08 : + 10f08: 00000213 li tp,0 + 10f0c: 800000b7 lui ra,0x80000 + 10f10: 00700113 li sp,7 + 10f14: 4020df33 sra t5,ra,sp + 10f18: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10f1c: 00200293 li t0,2 + 10f20: fe5216e3 bne tp,t0,10f0c + 10f24: ff000eb7 lui t4,0xff000 + 10f28: 27d00193 li gp,637 + 10f2c: 01df0463 beq t5,t4,10f34 + 10f30: 6b50106f j 12de4 + +00010f34 : + 10f34: 00000213 li tp,0 + 10f38: 800000b7 lui ra,0x80000 + 10f3c: 00e00113 li sp,14 + 10f40: 00000013 nop + 10f44: 4020df33 sra t5,ra,sp + 10f48: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10f4c: 00200293 li t0,2 + 10f50: fe5214e3 bne tp,t0,10f38 + 10f54: fffe0eb7 lui t4,0xfffe0 + 10f58: 27e00193 li gp,638 + 10f5c: 01df0463 beq t5,t4,10f64 + 10f60: 6850106f j 12de4 + +00010f64 : + 10f64: 00000213 li tp,0 + 10f68: 800000b7 lui ra,0x80000 + 10f6c: 01f00113 li sp,31 + 10f70: 00000013 nop + 10f74: 00000013 nop + 10f78: 4020df33 sra t5,ra,sp + 10f7c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10f80: 00200293 li t0,2 + 10f84: fe5212e3 bne tp,t0,10f68 + 10f88: fff00e93 li t4,-1 + 10f8c: 27f00193 li gp,639 + 10f90: 01df0463 beq t5,t4,10f98 + 10f94: 6510106f j 12de4 + +00010f98 : + 10f98: 00000213 li tp,0 + 10f9c: 800000b7 lui ra,0x80000 + 10fa0: 00000013 nop + 10fa4: 00700113 li sp,7 + 10fa8: 4020df33 sra t5,ra,sp + 10fac: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10fb0: 00200293 li t0,2 + 10fb4: fe5214e3 bne tp,t0,10f9c + 10fb8: ff000eb7 lui t4,0xff000 + 10fbc: 28000193 li gp,640 + 10fc0: 01df0463 beq t5,t4,10fc8 + 10fc4: 6210106f j 12de4 + +00010fc8 : + 10fc8: 00000213 li tp,0 + 10fcc: 800000b7 lui ra,0x80000 + 10fd0: 00000013 nop + 10fd4: 00e00113 li sp,14 + 10fd8: 00000013 nop + 10fdc: 4020df33 sra t5,ra,sp + 10fe0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 10fe4: 00200293 li t0,2 + 10fe8: fe5212e3 bne tp,t0,10fcc + 10fec: fffe0eb7 lui t4,0xfffe0 + 10ff0: 28100193 li gp,641 + 10ff4: 01df0463 beq t5,t4,10ffc + 10ff8: 5ed0106f j 12de4 + +00010ffc : + 10ffc: 00000213 li tp,0 + 11000: 800000b7 lui ra,0x80000 + 11004: 00000013 nop + 11008: 00000013 nop + 1100c: 01f00113 li sp,31 + 11010: 4020df33 sra t5,ra,sp + 11014: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11018: 00200293 li t0,2 + 1101c: fe5212e3 bne tp,t0,11000 + 11020: fff00e93 li t4,-1 + 11024: 28200193 li gp,642 + 11028: 01df0463 beq t5,t4,11030 + 1102c: 5b90106f j 12de4 + +00011030 : + 11030: 00000213 li tp,0 + 11034: 00700113 li sp,7 + 11038: 800000b7 lui ra,0x80000 + 1103c: 4020df33 sra t5,ra,sp + 11040: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11044: 00200293 li t0,2 + 11048: fe5216e3 bne tp,t0,11034 + 1104c: ff000eb7 lui t4,0xff000 + 11050: 28300193 li gp,643 + 11054: 01df0463 beq t5,t4,1105c + 11058: 58d0106f j 12de4 + +0001105c : + 1105c: 00000213 li tp,0 + 11060: 00e00113 li sp,14 + 11064: 800000b7 lui ra,0x80000 + 11068: 00000013 nop + 1106c: 4020df33 sra t5,ra,sp + 11070: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11074: 00200293 li t0,2 + 11078: fe5214e3 bne tp,t0,11060 + 1107c: fffe0eb7 lui t4,0xfffe0 + 11080: 28400193 li gp,644 + 11084: 01df0463 beq t5,t4,1108c + 11088: 55d0106f j 12de4 + +0001108c : + 1108c: 00000213 li tp,0 + 11090: 01f00113 li sp,31 + 11094: 800000b7 lui ra,0x80000 + 11098: 00000013 nop + 1109c: 00000013 nop + 110a0: 4020df33 sra t5,ra,sp + 110a4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 110a8: 00200293 li t0,2 + 110ac: fe5212e3 bne tp,t0,11090 + 110b0: fff00e93 li t4,-1 + 110b4: 28500193 li gp,645 + 110b8: 01df0463 beq t5,t4,110c0 + 110bc: 5290106f j 12de4 + +000110c0 : + 110c0: 00000213 li tp,0 + 110c4: 00700113 li sp,7 + 110c8: 00000013 nop + 110cc: 800000b7 lui ra,0x80000 + 110d0: 4020df33 sra t5,ra,sp + 110d4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 110d8: 00200293 li t0,2 + 110dc: fe5214e3 bne tp,t0,110c4 + 110e0: ff000eb7 lui t4,0xff000 + 110e4: 28600193 li gp,646 + 110e8: 01df0463 beq t5,t4,110f0 + 110ec: 4f90106f j 12de4 + +000110f0 : + 110f0: 00000213 li tp,0 + 110f4: 00e00113 li sp,14 + 110f8: 00000013 nop + 110fc: 800000b7 lui ra,0x80000 + 11100: 00000013 nop + 11104: 4020df33 sra t5,ra,sp + 11108: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1110c: 00200293 li t0,2 + 11110: fe5212e3 bne tp,t0,110f4 + 11114: fffe0eb7 lui t4,0xfffe0 + 11118: 28700193 li gp,647 + 1111c: 01df0463 beq t5,t4,11124 + 11120: 4c50106f j 12de4 + +00011124 : + 11124: 00000213 li tp,0 + 11128: 01f00113 li sp,31 + 1112c: 00000013 nop + 11130: 00000013 nop + 11134: 800000b7 lui ra,0x80000 + 11138: 4020df33 sra t5,ra,sp + 1113c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11140: 00200293 li t0,2 + 11144: fe5212e3 bne tp,t0,11128 + 11148: fff00e93 li t4,-1 + 1114c: 28800193 li gp,648 + 11150: 01df0463 beq t5,t4,11158 + 11154: 4910106f j 12de4 + +00011158 : + 11158: 00f00093 li ra,15 + 1115c: 40105133 sra sp,zero,ra + 11160: 00000e93 li t4,0 + 11164: 28900193 li gp,649 + 11168: 01d10463 beq sp,t4,11170 + 1116c: 4790106f j 12de4 + +00011170 : + 11170: 02000093 li ra,32 + 11174: 4000d133 sra sp,ra,zero + 11178: 02000e93 li t4,32 + 1117c: 28a00193 li gp,650 + 11180: 01d10463 beq sp,t4,11188 + 11184: 4610106f j 12de4 + +00011188 : + 11188: 400050b3 sra ra,zero,zero + 1118c: 00000e93 li t4,0 + 11190: 28b00193 li gp,651 + 11194: 01d08463 beq ra,t4,1119c + 11198: 44d0106f j 12de4 + +0001119c : + 1119c: 40000093 li ra,1024 + 111a0: 00001137 lui sp,0x1 + 111a4: 80010113 addi sp,sp,-2048 # 800 <_start-0xf880> + 111a8: 4020d033 sra zero,ra,sp + 111ac: 00000e93 li t4,0 + 111b0: 28c00193 li gp,652 + 111b4: 01d00463 beq zero,t4,111bc + 111b8: 42d0106f j 12de4 + +000111bc : + 111bc: 00000093 li ra,0 + 111c0: 4000df13 srai t5,ra,0x0 + 111c4: 00000e93 li t4,0 + 111c8: 28d00193 li gp,653 + 111cc: 01df0463 beq t5,t4,111d4 + 111d0: 4150106f j 12de4 + +000111d4 : + 111d4: 800000b7 lui ra,0x80000 + 111d8: 4010df13 srai t5,ra,0x1 + 111dc: c0000eb7 lui t4,0xc0000 + 111e0: 28e00193 li gp,654 + 111e4: 01df0463 beq t5,t4,111ec + 111e8: 3fd0106f j 12de4 + +000111ec : + 111ec: 800000b7 lui ra,0x80000 + 111f0: 4070df13 srai t5,ra,0x7 + 111f4: ff000eb7 lui t4,0xff000 + 111f8: 28f00193 li gp,655 + 111fc: 01df0463 beq t5,t4,11204 + 11200: 3e50106f j 12de4 + +00011204 : + 11204: 800000b7 lui ra,0x80000 + 11208: 40e0df13 srai t5,ra,0xe + 1120c: fffe0eb7 lui t4,0xfffe0 + 11210: 29000193 li gp,656 + 11214: 01df0463 beq t5,t4,1121c + 11218: 3cd0106f j 12de4 + +0001121c : + 1121c: 800000b7 lui ra,0x80000 + 11220: 00108093 addi ra,ra,1 # 80000001 <__global_pointer$+0x7ffeb8f9> + 11224: 41f0df13 srai t5,ra,0x1f + 11228: fff00e93 li t4,-1 + 1122c: 29100193 li gp,657 + 11230: 01df0463 beq t5,t4,11238 + 11234: 3b10106f j 12de4 + +00011238 : + 11238: 800000b7 lui ra,0x80000 + 1123c: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 11240: 4010df13 srai t5,ra,0x1 + 11244: 40000eb7 lui t4,0x40000 + 11248: fffe8e93 addi t4,t4,-1 # 3fffffff <__global_pointer$+0x3ffeb8f7> + 1124c: 29200193 li gp,658 + 11250: 01df0463 beq t5,t4,11258 + 11254: 3910106f j 12de4 + +00011258 : + 11258: 800000b7 lui ra,0x80000 + 1125c: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 11260: 4070df13 srai t5,ra,0x7 + 11264: 01000eb7 lui t4,0x1000 + 11268: fffe8e93 addi t4,t4,-1 # ffffff <__global_pointer$+0xfeb8f7> + 1126c: 29300193 li gp,659 + 11270: 01df0463 beq t5,t4,11278 + 11274: 3710106f j 12de4 + +00011278 : + 11278: 800000b7 lui ra,0x80000 + 1127c: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 11280: 40e0df13 srai t5,ra,0xe + 11284: 00020eb7 lui t4,0x20 + 11288: fffe8e93 addi t4,t4,-1 # 1ffff <__global_pointer$+0xb8f7> + 1128c: 29400193 li gp,660 + 11290: 01df0463 beq t5,t4,11298 + 11294: 3510106f j 12de4 + +00011298 : + 11298: 800000b7 lui ra,0x80000 + 1129c: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 112a0: 41f0df13 srai t5,ra,0x1f + 112a4: 00000e93 li t4,0 + 112a8: 29500193 li gp,661 + 112ac: 01df0463 beq t5,t4,112b4 + 112b0: 3350106f j 12de4 + +000112b4 : + 112b4: 818180b7 lui ra,0x81818 + 112b8: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 112bc: 4000df13 srai t5,ra,0x0 + 112c0: 81818eb7 lui t4,0x81818 + 112c4: 181e8e93 addi t4,t4,385 # 81818181 <__global_pointer$+0x81803a79> + 112c8: 29600193 li gp,662 + 112cc: 01df0463 beq t5,t4,112d4 + 112d0: 3150106f j 12de4 + +000112d4 : + 112d4: 818180b7 lui ra,0x81818 + 112d8: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 112dc: 4010df13 srai t5,ra,0x1 + 112e0: c0c0ceb7 lui t4,0xc0c0c + 112e4: 0c0e8e93 addi t4,t4,192 # c0c0c0c0 <__global_pointer$+0xc0bf79b8> + 112e8: 29700193 li gp,663 + 112ec: 01df0463 beq t5,t4,112f4 + 112f0: 2f50106f j 12de4 + +000112f4 : + 112f4: 818180b7 lui ra,0x81818 + 112f8: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 112fc: 4070df13 srai t5,ra,0x7 + 11300: ff030eb7 lui t4,0xff030 + 11304: 303e8e93 addi t4,t4,771 # ff030303 <__global_pointer$+0xff01bbfb> + 11308: 29800193 li gp,664 + 1130c: 01df0463 beq t5,t4,11314 + 11310: 2d50106f j 12de4 + +00011314 : + 11314: 818180b7 lui ra,0x81818 + 11318: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 1131c: 40e0df13 srai t5,ra,0xe + 11320: fffe0eb7 lui t4,0xfffe0 + 11324: 606e8e93 addi t4,t4,1542 # fffe0606 <__global_pointer$+0xfffcbefe> + 11328: 29900193 li gp,665 + 1132c: 01df0463 beq t5,t4,11334 + 11330: 2b50106f j 12de4 + +00011334 : + 11334: 818180b7 lui ra,0x81818 + 11338: 18108093 addi ra,ra,385 # 81818181 <__global_pointer$+0x81803a79> + 1133c: 41f0df13 srai t5,ra,0x1f + 11340: fff00e93 li t4,-1 + 11344: 29a00193 li gp,666 + 11348: 01df0463 beq t5,t4,11350 + 1134c: 2990106f j 12de4 + +00011350 : + 11350: 800000b7 lui ra,0x80000 + 11354: 4070d093 srai ra,ra,0x7 + 11358: ff000eb7 lui t4,0xff000 + 1135c: 29b00193 li gp,667 + 11360: 01d08463 beq ra,t4,11368 + 11364: 2810106f j 12de4 + +00011368 : + 11368: 00000213 li tp,0 + 1136c: 800000b7 lui ra,0x80000 + 11370: 4070df13 srai t5,ra,0x7 + 11374: 000f0313 mv t1,t5 + 11378: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1137c: 00200293 li t0,2 + 11380: fe5216e3 bne tp,t0,1136c + 11384: ff000eb7 lui t4,0xff000 + 11388: 29c00193 li gp,668 + 1138c: 01d30463 beq t1,t4,11394 + 11390: 2550106f j 12de4 + +00011394 : + 11394: 00000213 li tp,0 + 11398: 800000b7 lui ra,0x80000 + 1139c: 40e0df13 srai t5,ra,0xe + 113a0: 00000013 nop + 113a4: 000f0313 mv t1,t5 + 113a8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 113ac: 00200293 li t0,2 + 113b0: fe5214e3 bne tp,t0,11398 + 113b4: fffe0eb7 lui t4,0xfffe0 + 113b8: 29d00193 li gp,669 + 113bc: 01d30463 beq t1,t4,113c4 + 113c0: 2250106f j 12de4 + +000113c4 : + 113c4: 00000213 li tp,0 + 113c8: 800000b7 lui ra,0x80000 + 113cc: 00108093 addi ra,ra,1 # 80000001 <__global_pointer$+0x7ffeb8f9> + 113d0: 41f0df13 srai t5,ra,0x1f + 113d4: 00000013 nop + 113d8: 00000013 nop + 113dc: 000f0313 mv t1,t5 + 113e0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 113e4: 00200293 li t0,2 + 113e8: fe5210e3 bne tp,t0,113c8 + 113ec: fff00e93 li t4,-1 + 113f0: 29e00193 li gp,670 + 113f4: 01d30463 beq t1,t4,113fc + 113f8: 1ed0106f j 12de4 + +000113fc : + 113fc: 00000213 li tp,0 + 11400: 800000b7 lui ra,0x80000 + 11404: 4070df13 srai t5,ra,0x7 + 11408: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1140c: 00200293 li t0,2 + 11410: fe5218e3 bne tp,t0,11400 + 11414: ff000eb7 lui t4,0xff000 + 11418: 29f00193 li gp,671 + 1141c: 01df0463 beq t5,t4,11424 + 11420: 1c50106f j 12de4 + +00011424 : + 11424: 00000213 li tp,0 + 11428: 800000b7 lui ra,0x80000 + 1142c: 00000013 nop + 11430: 40e0df13 srai t5,ra,0xe + 11434: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11438: 00200293 li t0,2 + 1143c: fe5216e3 bne tp,t0,11428 + 11440: fffe0eb7 lui t4,0xfffe0 + 11444: 2a000193 li gp,672 + 11448: 01df0463 beq t5,t4,11450 + 1144c: 1990106f j 12de4 + +00011450 : + 11450: 00000213 li tp,0 + 11454: 800000b7 lui ra,0x80000 + 11458: 00108093 addi ra,ra,1 # 80000001 <__global_pointer$+0x7ffeb8f9> + 1145c: 00000013 nop + 11460: 00000013 nop + 11464: 41f0df13 srai t5,ra,0x1f + 11468: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1146c: 00200293 li t0,2 + 11470: fe5212e3 bne tp,t0,11454 + 11474: fff00e93 li t4,-1 + 11478: 2a100193 li gp,673 + 1147c: 01df0463 beq t5,t4,11484 + 11480: 1650106f j 12de4 + +00011484 : + 11484: 40405093 srai ra,zero,0x4 + 11488: 00000e93 li t4,0 + 1148c: 2a200193 li gp,674 + 11490: 01d08463 beq ra,t4,11498 + 11494: 1510106f j 12de4 + +00011498 : + 11498: 02100093 li ra,33 + 1149c: 40a0d013 srai zero,ra,0xa + 114a0: 00000e93 li t4,0 + 114a4: 2a300193 li gp,675 + 114a8: 01d00463 beq zero,t4,114b0 + 114ac: 1390106f j 12de4 + +000114b0 : + 114b0: 800000b7 lui ra,0x80000 + 114b4: 00000113 li sp,0 + 114b8: 0020df33 srl t5,ra,sp + 114bc: 80000eb7 lui t4,0x80000 + 114c0: 2a400193 li gp,676 + 114c4: 01df0463 beq t5,t4,114cc + 114c8: 11d0106f j 12de4 + +000114cc : + 114cc: 800000b7 lui ra,0x80000 + 114d0: 00100113 li sp,1 + 114d4: 0020df33 srl t5,ra,sp + 114d8: 40000eb7 lui t4,0x40000 + 114dc: 2a500193 li gp,677 + 114e0: 01df0463 beq t5,t4,114e8 + 114e4: 1010106f j 12de4 + +000114e8 : + 114e8: 800000b7 lui ra,0x80000 + 114ec: 00700113 li sp,7 + 114f0: 0020df33 srl t5,ra,sp + 114f4: 01000eb7 lui t4,0x1000 + 114f8: 2a600193 li gp,678 + 114fc: 01df0463 beq t5,t4,11504 + 11500: 0e50106f j 12de4 + +00011504 : + 11504: 800000b7 lui ra,0x80000 + 11508: 00e00113 li sp,14 + 1150c: 0020df33 srl t5,ra,sp + 11510: 00020eb7 lui t4,0x20 + 11514: 2a700193 li gp,679 + 11518: 01df0463 beq t5,t4,11520 + 1151c: 0c90106f j 12de4 + +00011520 : + 11520: 800000b7 lui ra,0x80000 + 11524: 00108093 addi ra,ra,1 # 80000001 <__global_pointer$+0x7ffeb8f9> + 11528: 01f00113 li sp,31 + 1152c: 0020df33 srl t5,ra,sp + 11530: 00100e93 li t4,1 + 11534: 2a800193 li gp,680 + 11538: 01df0463 beq t5,t4,11540 + 1153c: 0a90106f j 12de4 + +00011540 : + 11540: fff00093 li ra,-1 + 11544: 00000113 li sp,0 + 11548: 0020df33 srl t5,ra,sp + 1154c: fff00e93 li t4,-1 + 11550: 2a900193 li gp,681 + 11554: 01df0463 beq t5,t4,1155c + 11558: 08d0106f j 12de4 + +0001155c : + 1155c: fff00093 li ra,-1 + 11560: 00100113 li sp,1 + 11564: 0020df33 srl t5,ra,sp + 11568: 80000eb7 lui t4,0x80000 + 1156c: fffe8e93 addi t4,t4,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 11570: 2aa00193 li gp,682 + 11574: 01df0463 beq t5,t4,1157c + 11578: 06d0106f j 12de4 + +0001157c : + 1157c: fff00093 li ra,-1 + 11580: 00700113 li sp,7 + 11584: 0020df33 srl t5,ra,sp + 11588: 02000eb7 lui t4,0x2000 + 1158c: fffe8e93 addi t4,t4,-1 # 1ffffff <__global_pointer$+0x1feb8f7> + 11590: 2ab00193 li gp,683 + 11594: 01df0463 beq t5,t4,1159c + 11598: 04d0106f j 12de4 + +0001159c : + 1159c: fff00093 li ra,-1 + 115a0: 00e00113 li sp,14 + 115a4: 0020df33 srl t5,ra,sp + 115a8: 00040eb7 lui t4,0x40 + 115ac: fffe8e93 addi t4,t4,-1 # 3ffff <__global_pointer$+0x2b8f7> + 115b0: 2ac00193 li gp,684 + 115b4: 01df0463 beq t5,t4,115bc + 115b8: 02d0106f j 12de4 + +000115bc : + 115bc: fff00093 li ra,-1 + 115c0: 01f00113 li sp,31 + 115c4: 0020df33 srl t5,ra,sp + 115c8: 00100e93 li t4,1 + 115cc: 2ad00193 li gp,685 + 115d0: 01df0463 beq t5,t4,115d8 + 115d4: 0110106f j 12de4 + +000115d8 : + 115d8: 212120b7 lui ra,0x21212 + 115dc: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 115e0: 00000113 li sp,0 + 115e4: 0020df33 srl t5,ra,sp + 115e8: 21212eb7 lui t4,0x21212 + 115ec: 121e8e93 addi t4,t4,289 # 21212121 <__global_pointer$+0x211fda19> + 115f0: 2ae00193 li gp,686 + 115f4: 01df0463 beq t5,t4,115fc + 115f8: 7ec0106f j 12de4 + +000115fc : + 115fc: 212120b7 lui ra,0x21212 + 11600: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 11604: 00100113 li sp,1 + 11608: 0020df33 srl t5,ra,sp + 1160c: 10909eb7 lui t4,0x10909 + 11610: 090e8e93 addi t4,t4,144 # 10909090 <__global_pointer$+0x108f4988> + 11614: 2af00193 li gp,687 + 11618: 01df0463 beq t5,t4,11620 + 1161c: 7c80106f j 12de4 + +00011620 : + 11620: 212120b7 lui ra,0x21212 + 11624: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 11628: 00700113 li sp,7 + 1162c: 0020df33 srl t5,ra,sp + 11630: 00424eb7 lui t4,0x424 + 11634: 242e8e93 addi t4,t4,578 # 424242 <__global_pointer$+0x40fb3a> + 11638: 2b000193 li gp,688 + 1163c: 01df0463 beq t5,t4,11644 + 11640: 7a40106f j 12de4 + +00011644 : + 11644: 212120b7 lui ra,0x21212 + 11648: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 1164c: 00e00113 li sp,14 + 11650: 0020df33 srl t5,ra,sp + 11654: 00008eb7 lui t4,0x8 + 11658: 484e8e93 addi t4,t4,1156 # 8484 <_start-0x7bfc> + 1165c: 2b100193 li gp,689 + 11660: 01df0463 beq t5,t4,11668 + 11664: 7800106f j 12de4 + +00011668 : + 11668: 212120b7 lui ra,0x21212 + 1166c: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 11670: 01f00113 li sp,31 + 11674: 0020df33 srl t5,ra,sp + 11678: 00000e93 li t4,0 + 1167c: 2b200193 li gp,690 + 11680: 01df0463 beq t5,t4,11688 + 11684: 7600106f j 12de4 + +00011688 : + 11688: 212120b7 lui ra,0x21212 + 1168c: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 11690: fc000113 li sp,-64 + 11694: 0020df33 srl t5,ra,sp + 11698: 21212eb7 lui t4,0x21212 + 1169c: 121e8e93 addi t4,t4,289 # 21212121 <__global_pointer$+0x211fda19> + 116a0: 2b300193 li gp,691 + 116a4: 01df0463 beq t5,t4,116ac + 116a8: 73c0106f j 12de4 + +000116ac : + 116ac: 212120b7 lui ra,0x21212 + 116b0: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 116b4: fc100113 li sp,-63 + 116b8: 0020df33 srl t5,ra,sp + 116bc: 10909eb7 lui t4,0x10909 + 116c0: 090e8e93 addi t4,t4,144 # 10909090 <__global_pointer$+0x108f4988> + 116c4: 2b400193 li gp,692 + 116c8: 01df0463 beq t5,t4,116d0 + 116cc: 7180106f j 12de4 + +000116d0 : + 116d0: 212120b7 lui ra,0x21212 + 116d4: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 116d8: fc700113 li sp,-57 + 116dc: 0020df33 srl t5,ra,sp + 116e0: 00424eb7 lui t4,0x424 + 116e4: 242e8e93 addi t4,t4,578 # 424242 <__global_pointer$+0x40fb3a> + 116e8: 2b500193 li gp,693 + 116ec: 01df0463 beq t5,t4,116f4 + 116f0: 6f40106f j 12de4 + +000116f4 : + 116f4: 212120b7 lui ra,0x21212 + 116f8: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 116fc: fce00113 li sp,-50 + 11700: 0020df33 srl t5,ra,sp + 11704: 00008eb7 lui t4,0x8 + 11708: 484e8e93 addi t4,t4,1156 # 8484 <_start-0x7bfc> + 1170c: 2b600193 li gp,694 + 11710: 01df0463 beq t5,t4,11718 + 11714: 6d00106f j 12de4 + +00011718 : + 11718: 212120b7 lui ra,0x21212 + 1171c: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 11720: fff00113 li sp,-1 + 11724: 0020df33 srl t5,ra,sp + 11728: 00000e93 li t4,0 + 1172c: 2b700193 li gp,695 + 11730: 01df0463 beq t5,t4,11738 + 11734: 6b00106f j 12de4 + +00011738 : + 11738: 800000b7 lui ra,0x80000 + 1173c: 00700113 li sp,7 + 11740: 0020d0b3 srl ra,ra,sp + 11744: 01000eb7 lui t4,0x1000 + 11748: 2b800193 li gp,696 + 1174c: 01d08463 beq ra,t4,11754 + 11750: 6940106f j 12de4 + +00011754 : + 11754: 800000b7 lui ra,0x80000 + 11758: 00e00113 li sp,14 + 1175c: 0020d133 srl sp,ra,sp + 11760: 00020eb7 lui t4,0x20 + 11764: 2b900193 li gp,697 + 11768: 01d10463 beq sp,t4,11770 + 1176c: 6780106f j 12de4 + +00011770 : + 11770: 00700093 li ra,7 + 11774: 0010d0b3 srl ra,ra,ra + 11778: 00000e93 li t4,0 + 1177c: 2ba00193 li gp,698 + 11780: 01d08463 beq ra,t4,11788 + 11784: 6600106f j 12de4 + +00011788 : + 11788: 00000213 li tp,0 + 1178c: 800000b7 lui ra,0x80000 + 11790: 00700113 li sp,7 + 11794: 0020df33 srl t5,ra,sp + 11798: 000f0313 mv t1,t5 + 1179c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 117a0: 00200293 li t0,2 + 117a4: fe5214e3 bne tp,t0,1178c + 117a8: 01000eb7 lui t4,0x1000 + 117ac: 2bb00193 li gp,699 + 117b0: 01d30463 beq t1,t4,117b8 + 117b4: 6300106f j 12de4 + +000117b8 : + 117b8: 00000213 li tp,0 + 117bc: 800000b7 lui ra,0x80000 + 117c0: 00e00113 li sp,14 + 117c4: 0020df33 srl t5,ra,sp + 117c8: 00000013 nop + 117cc: 000f0313 mv t1,t5 + 117d0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 117d4: 00200293 li t0,2 + 117d8: fe5212e3 bne tp,t0,117bc + 117dc: 00020eb7 lui t4,0x20 + 117e0: 2bc00193 li gp,700 + 117e4: 01d30463 beq t1,t4,117ec + 117e8: 5fc0106f j 12de4 + +000117ec : + 117ec: 00000213 li tp,0 + 117f0: 800000b7 lui ra,0x80000 + 117f4: 01f00113 li sp,31 + 117f8: 0020df33 srl t5,ra,sp + 117fc: 00000013 nop + 11800: 00000013 nop + 11804: 000f0313 mv t1,t5 + 11808: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1180c: 00200293 li t0,2 + 11810: fe5210e3 bne tp,t0,117f0 + 11814: 00100e93 li t4,1 + 11818: 2bd00193 li gp,701 + 1181c: 01d30463 beq t1,t4,11824 + 11820: 5c40106f j 12de4 + +00011824 : + 11824: 00000213 li tp,0 + 11828: 800000b7 lui ra,0x80000 + 1182c: 00700113 li sp,7 + 11830: 0020df33 srl t5,ra,sp + 11834: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11838: 00200293 li t0,2 + 1183c: fe5216e3 bne tp,t0,11828 + 11840: 01000eb7 lui t4,0x1000 + 11844: 2be00193 li gp,702 + 11848: 01df0463 beq t5,t4,11850 + 1184c: 5980106f j 12de4 + +00011850 : + 11850: 00000213 li tp,0 + 11854: 800000b7 lui ra,0x80000 + 11858: 00e00113 li sp,14 + 1185c: 00000013 nop + 11860: 0020df33 srl t5,ra,sp + 11864: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11868: 00200293 li t0,2 + 1186c: fe5214e3 bne tp,t0,11854 + 11870: 00020eb7 lui t4,0x20 + 11874: 2bf00193 li gp,703 + 11878: 01df0463 beq t5,t4,11880 + 1187c: 5680106f j 12de4 + +00011880 : + 11880: 00000213 li tp,0 + 11884: 800000b7 lui ra,0x80000 + 11888: 01f00113 li sp,31 + 1188c: 00000013 nop + 11890: 00000013 nop + 11894: 0020df33 srl t5,ra,sp + 11898: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1189c: 00200293 li t0,2 + 118a0: fe5212e3 bne tp,t0,11884 + 118a4: 00100e93 li t4,1 + 118a8: 2c000193 li gp,704 + 118ac: 01df0463 beq t5,t4,118b4 + 118b0: 5340106f j 12de4 + +000118b4 : + 118b4: 00000213 li tp,0 + 118b8: 800000b7 lui ra,0x80000 + 118bc: 00000013 nop + 118c0: 00700113 li sp,7 + 118c4: 0020df33 srl t5,ra,sp + 118c8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 118cc: 00200293 li t0,2 + 118d0: fe5214e3 bne tp,t0,118b8 + 118d4: 01000eb7 lui t4,0x1000 + 118d8: 2c100193 li gp,705 + 118dc: 01df0463 beq t5,t4,118e4 + 118e0: 5040106f j 12de4 + +000118e4 : + 118e4: 00000213 li tp,0 + 118e8: 800000b7 lui ra,0x80000 + 118ec: 00000013 nop + 118f0: 00e00113 li sp,14 + 118f4: 00000013 nop + 118f8: 0020df33 srl t5,ra,sp + 118fc: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11900: 00200293 li t0,2 + 11904: fe5212e3 bne tp,t0,118e8 + 11908: 00020eb7 lui t4,0x20 + 1190c: 2c200193 li gp,706 + 11910: 01df0463 beq t5,t4,11918 + 11914: 4d00106f j 12de4 + +00011918 : + 11918: 00000213 li tp,0 + 1191c: 800000b7 lui ra,0x80000 + 11920: 00000013 nop + 11924: 00000013 nop + 11928: 01f00113 li sp,31 + 1192c: 0020df33 srl t5,ra,sp + 11930: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11934: 00200293 li t0,2 + 11938: fe5212e3 bne tp,t0,1191c + 1193c: 00100e93 li t4,1 + 11940: 2c300193 li gp,707 + 11944: 01df0463 beq t5,t4,1194c + 11948: 49c0106f j 12de4 + +0001194c : + 1194c: 00000213 li tp,0 + 11950: 00700113 li sp,7 + 11954: 800000b7 lui ra,0x80000 + 11958: 0020df33 srl t5,ra,sp + 1195c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11960: 00200293 li t0,2 + 11964: fe5216e3 bne tp,t0,11950 + 11968: 01000eb7 lui t4,0x1000 + 1196c: 2c400193 li gp,708 + 11970: 01df0463 beq t5,t4,11978 + 11974: 4700106f j 12de4 + +00011978 : + 11978: 00000213 li tp,0 + 1197c: 00e00113 li sp,14 + 11980: 800000b7 lui ra,0x80000 + 11984: 00000013 nop + 11988: 0020df33 srl t5,ra,sp + 1198c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11990: 00200293 li t0,2 + 11994: fe5214e3 bne tp,t0,1197c + 11998: 00020eb7 lui t4,0x20 + 1199c: 2c500193 li gp,709 + 119a0: 01df0463 beq t5,t4,119a8 + 119a4: 4400106f j 12de4 + +000119a8 : + 119a8: 00000213 li tp,0 + 119ac: 01f00113 li sp,31 + 119b0: 800000b7 lui ra,0x80000 + 119b4: 00000013 nop + 119b8: 00000013 nop + 119bc: 0020df33 srl t5,ra,sp + 119c0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 119c4: 00200293 li t0,2 + 119c8: fe5212e3 bne tp,t0,119ac + 119cc: 00100e93 li t4,1 + 119d0: 2c600193 li gp,710 + 119d4: 01df0463 beq t5,t4,119dc + 119d8: 40c0106f j 12de4 + +000119dc : + 119dc: 00000213 li tp,0 + 119e0: 00700113 li sp,7 + 119e4: 00000013 nop + 119e8: 800000b7 lui ra,0x80000 + 119ec: 0020df33 srl t5,ra,sp + 119f0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 119f4: 00200293 li t0,2 + 119f8: fe5214e3 bne tp,t0,119e0 + 119fc: 01000eb7 lui t4,0x1000 + 11a00: 2c700193 li gp,711 + 11a04: 01df0463 beq t5,t4,11a0c + 11a08: 3dc0106f j 12de4 + +00011a0c : + 11a0c: 00000213 li tp,0 + 11a10: 00e00113 li sp,14 + 11a14: 00000013 nop + 11a18: 800000b7 lui ra,0x80000 + 11a1c: 00000013 nop + 11a20: 0020df33 srl t5,ra,sp + 11a24: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11a28: 00200293 li t0,2 + 11a2c: fe5212e3 bne tp,t0,11a10 + 11a30: 00020eb7 lui t4,0x20 + 11a34: 2c800193 li gp,712 + 11a38: 01df0463 beq t5,t4,11a40 + 11a3c: 3a80106f j 12de4 + +00011a40 : + 11a40: 00000213 li tp,0 + 11a44: 01f00113 li sp,31 + 11a48: 00000013 nop + 11a4c: 00000013 nop + 11a50: 800000b7 lui ra,0x80000 + 11a54: 0020df33 srl t5,ra,sp + 11a58: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11a5c: 00200293 li t0,2 + 11a60: fe5212e3 bne tp,t0,11a44 + 11a64: 00100e93 li t4,1 + 11a68: 2c900193 li gp,713 + 11a6c: 01df0463 beq t5,t4,11a74 + 11a70: 3740106f j 12de4 + +00011a74 : + 11a74: 00f00093 li ra,15 + 11a78: 00105133 srl sp,zero,ra + 11a7c: 00000e93 li t4,0 + 11a80: 2ca00193 li gp,714 + 11a84: 01d10463 beq sp,t4,11a8c + 11a88: 35c0106f j 12de4 + +00011a8c : + 11a8c: 02000093 li ra,32 + 11a90: 0000d133 srl sp,ra,zero + 11a94: 02000e93 li t4,32 + 11a98: 2cb00193 li gp,715 + 11a9c: 01d10463 beq sp,t4,11aa4 + 11aa0: 3440106f j 12de4 + +00011aa4 : + 11aa4: 000050b3 srl ra,zero,zero + 11aa8: 00000e93 li t4,0 + 11aac: 2cc00193 li gp,716 + 11ab0: 01d08463 beq ra,t4,11ab8 + 11ab4: 3300106f j 12de4 + +00011ab8 : + 11ab8: 40000093 li ra,1024 + 11abc: 00001137 lui sp,0x1 + 11ac0: 80010113 addi sp,sp,-2048 # 800 <_start-0xf880> + 11ac4: 0020d033 srl zero,ra,sp + 11ac8: 00000e93 li t4,0 + 11acc: 2cd00193 li gp,717 + 11ad0: 01d00463 beq zero,t4,11ad8 + 11ad4: 3100106f j 12de4 + +00011ad8 : + 11ad8: 800000b7 lui ra,0x80000 + 11adc: 00000113 li sp,0 + 11ae0: 0020df33 srl t5,ra,sp + 11ae4: 80000eb7 lui t4,0x80000 + 11ae8: 2ce00193 li gp,718 + 11aec: 01df0463 beq t5,t4,11af4 + 11af0: 2f40106f j 12de4 + +00011af4 : + 11af4: 800000b7 lui ra,0x80000 + 11af8: 00100113 li sp,1 + 11afc: 0020df33 srl t5,ra,sp + 11b00: 40000eb7 lui t4,0x40000 + 11b04: 2cf00193 li gp,719 + 11b08: 01df0463 beq t5,t4,11b10 + 11b0c: 2d80106f j 12de4 + +00011b10 : + 11b10: 800000b7 lui ra,0x80000 + 11b14: 00700113 li sp,7 + 11b18: 0020df33 srl t5,ra,sp + 11b1c: 01000eb7 lui t4,0x1000 + 11b20: 2d000193 li gp,720 + 11b24: 01df0463 beq t5,t4,11b2c + 11b28: 2bc0106f j 12de4 + +00011b2c : + 11b2c: 800000b7 lui ra,0x80000 + 11b30: 00e00113 li sp,14 + 11b34: 0020df33 srl t5,ra,sp + 11b38: 00020eb7 lui t4,0x20 + 11b3c: 2d100193 li gp,721 + 11b40: 01df0463 beq t5,t4,11b48 + 11b44: 2a00106f j 12de4 + +00011b48 : + 11b48: 800000b7 lui ra,0x80000 + 11b4c: 00108093 addi ra,ra,1 # 80000001 <__global_pointer$+0x7ffeb8f9> + 11b50: 01f00113 li sp,31 + 11b54: 0020df33 srl t5,ra,sp + 11b58: 00100e93 li t4,1 + 11b5c: 2d200193 li gp,722 + 11b60: 01df0463 beq t5,t4,11b68 + 11b64: 2800106f j 12de4 + +00011b68 : + 11b68: fff00093 li ra,-1 + 11b6c: 00000113 li sp,0 + 11b70: 0020df33 srl t5,ra,sp + 11b74: fff00e93 li t4,-1 + 11b78: 2d300193 li gp,723 + 11b7c: 01df0463 beq t5,t4,11b84 + 11b80: 2640106f j 12de4 + +00011b84 : + 11b84: fff00093 li ra,-1 + 11b88: 00100113 li sp,1 + 11b8c: 0020df33 srl t5,ra,sp + 11b90: 80000eb7 lui t4,0x80000 + 11b94: fffe8e93 addi t4,t4,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 11b98: 2d400193 li gp,724 + 11b9c: 01df0463 beq t5,t4,11ba4 + 11ba0: 2440106f j 12de4 + +00011ba4 : + 11ba4: fff00093 li ra,-1 + 11ba8: 00700113 li sp,7 + 11bac: 0020df33 srl t5,ra,sp + 11bb0: 02000eb7 lui t4,0x2000 + 11bb4: fffe8e93 addi t4,t4,-1 # 1ffffff <__global_pointer$+0x1feb8f7> + 11bb8: 2d500193 li gp,725 + 11bbc: 01df0463 beq t5,t4,11bc4 + 11bc0: 2240106f j 12de4 + +00011bc4 : + 11bc4: fff00093 li ra,-1 + 11bc8: 00e00113 li sp,14 + 11bcc: 0020df33 srl t5,ra,sp + 11bd0: 00040eb7 lui t4,0x40 + 11bd4: fffe8e93 addi t4,t4,-1 # 3ffff <__global_pointer$+0x2b8f7> + 11bd8: 2d600193 li gp,726 + 11bdc: 01df0463 beq t5,t4,11be4 + 11be0: 2040106f j 12de4 + +00011be4 : + 11be4: fff00093 li ra,-1 + 11be8: 01f00113 li sp,31 + 11bec: 0020df33 srl t5,ra,sp + 11bf0: 00100e93 li t4,1 + 11bf4: 2d700193 li gp,727 + 11bf8: 01df0463 beq t5,t4,11c00 + 11bfc: 1e80106f j 12de4 + +00011c00 : + 11c00: 212120b7 lui ra,0x21212 + 11c04: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 11c08: 00000113 li sp,0 + 11c0c: 0020df33 srl t5,ra,sp + 11c10: 21212eb7 lui t4,0x21212 + 11c14: 121e8e93 addi t4,t4,289 # 21212121 <__global_pointer$+0x211fda19> + 11c18: 2d800193 li gp,728 + 11c1c: 01df0463 beq t5,t4,11c24 + 11c20: 1c40106f j 12de4 + +00011c24 : + 11c24: 212120b7 lui ra,0x21212 + 11c28: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 11c2c: 00100113 li sp,1 + 11c30: 0020df33 srl t5,ra,sp + 11c34: 10909eb7 lui t4,0x10909 + 11c38: 090e8e93 addi t4,t4,144 # 10909090 <__global_pointer$+0x108f4988> + 11c3c: 2d900193 li gp,729 + 11c40: 01df0463 beq t5,t4,11c48 + 11c44: 1a00106f j 12de4 + +00011c48 : + 11c48: 212120b7 lui ra,0x21212 + 11c4c: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 11c50: 00700113 li sp,7 + 11c54: 0020df33 srl t5,ra,sp + 11c58: 00424eb7 lui t4,0x424 + 11c5c: 242e8e93 addi t4,t4,578 # 424242 <__global_pointer$+0x40fb3a> + 11c60: 2da00193 li gp,730 + 11c64: 01df0463 beq t5,t4,11c6c + 11c68: 17c0106f j 12de4 + +00011c6c : + 11c6c: 212120b7 lui ra,0x21212 + 11c70: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 11c74: 00e00113 li sp,14 + 11c78: 0020df33 srl t5,ra,sp + 11c7c: 00008eb7 lui t4,0x8 + 11c80: 484e8e93 addi t4,t4,1156 # 8484 <_start-0x7bfc> + 11c84: 2db00193 li gp,731 + 11c88: 01df0463 beq t5,t4,11c90 + 11c8c: 1580106f j 12de4 + +00011c90 : + 11c90: 212120b7 lui ra,0x21212 + 11c94: 12108093 addi ra,ra,289 # 21212121 <__global_pointer$+0x211fda19> + 11c98: 01f00113 li sp,31 + 11c9c: 0020df33 srl t5,ra,sp + 11ca0: 00000e93 li t4,0 + 11ca4: 2dc00193 li gp,732 + 11ca8: 01df0463 beq t5,t4,11cb0 + 11cac: 1380106f j 12de4 + +00011cb0 : + 11cb0: 800000b7 lui ra,0x80000 + 11cb4: 0070d093 srli ra,ra,0x7 + 11cb8: 01000eb7 lui t4,0x1000 + 11cbc: 2dd00193 li gp,733 + 11cc0: 01d08463 beq ra,t4,11cc8 + 11cc4: 1200106f j 12de4 + +00011cc8 : + 11cc8: 00000213 li tp,0 + 11ccc: 800000b7 lui ra,0x80000 + 11cd0: 0070df13 srli t5,ra,0x7 + 11cd4: 000f0313 mv t1,t5 + 11cd8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11cdc: 00200293 li t0,2 + 11ce0: fe5216e3 bne tp,t0,11ccc + 11ce4: 01000eb7 lui t4,0x1000 + 11ce8: 2de00193 li gp,734 + 11cec: 01d30463 beq t1,t4,11cf4 + 11cf0: 0f40106f j 12de4 + +00011cf4 : + 11cf4: 00000213 li tp,0 + 11cf8: 800000b7 lui ra,0x80000 + 11cfc: 00e0df13 srli t5,ra,0xe + 11d00: 00000013 nop + 11d04: 000f0313 mv t1,t5 + 11d08: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11d0c: 00200293 li t0,2 + 11d10: fe5214e3 bne tp,t0,11cf8 + 11d14: 00020eb7 lui t4,0x20 + 11d18: 2df00193 li gp,735 + 11d1c: 01d30463 beq t1,t4,11d24 + 11d20: 0c40106f j 12de4 + +00011d24 : + 11d24: 00000213 li tp,0 + 11d28: 800000b7 lui ra,0x80000 + 11d2c: 00108093 addi ra,ra,1 # 80000001 <__global_pointer$+0x7ffeb8f9> + 11d30: 01f0df13 srli t5,ra,0x1f + 11d34: 00000013 nop + 11d38: 00000013 nop + 11d3c: 000f0313 mv t1,t5 + 11d40: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11d44: 00200293 li t0,2 + 11d48: fe5210e3 bne tp,t0,11d28 + 11d4c: 00100e93 li t4,1 + 11d50: 2e000193 li gp,736 + 11d54: 01d30463 beq t1,t4,11d5c + 11d58: 08c0106f j 12de4 + +00011d5c : + 11d5c: 00000213 li tp,0 + 11d60: 800000b7 lui ra,0x80000 + 11d64: 0070df13 srli t5,ra,0x7 + 11d68: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11d6c: 00200293 li t0,2 + 11d70: fe5218e3 bne tp,t0,11d60 + 11d74: 01000eb7 lui t4,0x1000 + 11d78: 2e100193 li gp,737 + 11d7c: 01df0463 beq t5,t4,11d84 + 11d80: 0640106f j 12de4 + +00011d84 : + 11d84: 00000213 li tp,0 + 11d88: 800000b7 lui ra,0x80000 + 11d8c: 00000013 nop + 11d90: 00e0df13 srli t5,ra,0xe + 11d94: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11d98: 00200293 li t0,2 + 11d9c: fe5216e3 bne tp,t0,11d88 + 11da0: 00020eb7 lui t4,0x20 + 11da4: 2e200193 li gp,738 + 11da8: 01df0463 beq t5,t4,11db0 + 11dac: 0380106f j 12de4 + +00011db0 : + 11db0: 00000213 li tp,0 + 11db4: 800000b7 lui ra,0x80000 + 11db8: 00108093 addi ra,ra,1 # 80000001 <__global_pointer$+0x7ffeb8f9> + 11dbc: 00000013 nop + 11dc0: 00000013 nop + 11dc4: 01f0df13 srli t5,ra,0x1f + 11dc8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11dcc: 00200293 li t0,2 + 11dd0: fe5212e3 bne tp,t0,11db4 + 11dd4: 00100e93 li t4,1 + 11dd8: 2e300193 li gp,739 + 11ddc: 01df0463 beq t5,t4,11de4 + 11de0: 0040106f j 12de4 + +00011de4 : + 11de4: 00405093 srli ra,zero,0x4 + 11de8: 00000e93 li t4,0 + 11dec: 2e400193 li gp,740 + 11df0: 7fd09ae3 bne ra,t4,12de4 + +00011df4 : + 11df4: 02100093 li ra,33 + 11df8: 00a0d013 srli zero,ra,0xa + 11dfc: 00000e93 li t4,0 + 11e00: 2e500193 li gp,741 + 11e04: 7fd010e3 bne zero,t4,12de4 + +00011e08 : + 11e08: 00000093 li ra,0 + 11e0c: 00000113 li sp,0 + 11e10: 40208f33 sub t5,ra,sp + 11e14: 00000e93 li t4,0 + 11e18: 2e600193 li gp,742 + 11e1c: 7ddf14e3 bne t5,t4,12de4 + +00011e20 : + 11e20: 00100093 li ra,1 + 11e24: 00100113 li sp,1 + 11e28: 40208f33 sub t5,ra,sp + 11e2c: 00000e93 li t4,0 + 11e30: 2e700193 li gp,743 + 11e34: 7bdf18e3 bne t5,t4,12de4 + +00011e38 : + 11e38: 00300093 li ra,3 + 11e3c: 00700113 li sp,7 + 11e40: 40208f33 sub t5,ra,sp + 11e44: ffc00e93 li t4,-4 + 11e48: 2e800193 li gp,744 + 11e4c: 79df1ce3 bne t5,t4,12de4 + +00011e50 : + 11e50: 00000093 li ra,0 + 11e54: ffff8137 lui sp,0xffff8 + 11e58: 40208f33 sub t5,ra,sp + 11e5c: 00008eb7 lui t4,0x8 + 11e60: 2e900193 li gp,745 + 11e64: 79df10e3 bne t5,t4,12de4 + +00011e68 : + 11e68: 800000b7 lui ra,0x80000 + 11e6c: 00000113 li sp,0 + 11e70: 40208f33 sub t5,ra,sp + 11e74: 80000eb7 lui t4,0x80000 + 11e78: 2ea00193 li gp,746 + 11e7c: 77df14e3 bne t5,t4,12de4 + +00011e80 : + 11e80: 800000b7 lui ra,0x80000 + 11e84: ffff8137 lui sp,0xffff8 + 11e88: 40208f33 sub t5,ra,sp + 11e8c: 80008eb7 lui t4,0x80008 + 11e90: 2eb00193 li gp,747 + 11e94: 75df18e3 bne t5,t4,12de4 + +00011e98 : + 11e98: 00000093 li ra,0 + 11e9c: 00008137 lui sp,0x8 + 11ea0: fff10113 addi sp,sp,-1 # 7fff <_start-0x8081> + 11ea4: 40208f33 sub t5,ra,sp + 11ea8: ffff8eb7 lui t4,0xffff8 + 11eac: 001e8e93 addi t4,t4,1 # ffff8001 <__global_pointer$+0xfffe38f9> + 11eb0: 2ec00193 li gp,748 + 11eb4: 73df18e3 bne t5,t4,12de4 + +00011eb8 : + 11eb8: 800000b7 lui ra,0x80000 + 11ebc: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 11ec0: 00000113 li sp,0 + 11ec4: 40208f33 sub t5,ra,sp + 11ec8: 80000eb7 lui t4,0x80000 + 11ecc: fffe8e93 addi t4,t4,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 11ed0: 2ed00193 li gp,749 + 11ed4: 71df18e3 bne t5,t4,12de4 + +00011ed8 : + 11ed8: 800000b7 lui ra,0x80000 + 11edc: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 11ee0: 00008137 lui sp,0x8 + 11ee4: fff10113 addi sp,sp,-1 # 7fff <_start-0x8081> + 11ee8: 40208f33 sub t5,ra,sp + 11eec: 7fff8eb7 lui t4,0x7fff8 + 11ef0: 2ee00193 li gp,750 + 11ef4: 6fdf18e3 bne t5,t4,12de4 + +00011ef8 : + 11ef8: 800000b7 lui ra,0x80000 + 11efc: 00008137 lui sp,0x8 + 11f00: fff10113 addi sp,sp,-1 # 7fff <_start-0x8081> + 11f04: 40208f33 sub t5,ra,sp + 11f08: 7fff8eb7 lui t4,0x7fff8 + 11f0c: 001e8e93 addi t4,t4,1 # 7fff8001 <__global_pointer$+0x7ffe38f9> + 11f10: 2ef00193 li gp,751 + 11f14: 6ddf18e3 bne t5,t4,12de4 + +00011f18 : + 11f18: 800000b7 lui ra,0x80000 + 11f1c: fff08093 addi ra,ra,-1 # 7fffffff <__global_pointer$+0x7ffeb8f7> + 11f20: ffff8137 lui sp,0xffff8 + 11f24: 40208f33 sub t5,ra,sp + 11f28: 80008eb7 lui t4,0x80008 + 11f2c: fffe8e93 addi t4,t4,-1 # 80007fff <__global_pointer$+0x7fff38f7> + 11f30: 2f000193 li gp,752 + 11f34: 6bdf18e3 bne t5,t4,12de4 + +00011f38 : + 11f38: 00000093 li ra,0 + 11f3c: fff00113 li sp,-1 + 11f40: 40208f33 sub t5,ra,sp + 11f44: 00100e93 li t4,1 + 11f48: 2f100193 li gp,753 + 11f4c: 69df1ce3 bne t5,t4,12de4 + +00011f50 : + 11f50: fff00093 li ra,-1 + 11f54: 00100113 li sp,1 + 11f58: 40208f33 sub t5,ra,sp + 11f5c: ffe00e93 li t4,-2 + 11f60: 2f200193 li gp,754 + 11f64: 69df10e3 bne t5,t4,12de4 + +00011f68 : + 11f68: fff00093 li ra,-1 + 11f6c: fff00113 li sp,-1 + 11f70: 40208f33 sub t5,ra,sp + 11f74: 00000e93 li t4,0 + 11f78: 2f300193 li gp,755 + 11f7c: 67df14e3 bne t5,t4,12de4 + +00011f80 : + 11f80: 00d00093 li ra,13 + 11f84: 00b00113 li sp,11 + 11f88: 402080b3 sub ra,ra,sp + 11f8c: 00200e93 li t4,2 + 11f90: 2f400193 li gp,756 + 11f94: 65d098e3 bne ra,t4,12de4 + +00011f98 : + 11f98: 00e00093 li ra,14 + 11f9c: 00b00113 li sp,11 + 11fa0: 40208133 sub sp,ra,sp + 11fa4: 00300e93 li t4,3 + 11fa8: 2f500193 li gp,757 + 11fac: 63d11ce3 bne sp,t4,12de4 + +00011fb0 : + 11fb0: 00d00093 li ra,13 + 11fb4: 401080b3 sub ra,ra,ra + 11fb8: 00000e93 li t4,0 + 11fbc: 2f600193 li gp,758 + 11fc0: 63d092e3 bne ra,t4,12de4 + +00011fc4 : + 11fc4: 00000213 li tp,0 + 11fc8: 00d00093 li ra,13 + 11fcc: 00b00113 li sp,11 + 11fd0: 40208f33 sub t5,ra,sp + 11fd4: 000f0313 mv t1,t5 + 11fd8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 11fdc: 00200293 li t0,2 + 11fe0: fe5214e3 bne tp,t0,11fc8 + 11fe4: 00200e93 li t4,2 + 11fe8: 2f700193 li gp,759 + 11fec: 5fd31ce3 bne t1,t4,12de4 + +00011ff0 : + 11ff0: 00000213 li tp,0 + 11ff4: 00e00093 li ra,14 + 11ff8: 00b00113 li sp,11 + 11ffc: 40208f33 sub t5,ra,sp + 12000: 00000013 nop + 12004: 000f0313 mv t1,t5 + 12008: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1200c: 00200293 li t0,2 + 12010: fe5212e3 bne tp,t0,11ff4 + 12014: 00300e93 li t4,3 + 12018: 2f800193 li gp,760 + 1201c: 5dd314e3 bne t1,t4,12de4 + +00012020 : + 12020: 00000213 li tp,0 + 12024: 00f00093 li ra,15 + 12028: 00b00113 li sp,11 + 1202c: 40208f33 sub t5,ra,sp + 12030: 00000013 nop + 12034: 00000013 nop + 12038: 000f0313 mv t1,t5 + 1203c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12040: 00200293 li t0,2 + 12044: fe5210e3 bne tp,t0,12024 + 12048: 00400e93 li t4,4 + 1204c: 2f900193 li gp,761 + 12050: 59d31ae3 bne t1,t4,12de4 + +00012054 : + 12054: 00000213 li tp,0 + 12058: 00d00093 li ra,13 + 1205c: 00b00113 li sp,11 + 12060: 40208f33 sub t5,ra,sp + 12064: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12068: 00200293 li t0,2 + 1206c: fe5216e3 bne tp,t0,12058 + 12070: 00200e93 li t4,2 + 12074: 2fa00193 li gp,762 + 12078: 57df16e3 bne t5,t4,12de4 + +0001207c : + 1207c: 00000213 li tp,0 + 12080: 00e00093 li ra,14 + 12084: 00b00113 li sp,11 + 12088: 00000013 nop + 1208c: 40208f33 sub t5,ra,sp + 12090: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12094: 00200293 li t0,2 + 12098: fe5214e3 bne tp,t0,12080 + 1209c: 00300e93 li t4,3 + 120a0: 2fb00193 li gp,763 + 120a4: 55df10e3 bne t5,t4,12de4 + +000120a8 : + 120a8: 00000213 li tp,0 + 120ac: 00f00093 li ra,15 + 120b0: 00b00113 li sp,11 + 120b4: 00000013 nop + 120b8: 00000013 nop + 120bc: 40208f33 sub t5,ra,sp + 120c0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 120c4: 00200293 li t0,2 + 120c8: fe5212e3 bne tp,t0,120ac + 120cc: 00400e93 li t4,4 + 120d0: 2fc00193 li gp,764 + 120d4: 51df18e3 bne t5,t4,12de4 + +000120d8 : + 120d8: 00000213 li tp,0 + 120dc: 00d00093 li ra,13 + 120e0: 00000013 nop + 120e4: 00b00113 li sp,11 + 120e8: 40208f33 sub t5,ra,sp + 120ec: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 120f0: 00200293 li t0,2 + 120f4: fe5214e3 bne tp,t0,120dc + 120f8: 00200e93 li t4,2 + 120fc: 2fd00193 li gp,765 + 12100: 4fdf12e3 bne t5,t4,12de4 + +00012104 : + 12104: 00000213 li tp,0 + 12108: 00e00093 li ra,14 + 1210c: 00000013 nop + 12110: 00b00113 li sp,11 + 12114: 00000013 nop + 12118: 40208f33 sub t5,ra,sp + 1211c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12120: 00200293 li t0,2 + 12124: fe5212e3 bne tp,t0,12108 + 12128: 00300e93 li t4,3 + 1212c: 2fe00193 li gp,766 + 12130: 4bdf1ae3 bne t5,t4,12de4 + +00012134 : + 12134: 00000213 li tp,0 + 12138: 00f00093 li ra,15 + 1213c: 00000013 nop + 12140: 00000013 nop + 12144: 00b00113 li sp,11 + 12148: 40208f33 sub t5,ra,sp + 1214c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12150: 00200293 li t0,2 + 12154: fe5212e3 bne tp,t0,12138 + 12158: 00400e93 li t4,4 + 1215c: 2ff00193 li gp,767 + 12160: 49df12e3 bne t5,t4,12de4 + +00012164 : + 12164: 00000213 li tp,0 + 12168: 00b00113 li sp,11 + 1216c: 00d00093 li ra,13 + 12170: 40208f33 sub t5,ra,sp + 12174: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12178: 00200293 li t0,2 + 1217c: fe5216e3 bne tp,t0,12168 + 12180: 00200e93 li t4,2 + 12184: 30000193 li gp,768 + 12188: 45df1ee3 bne t5,t4,12de4 + +0001218c : + 1218c: 00000213 li tp,0 + 12190: 00b00113 li sp,11 + 12194: 00e00093 li ra,14 + 12198: 00000013 nop + 1219c: 40208f33 sub t5,ra,sp + 121a0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 121a4: 00200293 li t0,2 + 121a8: fe5214e3 bne tp,t0,12190 + 121ac: 00300e93 li t4,3 + 121b0: 30100193 li gp,769 + 121b4: 43df18e3 bne t5,t4,12de4 + +000121b8 : + 121b8: 00000213 li tp,0 + 121bc: 00b00113 li sp,11 + 121c0: 00f00093 li ra,15 + 121c4: 00000013 nop + 121c8: 00000013 nop + 121cc: 40208f33 sub t5,ra,sp + 121d0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 121d4: 00200293 li t0,2 + 121d8: fe5212e3 bne tp,t0,121bc + 121dc: 00400e93 li t4,4 + 121e0: 30200193 li gp,770 + 121e4: 41df10e3 bne t5,t4,12de4 + +000121e8 : + 121e8: 00000213 li tp,0 + 121ec: 00b00113 li sp,11 + 121f0: 00000013 nop + 121f4: 00d00093 li ra,13 + 121f8: 40208f33 sub t5,ra,sp + 121fc: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12200: 00200293 li t0,2 + 12204: fe5214e3 bne tp,t0,121ec + 12208: 00200e93 li t4,2 + 1220c: 30300193 li gp,771 + 12210: 3ddf1ae3 bne t5,t4,12de4 + +00012214 : + 12214: 00000213 li tp,0 + 12218: 00b00113 li sp,11 + 1221c: 00000013 nop + 12220: 00e00093 li ra,14 + 12224: 00000013 nop + 12228: 40208f33 sub t5,ra,sp + 1222c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12230: 00200293 li t0,2 + 12234: fe5212e3 bne tp,t0,12218 + 12238: 00300e93 li t4,3 + 1223c: 30400193 li gp,772 + 12240: 3bdf12e3 bne t5,t4,12de4 + +00012244 : + 12244: 00000213 li tp,0 + 12248: 00b00113 li sp,11 + 1224c: 00000013 nop + 12250: 00000013 nop + 12254: 00f00093 li ra,15 + 12258: 40208f33 sub t5,ra,sp + 1225c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12260: 00200293 li t0,2 + 12264: fe5212e3 bne tp,t0,12248 + 12268: 00400e93 li t4,4 + 1226c: 30500193 li gp,773 + 12270: 37df1ae3 bne t5,t4,12de4 + +00012274 : + 12274: ff100093 li ra,-15 + 12278: 40100133 neg sp,ra + 1227c: 00f00e93 li t4,15 + 12280: 30600193 li gp,774 + 12284: 37d110e3 bne sp,t4,12de4 + +00012288 : + 12288: 02000093 li ra,32 + 1228c: 40008133 sub sp,ra,zero + 12290: 02000e93 li t4,32 + 12294: 30700193 li gp,775 + 12298: 35d116e3 bne sp,t4,12de4 + +0001229c : + 1229c: 400000b3 neg ra,zero + 122a0: 00000e93 li t4,0 + 122a4: 30800193 li gp,776 + 122a8: 33d09ee3 bne ra,t4,12de4 + +000122ac : + 122ac: 01000093 li ra,16 + 122b0: 01e00113 li sp,30 + 122b4: 40208033 sub zero,ra,sp + 122b8: 00000e93 li t4,0 + 122bc: 30900193 li gp,777 + 122c0: 33d012e3 bne zero,t4,12de4 + +000122c4 : + 122c4: 00002097 auipc ra,0x2 + 122c8: b8c08093 addi ra,ra,-1140 # 13e50 + 122cc: 00aa0137 lui sp,0xaa0 + 122d0: 0aa10113 addi sp,sp,170 # aa00aa <__global_pointer$+0xa8b9a2> + 122d4: 0020a023 sw sp,0(ra) + 122d8: 0000af03 lw t5,0(ra) + 122dc: 00aa0eb7 lui t4,0xaa0 + 122e0: 0aae8e93 addi t4,t4,170 # aa00aa <__global_pointer$+0xa8b9a2> + 122e4: 30a00193 li gp,778 + 122e8: 2fdf1ee3 bne t5,t4,12de4 + +000122ec : + 122ec: 00002097 auipc ra,0x2 + 122f0: b6408093 addi ra,ra,-1180 # 13e50 + 122f4: aa00b137 lui sp,0xaa00b + 122f8: a0010113 addi sp,sp,-1536 # aa00aa00 <__global_pointer$+0xa9ff62f8> + 122fc: 0020a223 sw sp,4(ra) + 12300: 0040af03 lw t5,4(ra) + 12304: aa00beb7 lui t4,0xaa00b + 12308: a00e8e93 addi t4,t4,-1536 # aa00aa00 <__global_pointer$+0xa9ff62f8> + 1230c: 30b00193 li gp,779 + 12310: 2ddf1ae3 bne t5,t4,12de4 + +00012314 : + 12314: 00002097 auipc ra,0x2 + 12318: b3c08093 addi ra,ra,-1220 # 13e50 + 1231c: 0aa01137 lui sp,0xaa01 + 12320: aa010113 addi sp,sp,-1376 # aa00aa0 <__global_pointer$+0xa9ec398> + 12324: 0020a423 sw sp,8(ra) + 12328: 0080af03 lw t5,8(ra) + 1232c: 0aa01eb7 lui t4,0xaa01 + 12330: aa0e8e93 addi t4,t4,-1376 # aa00aa0 <__global_pointer$+0xa9ec398> + 12334: 30c00193 li gp,780 + 12338: 2bdf16e3 bne t5,t4,12de4 + +0001233c : + 1233c: 00002097 auipc ra,0x2 + 12340: b1408093 addi ra,ra,-1260 # 13e50 + 12344: a00aa137 lui sp,0xa00aa + 12348: 00a10113 addi sp,sp,10 # a00aa00a <__global_pointer$+0xa0095902> + 1234c: 0020a623 sw sp,12(ra) + 12350: 00c0af03 lw t5,12(ra) + 12354: a00aaeb7 lui t4,0xa00aa + 12358: 00ae8e93 addi t4,t4,10 # a00aa00a <__global_pointer$+0xa0095902> + 1235c: 30d00193 li gp,781 + 12360: 29df12e3 bne t5,t4,12de4 + +00012364 : + 12364: 00002097 auipc ra,0x2 + 12368: b0808093 addi ra,ra,-1272 # 13e6c + 1236c: 00aa0137 lui sp,0xaa0 + 12370: 0aa10113 addi sp,sp,170 # aa00aa <__global_pointer$+0xa8b9a2> + 12374: fe20aa23 sw sp,-12(ra) + 12378: ff40af03 lw t5,-12(ra) + 1237c: 00aa0eb7 lui t4,0xaa0 + 12380: 0aae8e93 addi t4,t4,170 # aa00aa <__global_pointer$+0xa8b9a2> + 12384: 30e00193 li gp,782 + 12388: 25df1ee3 bne t5,t4,12de4 + +0001238c : + 1238c: 00002097 auipc ra,0x2 + 12390: ae008093 addi ra,ra,-1312 # 13e6c + 12394: aa00b137 lui sp,0xaa00b + 12398: a0010113 addi sp,sp,-1536 # aa00aa00 <__global_pointer$+0xa9ff62f8> + 1239c: fe20ac23 sw sp,-8(ra) + 123a0: ff80af03 lw t5,-8(ra) + 123a4: aa00beb7 lui t4,0xaa00b + 123a8: a00e8e93 addi t4,t4,-1536 # aa00aa00 <__global_pointer$+0xa9ff62f8> + 123ac: 30f00193 li gp,783 + 123b0: 23df1ae3 bne t5,t4,12de4 + +000123b4 : + 123b4: 00002097 auipc ra,0x2 + 123b8: ab808093 addi ra,ra,-1352 # 13e6c + 123bc: 0aa01137 lui sp,0xaa01 + 123c0: aa010113 addi sp,sp,-1376 # aa00aa0 <__global_pointer$+0xa9ec398> + 123c4: fe20ae23 sw sp,-4(ra) + 123c8: ffc0af03 lw t5,-4(ra) + 123cc: 0aa01eb7 lui t4,0xaa01 + 123d0: aa0e8e93 addi t4,t4,-1376 # aa00aa0 <__global_pointer$+0xa9ec398> + 123d4: 31000193 li gp,784 + 123d8: 21df16e3 bne t5,t4,12de4 + +000123dc : + 123dc: 00002097 auipc ra,0x2 + 123e0: a9008093 addi ra,ra,-1392 # 13e6c + 123e4: a00aa137 lui sp,0xa00aa + 123e8: 00a10113 addi sp,sp,10 # a00aa00a <__global_pointer$+0xa0095902> + 123ec: 0020a023 sw sp,0(ra) + 123f0: 0000af03 lw t5,0(ra) + 123f4: a00aaeb7 lui t4,0xa00aa + 123f8: 00ae8e93 addi t4,t4,10 # a00aa00a <__global_pointer$+0xa0095902> + 123fc: 31100193 li gp,785 + 12400: 1fdf12e3 bne t5,t4,12de4 + +00012404 : + 12404: 00002097 auipc ra,0x2 + 12408: a6c08093 addi ra,ra,-1428 # 13e70 + 1240c: 12345137 lui sp,0x12345 + 12410: 67810113 addi sp,sp,1656 # 12345678 <__global_pointer$+0x12330f70> + 12414: fe008213 addi tp,ra,-32 + 12418: 02222023 sw sp,32(tp) # 20 <_start-0x10060> + 1241c: 0000a283 lw t0,0(ra) + 12420: 12345eb7 lui t4,0x12345 + 12424: 678e8e93 addi t4,t4,1656 # 12345678 <__global_pointer$+0x12330f70> + 12428: 31200193 li gp,786 + 1242c: 1bd29ce3 bne t0,t4,12de4 + +00012430 : + 12430: 00002097 auipc ra,0x2 + 12434: a4008093 addi ra,ra,-1472 # 13e70 + 12438: 58213137 lui sp,0x58213 + 1243c: 09810113 addi sp,sp,152 # 58213098 <__global_pointer$+0x581fe990> + 12440: ffd08093 addi ra,ra,-3 + 12444: 0020a3a3 sw sp,7(ra) + 12448: 00002217 auipc tp,0x2 + 1244c: a2c20213 addi tp,tp,-1492 # 13e74 + 12450: 00022283 lw t0,0(tp) # 0 <_start-0x10080> + 12454: 58213eb7 lui t4,0x58213 + 12458: 098e8e93 addi t4,t4,152 # 58213098 <__global_pointer$+0x581fe990> + 1245c: 31300193 li gp,787 + 12460: 19d292e3 bne t0,t4,12de4 + +00012464 : + 12464: 31400193 li gp,788 + 12468: 00000213 li tp,0 + 1246c: aabbd0b7 lui ra,0xaabbd + 12470: cdd08093 addi ra,ra,-803 # aabbccdd <__global_pointer$+0xaaba85d5> + 12474: 00002117 auipc sp,0x2 + 12478: 9dc10113 addi sp,sp,-1572 # 13e50 + 1247c: 00112023 sw ra,0(sp) + 12480: 00012f03 lw t5,0(sp) + 12484: aabbdeb7 lui t4,0xaabbd + 12488: cdde8e93 addi t4,t4,-803 # aabbccdd <__global_pointer$+0xaaba85d5> + 1248c: 15df1ce3 bne t5,t4,12de4 + 12490: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12494: 00200293 li t0,2 + 12498: fc521ae3 bne tp,t0,1246c + +0001249c : + 1249c: 31500193 li gp,789 + 124a0: 00000213 li tp,0 + 124a4: daabc0b7 lui ra,0xdaabc + 124a8: ccd08093 addi ra,ra,-819 # daabbccd <__global_pointer$+0xdaaa75c5> + 124ac: 00002117 auipc sp,0x2 + 124b0: 9a410113 addi sp,sp,-1628 # 13e50 + 124b4: 00000013 nop + 124b8: 00112223 sw ra,4(sp) + 124bc: 00412f03 lw t5,4(sp) + 124c0: daabceb7 lui t4,0xdaabc + 124c4: ccde8e93 addi t4,t4,-819 # daabbccd <__global_pointer$+0xdaaa75c5> + 124c8: 11df1ee3 bne t5,t4,12de4 + 124cc: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 124d0: 00200293 li t0,2 + 124d4: fc5218e3 bne tp,t0,124a4 + +000124d8 : + 124d8: 31600193 li gp,790 + 124dc: 00000213 li tp,0 + 124e0: ddaac0b7 lui ra,0xddaac + 124e4: bcc08093 addi ra,ra,-1076 # ddaabbcc <__global_pointer$+0xdda974c4> + 124e8: 00002117 auipc sp,0x2 + 124ec: 96810113 addi sp,sp,-1688 # 13e50 + 124f0: 00000013 nop + 124f4: 00000013 nop + 124f8: 00112423 sw ra,8(sp) + 124fc: 00812f03 lw t5,8(sp) + 12500: ddaaceb7 lui t4,0xddaac + 12504: bcce8e93 addi t4,t4,-1076 # ddaabbcc <__global_pointer$+0xdda974c4> + 12508: 0ddf1ee3 bne t5,t4,12de4 + 1250c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12510: 00200293 li t0,2 + 12514: fc5216e3 bne tp,t0,124e0 + +00012518 : + 12518: 31700193 li gp,791 + 1251c: 00000213 li tp,0 + 12520: cddab0b7 lui ra,0xcddab + 12524: bbc08093 addi ra,ra,-1092 # cddaabbc <__global_pointer$+0xcdd964b4> + 12528: 00000013 nop + 1252c: 00002117 auipc sp,0x2 + 12530: 92410113 addi sp,sp,-1756 # 13e50 + 12534: 00112623 sw ra,12(sp) + 12538: 00c12f03 lw t5,12(sp) + 1253c: cddabeb7 lui t4,0xcddab + 12540: bbce8e93 addi t4,t4,-1092 # cddaabbc <__global_pointer$+0xcdd964b4> + 12544: 0bdf10e3 bne t5,t4,12de4 + 12548: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1254c: 00200293 li t0,2 + 12550: fc5218e3 bne tp,t0,12520 + +00012554 : + 12554: 31800193 li gp,792 + 12558: 00000213 li tp,0 + 1255c: ccddb0b7 lui ra,0xccddb + 12560: abb08093 addi ra,ra,-1349 # ccddaabb <__global_pointer$+0xccdc63b3> + 12564: 00000013 nop + 12568: 00002117 auipc sp,0x2 + 1256c: 8e810113 addi sp,sp,-1816 # 13e50 + 12570: 00000013 nop + 12574: 00112823 sw ra,16(sp) + 12578: 01012f03 lw t5,16(sp) + 1257c: ccddbeb7 lui t4,0xccddb + 12580: abbe8e93 addi t4,t4,-1349 # ccddaabb <__global_pointer$+0xccdc63b3> + 12584: 07df10e3 bne t5,t4,12de4 + 12588: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1258c: 00200293 li t0,2 + 12590: fc5216e3 bne tp,t0,1255c + +00012594 : + 12594: 31900193 li gp,793 + 12598: 00000213 li tp,0 + 1259c: bccde0b7 lui ra,0xbccde + 125a0: aab08093 addi ra,ra,-1365 # bccddaab <__global_pointer$+0xbccc93a3> + 125a4: 00000013 nop + 125a8: 00000013 nop + 125ac: 00002117 auipc sp,0x2 + 125b0: 8a410113 addi sp,sp,-1884 # 13e50 + 125b4: 00112a23 sw ra,20(sp) + 125b8: 01412f03 lw t5,20(sp) + 125bc: bccdeeb7 lui t4,0xbccde + 125c0: aabe8e93 addi t4,t4,-1365 # bccddaab <__global_pointer$+0xbccc93a3> + 125c4: 03df10e3 bne t5,t4,12de4 + 125c8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 125cc: 00200293 li t0,2 + 125d0: fc5216e3 bne tp,t0,1259c + +000125d4 : + 125d4: 31a00193 li gp,794 + 125d8: 00000213 li tp,0 + 125dc: 00002117 auipc sp,0x2 + 125e0: 87410113 addi sp,sp,-1932 # 13e50 + 125e4: 001120b7 lui ra,0x112 + 125e8: 23308093 addi ra,ra,563 # 112233 <__global_pointer$+0xfdb2b> + 125ec: 00112023 sw ra,0(sp) + 125f0: 00012f03 lw t5,0(sp) + 125f4: 00112eb7 lui t4,0x112 + 125f8: 233e8e93 addi t4,t4,563 # 112233 <__global_pointer$+0xfdb2b> + 125fc: 7fdf1463 bne t5,t4,12de4 + 12600: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12604: 00200293 li t0,2 + 12608: fc521ae3 bne tp,t0,125dc + +0001260c : + 1260c: 31b00193 li gp,795 + 12610: 00000213 li tp,0 + 12614: 00002117 auipc sp,0x2 + 12618: 83c10113 addi sp,sp,-1988 # 13e50 + 1261c: 300110b7 lui ra,0x30011 + 12620: 22308093 addi ra,ra,547 # 30011223 <__global_pointer$+0x2fffcb1b> + 12624: 00000013 nop + 12628: 00112223 sw ra,4(sp) + 1262c: 00412f03 lw t5,4(sp) + 12630: 30011eb7 lui t4,0x30011 + 12634: 223e8e93 addi t4,t4,547 # 30011223 <__global_pointer$+0x2fffcb1b> + 12638: 7bdf1663 bne t5,t4,12de4 + 1263c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12640: 00200293 li t0,2 + 12644: fc5218e3 bne tp,t0,12614 + +00012648 : + 12648: 31c00193 li gp,796 + 1264c: 00000213 li tp,0 + 12650: 00002117 auipc sp,0x2 + 12654: 80010113 addi sp,sp,-2048 # 13e50 + 12658: 330010b7 lui ra,0x33001 + 1265c: 12208093 addi ra,ra,290 # 33001122 <__global_pointer$+0x32feca1a> + 12660: 00000013 nop + 12664: 00000013 nop + 12668: 00112423 sw ra,8(sp) + 1266c: 00812f03 lw t5,8(sp) + 12670: 33001eb7 lui t4,0x33001 + 12674: 122e8e93 addi t4,t4,290 # 33001122 <__global_pointer$+0x32feca1a> + 12678: 77df1663 bne t5,t4,12de4 + 1267c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12680: 00200293 li t0,2 + 12684: fc5216e3 bne tp,t0,12650 + +00012688 : + 12688: 31d00193 li gp,797 + 1268c: 00000213 li tp,0 + 12690: 00001117 auipc sp,0x1 + 12694: 7c010113 addi sp,sp,1984 # 13e50 + 12698: 00000013 nop + 1269c: 233000b7 lui ra,0x23300 + 126a0: 11208093 addi ra,ra,274 # 23300112 <__global_pointer$+0x232eba0a> + 126a4: 00112623 sw ra,12(sp) + 126a8: 00c12f03 lw t5,12(sp) + 126ac: 23300eb7 lui t4,0x23300 + 126b0: 112e8e93 addi t4,t4,274 # 23300112 <__global_pointer$+0x232eba0a> + 126b4: 73df1863 bne t5,t4,12de4 + 126b8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 126bc: 00200293 li t0,2 + 126c0: fc5218e3 bne tp,t0,12690 + +000126c4 : + 126c4: 31e00193 li gp,798 + 126c8: 00000213 li tp,0 + 126cc: 00001117 auipc sp,0x1 + 126d0: 78410113 addi sp,sp,1924 # 13e50 + 126d4: 00000013 nop + 126d8: 223300b7 lui ra,0x22330 + 126dc: 01108093 addi ra,ra,17 # 22330011 <__global_pointer$+0x2231b909> + 126e0: 00000013 nop + 126e4: 00112823 sw ra,16(sp) + 126e8: 01012f03 lw t5,16(sp) + 126ec: 22330eb7 lui t4,0x22330 + 126f0: 011e8e93 addi t4,t4,17 # 22330011 <__global_pointer$+0x2231b909> + 126f4: 6fdf1863 bne t5,t4,12de4 + 126f8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 126fc: 00200293 li t0,2 + 12700: fc5216e3 bne tp,t0,126cc + +00012704 : + 12704: 31f00193 li gp,799 + 12708: 00000213 li tp,0 + 1270c: 00001117 auipc sp,0x1 + 12710: 74410113 addi sp,sp,1860 # 13e50 + 12714: 00000013 nop + 12718: 00000013 nop + 1271c: 122330b7 lui ra,0x12233 + 12720: 00108093 addi ra,ra,1 # 12233001 <__global_pointer$+0x1221e8f9> + 12724: 00112a23 sw ra,20(sp) + 12728: 01412f03 lw t5,20(sp) + 1272c: 12233eb7 lui t4,0x12233 + 12730: 001e8e93 addi t4,t4,1 # 12233001 <__global_pointer$+0x1221e8f9> + 12734: 6bdf1863 bne t5,t4,12de4 + 12738: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1273c: 00200293 li t0,2 + 12740: fc5216e3 bne tp,t0,1270c + +00012744 : + 12744: ff0100b7 lui ra,0xff010 + 12748: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 1274c: 0f0f1137 lui sp,0xf0f1 + 12750: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 12754: 0020cf33 xor t5,ra,sp + 12758: f00ffeb7 lui t4,0xf00ff + 1275c: 00fe8e93 addi t4,t4,15 # f00ff00f <__global_pointer$+0xf00ea907> + 12760: 32000193 li gp,800 + 12764: 69df1063 bne t5,t4,12de4 + +00012768 : + 12768: 0ff010b7 lui ra,0xff01 + 1276c: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 12770: f0f0f137 lui sp,0xf0f0f + 12774: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efa9e8> + 12778: 0020cf33 xor t5,ra,sp + 1277c: ff010eb7 lui t4,0xff010 + 12780: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 12784: 32100193 li gp,801 + 12788: 65df1e63 bne t5,t4,12de4 + +0001278c : + 1278c: 00ff00b7 lui ra,0xff0 + 12790: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdb9f7> + 12794: 0f0f1137 lui sp,0xf0f1 + 12798: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 1279c: 0020cf33 xor t5,ra,sp + 127a0: 0ff01eb7 lui t4,0xff01 + 127a4: ff0e8e93 addi t4,t4,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 127a8: 32200193 li gp,802 + 127ac: 63df1c63 bne t5,t4,12de4 + +000127b0 : + 127b0: f00ff0b7 lui ra,0xf00ff + 127b4: 00f08093 addi ra,ra,15 # f00ff00f <__global_pointer$+0xf00ea907> + 127b8: f0f0f137 lui sp,0xf0f0f + 127bc: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efa9e8> + 127c0: 0020cf33 xor t5,ra,sp + 127c4: 00ff0eb7 lui t4,0xff0 + 127c8: 0ffe8e93 addi t4,t4,255 # ff00ff <__global_pointer$+0xfdb9f7> + 127cc: 32300193 li gp,803 + 127d0: 61df1a63 bne t5,t4,12de4 + +000127d4 : + 127d4: ff0100b7 lui ra,0xff010 + 127d8: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 127dc: 0f0f1137 lui sp,0xf0f1 + 127e0: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 127e4: 0020c0b3 xor ra,ra,sp + 127e8: f00ffeb7 lui t4,0xf00ff + 127ec: 00fe8e93 addi t4,t4,15 # f00ff00f <__global_pointer$+0xf00ea907> + 127f0: 32400193 li gp,804 + 127f4: 5fd09863 bne ra,t4,12de4 + +000127f8 : + 127f8: ff0100b7 lui ra,0xff010 + 127fc: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 12800: 0f0f1137 lui sp,0xf0f1 + 12804: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 12808: 0020c133 xor sp,ra,sp + 1280c: f00ffeb7 lui t4,0xf00ff + 12810: 00fe8e93 addi t4,t4,15 # f00ff00f <__global_pointer$+0xf00ea907> + 12814: 32500193 li gp,805 + 12818: 5dd11663 bne sp,t4,12de4 + +0001281c : + 1281c: ff0100b7 lui ra,0xff010 + 12820: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 12824: 0010c0b3 xor ra,ra,ra + 12828: 00000e93 li t4,0 + 1282c: 32600193 li gp,806 + 12830: 5bd09a63 bne ra,t4,12de4 + +00012834 : + 12834: 00000213 li tp,0 + 12838: ff0100b7 lui ra,0xff010 + 1283c: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 12840: 0f0f1137 lui sp,0xf0f1 + 12844: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 12848: 0020cf33 xor t5,ra,sp + 1284c: 000f0313 mv t1,t5 + 12850: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12854: 00200293 li t0,2 + 12858: fe5210e3 bne tp,t0,12838 + 1285c: f00ffeb7 lui t4,0xf00ff + 12860: 00fe8e93 addi t4,t4,15 # f00ff00f <__global_pointer$+0xf00ea907> + 12864: 32700193 li gp,807 + 12868: 57d31e63 bne t1,t4,12de4 + +0001286c : + 1286c: 00000213 li tp,0 + 12870: 0ff010b7 lui ra,0xff01 + 12874: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 12878: f0f0f137 lui sp,0xf0f0f + 1287c: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efa9e8> + 12880: 0020cf33 xor t5,ra,sp + 12884: 00000013 nop + 12888: 000f0313 mv t1,t5 + 1288c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12890: 00200293 li t0,2 + 12894: fc521ee3 bne tp,t0,12870 + 12898: ff010eb7 lui t4,0xff010 + 1289c: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 128a0: 32800193 li gp,808 + 128a4: 55d31063 bne t1,t4,12de4 + +000128a8 : + 128a8: 00000213 li tp,0 + 128ac: 00ff00b7 lui ra,0xff0 + 128b0: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdb9f7> + 128b4: 0f0f1137 lui sp,0xf0f1 + 128b8: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 128bc: 0020cf33 xor t5,ra,sp + 128c0: 00000013 nop + 128c4: 00000013 nop + 128c8: 000f0313 mv t1,t5 + 128cc: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 128d0: 00200293 li t0,2 + 128d4: fc521ce3 bne tp,t0,128ac + 128d8: 0ff01eb7 lui t4,0xff01 + 128dc: ff0e8e93 addi t4,t4,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 128e0: 32900193 li gp,809 + 128e4: 51d31063 bne t1,t4,12de4 + +000128e8 : + 128e8: 00000213 li tp,0 + 128ec: ff0100b7 lui ra,0xff010 + 128f0: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 128f4: 0f0f1137 lui sp,0xf0f1 + 128f8: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 128fc: 0020cf33 xor t5,ra,sp + 12900: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12904: 00200293 li t0,2 + 12908: fe5212e3 bne tp,t0,128ec + 1290c: f00ffeb7 lui t4,0xf00ff + 12910: 00fe8e93 addi t4,t4,15 # f00ff00f <__global_pointer$+0xf00ea907> + 12914: 32a00193 li gp,810 + 12918: 4ddf1663 bne t5,t4,12de4 + +0001291c : + 1291c: 00000213 li tp,0 + 12920: 0ff010b7 lui ra,0xff01 + 12924: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 12928: f0f0f137 lui sp,0xf0f0f + 1292c: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efa9e8> + 12930: 00000013 nop + 12934: 0020cf33 xor t5,ra,sp + 12938: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 1293c: 00200293 li t0,2 + 12940: fe5210e3 bne tp,t0,12920 + 12944: ff010eb7 lui t4,0xff010 + 12948: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 1294c: 32b00193 li gp,811 + 12950: 49df1a63 bne t5,t4,12de4 + +00012954 : + 12954: 00000213 li tp,0 + 12958: 00ff00b7 lui ra,0xff0 + 1295c: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdb9f7> + 12960: 0f0f1137 lui sp,0xf0f1 + 12964: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 12968: 00000013 nop + 1296c: 00000013 nop + 12970: 0020cf33 xor t5,ra,sp + 12974: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12978: 00200293 li t0,2 + 1297c: fc521ee3 bne tp,t0,12958 + 12980: 0ff01eb7 lui t4,0xff01 + 12984: ff0e8e93 addi t4,t4,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 12988: 32c00193 li gp,812 + 1298c: 45df1c63 bne t5,t4,12de4 + +00012990 : + 12990: 00000213 li tp,0 + 12994: ff0100b7 lui ra,0xff010 + 12998: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 1299c: 00000013 nop + 129a0: 0f0f1137 lui sp,0xf0f1 + 129a4: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 129a8: 0020cf33 xor t5,ra,sp + 129ac: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 129b0: 00200293 li t0,2 + 129b4: fe5210e3 bne tp,t0,12994 + 129b8: f00ffeb7 lui t4,0xf00ff + 129bc: 00fe8e93 addi t4,t4,15 # f00ff00f <__global_pointer$+0xf00ea907> + 129c0: 32d00193 li gp,813 + 129c4: 43df1063 bne t5,t4,12de4 + +000129c8 : + 129c8: 00000213 li tp,0 + 129cc: 0ff010b7 lui ra,0xff01 + 129d0: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 129d4: 00000013 nop + 129d8: f0f0f137 lui sp,0xf0f0f + 129dc: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efa9e8> + 129e0: 00000013 nop + 129e4: 0020cf33 xor t5,ra,sp + 129e8: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 129ec: 00200293 li t0,2 + 129f0: fc521ee3 bne tp,t0,129cc + 129f4: ff010eb7 lui t4,0xff010 + 129f8: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 129fc: 32e00193 li gp,814 + 12a00: 3fdf1263 bne t5,t4,12de4 + +00012a04 : + 12a04: 00000213 li tp,0 + 12a08: 00ff00b7 lui ra,0xff0 + 12a0c: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdb9f7> + 12a10: 00000013 nop + 12a14: 00000013 nop + 12a18: 0f0f1137 lui sp,0xf0f1 + 12a1c: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 12a20: 0020cf33 xor t5,ra,sp + 12a24: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12a28: 00200293 li t0,2 + 12a2c: fc521ee3 bne tp,t0,12a08 + 12a30: 0ff01eb7 lui t4,0xff01 + 12a34: ff0e8e93 addi t4,t4,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 12a38: 32f00193 li gp,815 + 12a3c: 3bdf1463 bne t5,t4,12de4 + +00012a40 : + 12a40: 00000213 li tp,0 + 12a44: 0f0f1137 lui sp,0xf0f1 + 12a48: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 12a4c: ff0100b7 lui ra,0xff010 + 12a50: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 12a54: 0020cf33 xor t5,ra,sp + 12a58: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12a5c: 00200293 li t0,2 + 12a60: fe5212e3 bne tp,t0,12a44 + 12a64: f00ffeb7 lui t4,0xf00ff + 12a68: 00fe8e93 addi t4,t4,15 # f00ff00f <__global_pointer$+0xf00ea907> + 12a6c: 33000193 li gp,816 + 12a70: 37df1a63 bne t5,t4,12de4 + +00012a74 : + 12a74: 00000213 li tp,0 + 12a78: f0f0f137 lui sp,0xf0f0f + 12a7c: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efa9e8> + 12a80: 0ff010b7 lui ra,0xff01 + 12a84: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 12a88: 00000013 nop + 12a8c: 0020cf33 xor t5,ra,sp + 12a90: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12a94: 00200293 li t0,2 + 12a98: fe5210e3 bne tp,t0,12a78 + 12a9c: ff010eb7 lui t4,0xff010 + 12aa0: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 12aa4: 33100193 li gp,817 + 12aa8: 33df1e63 bne t5,t4,12de4 + +00012aac : + 12aac: 00000213 li tp,0 + 12ab0: 0f0f1137 lui sp,0xf0f1 + 12ab4: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 12ab8: 00ff00b7 lui ra,0xff0 + 12abc: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdb9f7> + 12ac0: 00000013 nop + 12ac4: 00000013 nop + 12ac8: 0020cf33 xor t5,ra,sp + 12acc: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12ad0: 00200293 li t0,2 + 12ad4: fc521ee3 bne tp,t0,12ab0 + 12ad8: 0ff01eb7 lui t4,0xff01 + 12adc: ff0e8e93 addi t4,t4,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 12ae0: 33200193 li gp,818 + 12ae4: 31df1063 bne t5,t4,12de4 + +00012ae8 : + 12ae8: 00000213 li tp,0 + 12aec: 0f0f1137 lui sp,0xf0f1 + 12af0: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 12af4: 00000013 nop + 12af8: ff0100b7 lui ra,0xff010 + 12afc: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 12b00: 0020cf33 xor t5,ra,sp + 12b04: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12b08: 00200293 li t0,2 + 12b0c: fe5210e3 bne tp,t0,12aec + 12b10: f00ffeb7 lui t4,0xf00ff + 12b14: 00fe8e93 addi t4,t4,15 # f00ff00f <__global_pointer$+0xf00ea907> + 12b18: 33300193 li gp,819 + 12b1c: 2ddf1463 bne t5,t4,12de4 + +00012b20 : + 12b20: 00000213 li tp,0 + 12b24: f0f0f137 lui sp,0xf0f0f + 12b28: 0f010113 addi sp,sp,240 # f0f0f0f0 <__global_pointer$+0xf0efa9e8> + 12b2c: 00000013 nop + 12b30: 0ff010b7 lui ra,0xff01 + 12b34: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 12b38: 00000013 nop + 12b3c: 0020cf33 xor t5,ra,sp + 12b40: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12b44: 00200293 li t0,2 + 12b48: fc521ee3 bne tp,t0,12b24 + 12b4c: ff010eb7 lui t4,0xff010 + 12b50: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 12b54: 33400193 li gp,820 + 12b58: 29df1663 bne t5,t4,12de4 + +00012b5c : + 12b5c: 00000213 li tp,0 + 12b60: 0f0f1137 lui sp,0xf0f1 + 12b64: f0f10113 addi sp,sp,-241 # f0f0f0f <__global_pointer$+0xf0dc807> + 12b68: 00000013 nop + 12b6c: 00000013 nop + 12b70: 00ff00b7 lui ra,0xff0 + 12b74: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdb9f7> + 12b78: 0020cf33 xor t5,ra,sp + 12b7c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12b80: 00200293 li t0,2 + 12b84: fc521ee3 bne tp,t0,12b60 + 12b88: 0ff01eb7 lui t4,0xff01 + 12b8c: ff0e8e93 addi t4,t4,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 12b90: 33500193 li gp,821 + 12b94: 25df1863 bne t5,t4,12de4 + +00012b98 : + 12b98: ff0100b7 lui ra,0xff010 + 12b9c: f0008093 addi ra,ra,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 12ba0: 00104133 xor sp,zero,ra + 12ba4: ff010eb7 lui t4,0xff010 + 12ba8: f00e8e93 addi t4,t4,-256 # ff00ff00 <__global_pointer$+0xfeffb7f8> + 12bac: 33600193 li gp,822 + 12bb0: 23d11a63 bne sp,t4,12de4 + +00012bb4 : + 12bb4: 00ff00b7 lui ra,0xff0 + 12bb8: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdb9f7> + 12bbc: 0000c133 xor sp,ra,zero + 12bc0: 00ff0eb7 lui t4,0xff0 + 12bc4: 0ffe8e93 addi t4,t4,255 # ff00ff <__global_pointer$+0xfdb9f7> + 12bc8: 33700193 li gp,823 + 12bcc: 21d11c63 bne sp,t4,12de4 + +00012bd0 : + 12bd0: 000040b3 xor ra,zero,zero + 12bd4: 00000e93 li t4,0 + 12bd8: 33800193 li gp,824 + 12bdc: 21d09463 bne ra,t4,12de4 + +00012be0 : + 12be0: 111110b7 lui ra,0x11111 + 12be4: 11108093 addi ra,ra,273 # 11111111 <__global_pointer$+0x110fca09> + 12be8: 22222137 lui sp,0x22222 + 12bec: 22210113 addi sp,sp,546 # 22222222 <__global_pointer$+0x2220db1a> + 12bf0: 0020c033 xor zero,ra,sp + 12bf4: 00000e93 li t4,0 + 12bf8: 33900193 li gp,825 + 12bfc: 1fd01463 bne zero,t4,12de4 + +00012c00 : + 12c00: 00ff10b7 lui ra,0xff1 + 12c04: f0008093 addi ra,ra,-256 # ff0f00 <__global_pointer$+0xfdc7f8> + 12c08: f0f0cf13 xori t5,ra,-241 + 12c0c: ff00feb7 lui t4,0xff00f + 12c10: 00fe8e93 addi t4,t4,15 # ff00f00f <__global_pointer$+0xfeffa907> + 12c14: 33a00193 li gp,826 + 12c18: 1ddf1663 bne t5,t4,12de4 + +00012c1c : + 12c1c: 0ff010b7 lui ra,0xff01 + 12c20: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 12c24: 0f00cf13 xori t5,ra,240 + 12c28: 0ff01eb7 lui t4,0xff01 + 12c2c: f00e8e93 addi t4,t4,-256 # ff00f00 <__global_pointer$+0xfeec7f8> + 12c30: 33b00193 li gp,827 + 12c34: 1bdf1863 bne t5,t4,12de4 + +00012c38 : + 12c38: 00ff10b7 lui ra,0xff1 + 12c3c: 8ff08093 addi ra,ra,-1793 # ff08ff <__global_pointer$+0xfdc1f7> + 12c40: 70f0cf13 xori t5,ra,1807 + 12c44: 00ff1eb7 lui t4,0xff1 + 12c48: ff0e8e93 addi t4,t4,-16 # ff0ff0 <__global_pointer$+0xfdc8e8> + 12c4c: 33c00193 li gp,828 + 12c50: 19df1a63 bne t5,t4,12de4 + +00012c54 : + 12c54: f00ff0b7 lui ra,0xf00ff + 12c58: 00f08093 addi ra,ra,15 # f00ff00f <__global_pointer$+0xf00ea907> + 12c5c: 0f00cf13 xori t5,ra,240 + 12c60: f00ffeb7 lui t4,0xf00ff + 12c64: 0ffe8e93 addi t4,t4,255 # f00ff0ff <__global_pointer$+0xf00ea9f7> + 12c68: 33d00193 li gp,829 + 12c6c: 17df1c63 bne t5,t4,12de4 + +00012c70 : + 12c70: ff00f0b7 lui ra,0xff00f + 12c74: 70008093 addi ra,ra,1792 # ff00f700 <__global_pointer$+0xfeffaff8> + 12c78: 70f0c093 xori ra,ra,1807 + 12c7c: ff00feb7 lui t4,0xff00f + 12c80: 00fe8e93 addi t4,t4,15 # ff00f00f <__global_pointer$+0xfeffa907> + 12c84: 33e00193 li gp,830 + 12c88: 15d09e63 bne ra,t4,12de4 + +00012c8c : + 12c8c: 00000213 li tp,0 + 12c90: 0ff010b7 lui ra,0xff01 + 12c94: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 12c98: 0f00cf13 xori t5,ra,240 + 12c9c: 000f0313 mv t1,t5 + 12ca0: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12ca4: 00200293 li t0,2 + 12ca8: fe5214e3 bne tp,t0,12c90 + 12cac: 0ff01eb7 lui t4,0xff01 + 12cb0: f00e8e93 addi t4,t4,-256 # ff00f00 <__global_pointer$+0xfeec7f8> + 12cb4: 33f00193 li gp,831 + 12cb8: 13d31663 bne t1,t4,12de4 + +00012cbc : + 12cbc: 00000213 li tp,0 + 12cc0: 00ff10b7 lui ra,0xff1 + 12cc4: 8ff08093 addi ra,ra,-1793 # ff08ff <__global_pointer$+0xfdc1f7> + 12cc8: 70f0cf13 xori t5,ra,1807 + 12ccc: 00000013 nop + 12cd0: 000f0313 mv t1,t5 + 12cd4: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12cd8: 00200293 li t0,2 + 12cdc: fe5212e3 bne tp,t0,12cc0 + 12ce0: 00ff1eb7 lui t4,0xff1 + 12ce4: ff0e8e93 addi t4,t4,-16 # ff0ff0 <__global_pointer$+0xfdc8e8> + 12ce8: 34000193 li gp,832 + 12cec: 0fd31c63 bne t1,t4,12de4 + +00012cf0 : + 12cf0: 00000213 li tp,0 + 12cf4: f00ff0b7 lui ra,0xf00ff + 12cf8: 00f08093 addi ra,ra,15 # f00ff00f <__global_pointer$+0xf00ea907> + 12cfc: 0f00cf13 xori t5,ra,240 + 12d00: 00000013 nop + 12d04: 00000013 nop + 12d08: 000f0313 mv t1,t5 + 12d0c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12d10: 00200293 li t0,2 + 12d14: fe5210e3 bne tp,t0,12cf4 + 12d18: f00ffeb7 lui t4,0xf00ff + 12d1c: 0ffe8e93 addi t4,t4,255 # f00ff0ff <__global_pointer$+0xf00ea9f7> + 12d20: 34100193 li gp,833 + 12d24: 0dd31063 bne t1,t4,12de4 + +00012d28 : + 12d28: 00000213 li tp,0 + 12d2c: 0ff010b7 lui ra,0xff01 + 12d30: ff008093 addi ra,ra,-16 # ff00ff0 <__global_pointer$+0xfeec8e8> + 12d34: 0f00cf13 xori t5,ra,240 + 12d38: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12d3c: 00200293 li t0,2 + 12d40: fe5216e3 bne tp,t0,12d2c + 12d44: 0ff01eb7 lui t4,0xff01 + 12d48: f00e8e93 addi t4,t4,-256 # ff00f00 <__global_pointer$+0xfeec7f8> + 12d4c: 34200193 li gp,834 + 12d50: 09df1a63 bne t5,t4,12de4 + +00012d54 : + 12d54: 00000213 li tp,0 + 12d58: 00ff10b7 lui ra,0xff1 + 12d5c: fff08093 addi ra,ra,-1 # ff0fff <__global_pointer$+0xfdc8f7> + 12d60: 00000013 nop + 12d64: 00f0cf13 xori t5,ra,15 + 12d68: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12d6c: 00200293 li t0,2 + 12d70: fe5214e3 bne tp,t0,12d58 + 12d74: 00ff1eb7 lui t4,0xff1 + 12d78: ff0e8e93 addi t4,t4,-16 # ff0ff0 <__global_pointer$+0xfdc8e8> + 12d7c: 34300193 li gp,835 + 12d80: 07df1263 bne t5,t4,12de4 + +00012d84 : + 12d84: 00000213 li tp,0 + 12d88: f00ff0b7 lui ra,0xf00ff + 12d8c: 00f08093 addi ra,ra,15 # f00ff00f <__global_pointer$+0xf00ea907> + 12d90: 00000013 nop + 12d94: 00000013 nop + 12d98: 0f00cf13 xori t5,ra,240 + 12d9c: 00120213 addi tp,tp,1 # 1 <_start-0x1007f> + 12da0: 00200293 li t0,2 + 12da4: fe5212e3 bne tp,t0,12d88 + 12da8: f00ffeb7 lui t4,0xf00ff + 12dac: 0ffe8e93 addi t4,t4,255 # f00ff0ff <__global_pointer$+0xf00ea9f7> + 12db0: 34400193 li gp,836 + 12db4: 03df1863 bne t5,t4,12de4 + +00012db8 : + 12db8: 0f004093 xori ra,zero,240 + 12dbc: 0f000e93 li t4,240 + 12dc0: 34500193 li gp,837 + 12dc4: 03d09063 bne ra,t4,12de4 + +00012dc8 : + 12dc8: 00ff00b7 lui ra,0xff0 + 12dcc: 0ff08093 addi ra,ra,255 # ff00ff <__global_pointer$+0xfdb9f7> + 12dd0: 70f0c013 xori zero,ra,1807 + 12dd4: 00000e93 li t4,0 + 12dd8: 34600193 li gp,838 + 12ddc: 01d01463 bne zero,t4,12de4 + 12de0: 00301463 bne zero,gp,12de8 + +00012de4 : + 12de4: 00000a6f jal s4,12de4 + +00012de8 : + 12de8: 00100193 li gp,1 + +00012dec : + 12dec: 00000a6f jal s4,12dec diff --git a/src/Rv32iCPU/benchmark/testC_instruction.txt b/src/Rv32iCPU/benchmark/testC_instruction.txt new file mode 100644 index 0000000..5671be6 --- /dev/null +++ b/src/Rv32iCPU/benchmark/testC_instruction.txt @@ -0,0 +1,2908 @@ +00000093 +0000af13 +00000e93 +20c00193 +01df0463 +54d0206f +00100093 +0010af13 +00000e93 +20d00193 +01df0463 +5350206f +00300093 +0070af13 +00100e93 +20e00193 +01df0463 +51d0206f +00700093 +0030af13 +00000e93 +20f00193 +01df0463 +5050206f +00000093 +8000af13 +00000e93 +21000193 +01df0463 +4ed0206f +800000b7 +0000af13 +00100e93 +21100193 +01df0463 +4d50206f +800000b7 +8000af13 +00100e93 +21200193 +01df0463 +4bd0206f +00000093 +7ff0af13 +00100e93 +21300193 +01df0463 +4a50206f +800000b7 +fff08093 +0000af13 +00000e93 +21400193 +01df0463 +4890206f +800000b7 +fff08093 +7ff0af13 +00000e93 +21500193 +01df0463 +46d0206f +800000b7 +7ff0af13 +00100e93 +21600193 +01df0463 +4550206f +800000b7 +fff08093 +8000af13 +00000e93 +21700193 +01df0463 +4390206f +00000093 +fff0af13 +00000e93 +21800193 +01df0463 +4210206f +fff00093 +0010af13 +00100e93 +21900193 +01df0463 +4090206f +fff00093 +fff0af13 +00000e93 +21a00193 +01df0463 +3f10206f +00b00093 +00d0a093 +00100e93 +21b00193 +01d08463 +3d90206f +00000213 +00f00093 +00a0af13 +000f0313 +00120213 +00200293 +fe5216e3 +00000e93 +21c00193 +01d30463 +3ad0206f +00000213 +00a00093 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a/src/SPIFlash/SPIFlashController.bsv b/src/SPIFlash/SPIFlashController.bsv index 45136db..485a64c 100644 --- a/src/SPIFlash/SPIFlashController.bsv +++ b/src/SPIFlash/SPIFlashController.bsv @@ -113,47 +113,4 @@ module mkSPIFlashController (SPIFlashController); endmodule - -module mkTb (); - let spiflash_ctrl <- mkSPIFlashController; - - function Action read_and_show; - return action - let read_byte <- spiflash_ctrl.read_byte; - $display("read_byte = %x", read_byte); - endaction; - endfunction - - mkAutoFSM( seq - spiflash_ctrl.operate( True, 'h000, 'h12); // write 1byte to buffer - spiflash_ctrl.operate( True, 'h001, 'h34); // write 1byte to buffer - - spiflash_ctrl.operate( True, 'h100, 'hab); // set page_addr_l = 0xAB - spiflash_ctrl.operate( True, 'h101, 'h01); // set page_addr_h = 0x01 - spiflash_ctrl.operate( True, 'h108, 'h20); // start erase page - - spiflash_ctrl.operate( True, 'h108, 'h02); // start write page - - spiflash_ctrl.operate(False, 'h000, 'h00); // read 1byte from buffer - spiflash_ctrl.operate(False, 'h001, 'h00); // read 1byte from buffer - repeat(2) read_and_show; - - spiflash_ctrl.operate( True, 'h108, 'h03); // start read page - - spiflash_ctrl.operate(False, 'h000, 'h00); // read 1byte from buffer - spiflash_ctrl.operate(False, 'h001, 'h00); // read 1byte from buffer - repeat(2) read_and_show; - endseq ); - - rule spi_set_miso; - spiflash_ctrl.miso_i(0); - endrule - - //rule spi_show; - // $display("ss:%d sck:%d mosi:%d", spiflash_ctrl.ss_o, spiflash_ctrl.sck_o, spiflash_ctrl.mosi_o); - //endrule - -endmodule - - endpackage diff --git a/src/SPIFlash/TbSPIFlashController.bsv b/src/SPIFlash/TbSPIFlashController.bsv new file mode 100644 index 0000000..8e0b7e7 --- /dev/null +++ b/src/SPIFlash/TbSPIFlashController.bsv @@ -0,0 +1,52 @@ +// Copyright(c) 2022 https://github.com/WangXuan95 + +package TbSPIFlashController; + +import StmtFSM::*; + +import SPIFlashController::*; + + +module mkTb (); + let spiflash_ctrl <- mkSPIFlashController; + + function Action read_and_show; + return action + let read_byte <- spiflash_ctrl.read_byte; + $display("read_byte = %x", read_byte); + endaction; + endfunction + + mkAutoFSM( seq + spiflash_ctrl.operate( True, 'h000, 'h12); // write 1byte to buffer + spiflash_ctrl.operate( True, 'h001, 'h34); // write 1byte to buffer + + spiflash_ctrl.operate( True, 'h100, 'hab); // set page_addr_l = 0xAB + spiflash_ctrl.operate( True, 'h101, 'h01); // set page_addr_h = 0x01 + spiflash_ctrl.operate( True, 'h108, 'h20); // start erase page + + spiflash_ctrl.operate( True, 'h108, 'h02); // start write page + + spiflash_ctrl.operate(False, 'h000, 'h00); // read 1byte from buffer + spiflash_ctrl.operate(False, 'h001, 'h00); // read 1byte from buffer + repeat(2) read_and_show; + + spiflash_ctrl.operate( True, 'h108, 'h03); // start read page + + spiflash_ctrl.operate(False, 'h000, 'h00); // read 1byte from buffer + spiflash_ctrl.operate(False, 'h001, 'h00); // read 1byte from buffer + repeat(2) read_and_show; + endseq ); + + rule spi_set_miso; + spiflash_ctrl.miso_i(0); + endrule + + //rule spi_show; + // $display("ss:%d sck:%d mosi:%d", spiflash_ctrl.ss_o, spiflash_ctrl.sck_o, spiflash_ctrl.mosi_o); + //endrule + +endmodule + + +endpackage