{"payload":{"header_redesign_enabled":false,"results":[{"id":"263524123","archived":false,"color":"#f34b7d","followers":117,"has_funding_file":false,"hl_name":"UCLA-VAST/AutoBridge","hl_trunc_description":"[FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.","language":"C++","mirror":false,"owned_by_organization":true,"public":true,"repo":{"repository":{"id":263524123,"name":"AutoBridge","owner_id":13878345,"owner_login":"UCLA-VAST","updated_at":"2023-01-03T02:30:49.228Z","has_issues":true}},"sponsorable":false,"topics":["frequency","fpga","xilinx","floorplan","vivado-hls","hls-compilation","hls-designs"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":90,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253AUCLA-VAST%252FAutoBridge%2B%2Blanguage%253AC%252B%252B","metadata":null,"warn_limited_results":false,"csrf_tokens":{"/UCLA-VAST/AutoBridge/star":{"post":"uZmt9cLOV171WVj6-e7tJdJqTaLM4UNWvo5KrCLbA-vWWWrgl_7l457DmI54LVQY2MAludPVvL6WOTcalOB_sg"},"/UCLA-VAST/AutoBridge/unstar":{"post":"I40NWaYqvQr_07JqklxoJG-eByoYGKwQ7B0THXbU8ZKuvrIaMEcdkrz21pHBGpIdC_h0B94KnjplfkOyPCMU5A"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"1fqQOP-rNcc7ce8xegNQoeRBOWh_ELwoi_Fewlhn6r-m1In4FuzuU1-YDWj6ZX7b3eGjF-si7b8nsJSGmCIr9A"}}},"title":"Repository search results"}