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Changing circuit topology during simulation #67
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I've been thinking about this issue lately and it seems to me that the only case where this feature is useful is for transient/time-based analysis. For DC, AC and Noise analysis, I can't find a use-case where it would make sense to change the circuit topology mid-simulation. If the circuit topology would change for those types of simulation, then it would make more sense that it influences all data points simultaneously. Only for time-based analysis you can talk about "inserting/removing an entity" mid-simulation and seeing what happens. I've also thought about some of the foreseen difficulties:
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The circuit topology can't be changed once a simulation has been started. We could include the feature of adding and removing components during the simulation (mainly transient simulations).
I foresee the following difficulties:
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