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tests: files creation simplified
1 parent 9273f51 commit c37cb52

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10 files changed

+16
-35
lines changed

10 files changed

+16
-35
lines changed

tests/mocks/FPExpress

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
#!/usr/bin/env python3
22

33
#
4-
# Copyright (C) 2024 PyFPGA Project
4+
# Copyright (C) 2024-2025 PyFPGA Project
55
#
66
# SPDX-License-Identifier: GPL-3.0-or-later
77
#

tests/mocks/diamondc

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,6 @@ with open(args.source, 'r', encoding='utf-8') as file:
4040
match = re.search(pattern, file.read())
4141
if match:
4242
project = match.group(1)
43-
with open(f'{project}.bit', 'w', encoding='utf-8') as file:
44-
pass
43+
open(f'{project}.bit', 'w', encoding='utf-8').close()
4544

4645
print(f'INFO:the {tool.upper()} mock has been executed')

tests/mocks/docker

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,7 @@
66
# SPDX-License-Identifier: GPL-3.0-or-later
77
#
88

9-
with open('openflow.bit', 'w', encoding='utf-8') as file:
10-
pass
11-
with open('openflow.svf', 'w', encoding='utf-8') as file:
12-
pass
9+
open('openflow.bit', 'w', encoding='utf-8').close()
10+
open('openflow.svf', 'w', encoding='utf-8').close()
1311

1412
print('INFO:the DOCKER mock has been executed')

tests/mocks/impact

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
#!/usr/bin/env python3
22

33
#
4-
# Copyright (C) 2022-2024 PyFPGA Project
4+
# Copyright (C) 2022-2025 PyFPGA Project
55
#
66
# SPDX-License-Identifier: GPL-3.0-or-later
77
#

tests/mocks/libero

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
#!/usr/bin/env python3
22

33
#
4-
# Copyright (C) 2022-2024 PyFPGA Project
4+
# Copyright (C) 2022-2025 PyFPGA Project
55
#
66
# SPDX-License-Identifier: GPL-3.0-or-later
77
#
@@ -47,7 +47,6 @@ with open(args.source, 'r', encoding='utf-8') as file:
4747
match = re.search(pattern, file.read())
4848
if match:
4949
project = match.group(1)
50-
with open(f'{project}.ppd', 'w', encoding='utf-8') as file:
51-
pass
50+
open(f'{project}.ppd', 'w', encoding='utf-8').close()
5251

5352
print(f'INFO:the {tool.upper()} mock has been executed')

tests/mocks/quartus_pgm

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
#!/usr/bin/env python3
22

33
#
4-
# Copyright (C) 2022-2024 PyFPGA Project
4+
# Copyright (C) 2022-2025 PyFPGA Project
55
#
66
# SPDX-License-Identifier: GPL-3.0-or-later
77
#

tests/mocks/quartus_sh

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
#!/usr/bin/env python3
22

33
#
4-
# Copyright (C) 2022-2024 PyFPGA Project
4+
# Copyright (C) 2022-2025 PyFPGA Project
55
#
66
# SPDX-License-Identifier: GPL-3.0-or-later
77
#
@@ -47,7 +47,6 @@ with open(args.script, 'r', encoding='utf-8') as file:
4747
match = re.search(pattern, file.read())
4848
if match:
4949
project = match.group(1)
50-
with open(f'{project}.sof', 'w', encoding='utf-8') as file:
51-
pass
50+
open(f'{project}.sof', 'w', encoding='utf-8').close()
5251

5352
print(f'INFO:the {tool.upper()} mock has been executed')

tests/mocks/vivado

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
#!/usr/bin/env python3
22

33
#
4-
# Copyright (C) 2022-2024 PyFPGA Project
4+
# Copyright (C) 2022-2025 PyFPGA Project
55
#
66
# SPDX-License-Identifier: GPL-3.0-or-later
77
#
@@ -76,7 +76,6 @@ with open(args.source, 'r', encoding='utf-8') as file:
7676
match = re.search(pattern, file.read())
7777
if match:
7878
project = match.group(1)
79-
with open(f'{project}.bit', 'w', encoding='utf-8') as file:
80-
pass
79+
open(f'{project}.bit', 'w', encoding='utf-8').close()
8180

8281
print(f'INFO:the {tool.upper()} mock has been executed')

tests/mocks/xtclsh

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
#!/usr/bin/env python3
22

33
#
4-
# Copyright (C) 2022-2024 PyFPGA Project
4+
# Copyright (C) 2022-2025 PyFPGA Project
55
#
66
# SPDX-License-Identifier: GPL-3.0-or-later
77
#
@@ -40,7 +40,6 @@ with open(args.source, 'r', encoding='utf-8') as file:
4040
match = re.search(pattern, file.read())
4141
if match:
4242
project = match.group(1)
43-
with open(f'{project}.bit', 'w', encoding='utf-8') as file:
44-
pass
43+
open(f'{project}.bit', 'w', encoding='utf-8').close()
4544

4645
print(f'INFO:the {tool.upper()} mock has been executed')

tests/test_tools.py

Lines changed: 2 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -85,17 +85,5 @@ def generate(tool, part):
8585
prj.add_hook('prebit', 'HOOK14')
8686
prj.add_hook('postbit', 'HOOK15')
8787
prj.add_hook('postbit', 'HOOK16')
88-
try:
89-
prj.make()
90-
except RuntimeError:
91-
pass
92-
if tool == 'libero':
93-
open(f'results/{tool}/{tool}.ppd', 'w').close()
94-
elif tool == 'quartus':
95-
open(f'results/{tool}/{tool}.sof', 'w').close()
96-
else:
97-
open(f'results/{tool}/{tool}.bit', 'w').close()
98-
try:
99-
prj.prog()
100-
except RuntimeError:
101-
pass
88+
prj.make()
89+
prj.prog()

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