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evm-kernel.patch
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evm-kernel.patch
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From 4f463a7eb533c5174f02007a94f287265b231eb0 Mon Sep 17 00:00:00 2001
From: NSKernel <[email protected]>
Date: Thu, 11 Mar 2021 02:03:54 -0500
Subject: [PATCH 1/9] Adapted vSGX to SEV-ES
---
arch/x86/kernel/process_64.c | 31 +-
arch/x86/kernel/traps.c | 289 ++++++
arch/x86/mm/fault.c | 126 ++-
crypto/asymmetric_keys/public_key.c | 73 ++
include/crypto/public_key.h | 4 +
include/emusgx/emusgx.h | 115 +++
include/emusgx/emusgx_arch.h | 242 +++++
include/emusgx/emusgx_cpuid.h | 12 +
include/emusgx/emusgx_debug.h | 8 +
include/emusgx/emusgx_fault.h | 9 +
include/emusgx/emusgx_internal.h | 173 ++++
include/emusgx/emusgx_mm.h | 12 +
include/emusgx/emusgx_sender.h | 279 +++++
include/linux/sched.h | 17 +
init/init_task.c | 3 +
kernel/Makefile | 2 +
kernel/emusgx/Kconfig | 3 +
kernel/emusgx/Makefile | 3 +
kernel/emusgx/aex.c | 159 +++
kernel/emusgx/cpusvn.c | 19 +
kernel/emusgx/cr.c | 228 +++++
kernel/emusgx/crypto.c | 575 +++++++++++
kernel/emusgx/dispatcher.c | 866 ++++++++++++++++
kernel/emusgx/emusgx_fetch.c | 94 ++
kernel/emusgx/encls_cross_vm.c | 1454 +++++++++++++++++++++++++++
kernel/emusgx/enclu.c | 1003 ++++++++++++++++++
kernel/emusgx/entrance.c | 491 +++++++++
kernel/emusgx/fault.c | 41 +
kernel/emusgx/irq.c | 130 +++
kernel/emusgx/local_dispatcher.c | 118 +++
kernel/emusgx/management.c | 337 +++++++
kernel/emusgx/sender.c | 306 ++++++
kernel/emusgx/switchless_sync.c | 395 ++++++++
kernel/fork.c | 9 +
34 files changed, 7623 insertions(+), 3 deletions(-)
create mode 100644 include/emusgx/emusgx.h
create mode 100644 include/emusgx/emusgx_arch.h
create mode 100644 include/emusgx/emusgx_cpuid.h
create mode 100644 include/emusgx/emusgx_debug.h
create mode 100644 include/emusgx/emusgx_fault.h
create mode 100644 include/emusgx/emusgx_internal.h
create mode 100644 include/emusgx/emusgx_mm.h
create mode 100644 include/emusgx/emusgx_sender.h
create mode 100644 kernel/emusgx/Kconfig
create mode 100644 kernel/emusgx/Makefile
create mode 100644 kernel/emusgx/aex.c
create mode 100644 kernel/emusgx/cpusvn.c
create mode 100644 kernel/emusgx/cr.c
create mode 100644 kernel/emusgx/crypto.c
create mode 100644 kernel/emusgx/dispatcher.c
create mode 100644 kernel/emusgx/emusgx_fetch.c
create mode 100644 kernel/emusgx/encls_cross_vm.c
create mode 100644 kernel/emusgx/enclu.c
create mode 100644 kernel/emusgx/entrance.c
create mode 100644 kernel/emusgx/fault.c
create mode 100644 kernel/emusgx/irq.c
create mode 100644 kernel/emusgx/local_dispatcher.c
create mode 100644 kernel/emusgx/management.c
create mode 100644 kernel/emusgx/sender.c
create mode 100644 kernel/emusgx/switchless_sync.c
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index df342bede..fb4bac1b3 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -520,6 +520,22 @@ void compat_start_thread(struct pt_regs *regs, u32 new_ip, u32 new_sp)
}
#endif
+static __always_inline void vsgx_force_save_fsgs(struct task_struct *prev_p) {
+ // For use with enclave threads
+ rdmsrl(MSR_FS_BASE, prev_p->thread.fsbase);
+ rdmsrl(MSR_KERNEL_GS_BASE, prev_p->thread.gsbase);
+}
+
+static __always_inline void vsgx_force_load_fsgs(struct task_struct *next_p) {
+ // For use with enclave threads
+ // Better don't touch the loadsegment thing
+ // On Intel machines they may clear the seg base
+ //loadsegment(fs, 0x0B);
+ wrmsrl(MSR_FS_BASE, next_p->thread.fsbase);
+ //load_gs_index(0x0B);
+ wrmsrl(MSR_KERNEL_GS_BASE, next_p->thread.gsbase);
+}
+
/*
* switch_to(x,y) should switch tasks from x to y.
*
@@ -550,7 +566,13 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
*
* (e.g. xen_load_tls())
*/
- save_fsgs(prev_p);
+ if (prev_p->is_enclave_thread) {
+ // We will force save the FS/GS for an enclave thread
+ vsgx_force_save_fsgs(prev_p);
+ }
+ else {
+ save_fsgs(prev_p);
+ }
/*
* Load TLS before restoring any segments so that segment loads
@@ -587,7 +609,12 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
if (unlikely(next->ds | prev->ds))
loadsegment(ds, next->ds);
- x86_fsgsbase_load(prev, next);
+ if (next_p->is_enclave_thread) {
+ vsgx_force_load_fsgs(next_p);
+ }
+ else {
+ x86_fsgsbase_load(prev, next);
+ }
/*
* Switch the PDA and FPU contexts.
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 170c94ec0..63c6c4c37 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -42,6 +42,8 @@
#include <asm/stacktrace.h>
#include <asm/processor.h>
+#include <asm/msr-index.h>
+#include <asm/segment.h>
#include <asm/debugreg.h>
#include <asm/realmode.h>
#include <asm/text-patching.h>
@@ -243,10 +245,297 @@ static noinstr bool handle_bug(struct pt_regs *regs)
return handled;
}
+#include <linux/kthread.h>
+
+#include <emusgx/emusgx.h>
+#include <emusgx/emusgx_internal.h>
+#include <emusgx/emusgx_sender.h>
+#include <emusgx/emusgx_mm.h>
+#include <emusgx/emusgx_cpuid.h>
+#include <emusgx/emusgx_debug.h>
+
+struct task_struct *emusgx_dispatcher_task = NULL;
+
+static void vsgx_enclave_debug_print(char *msg) {
+ pr_info("vSGX Enclave: %s\n", msg);
+}
+
DEFINE_IDTENTRY_RAW(exc_invalid_op)
{
irqentry_state_t state;
+ // Handle the SGX instructions
+ uint8_t *rip = (uint8_t *)(regs->ip);
+ uint8_t opcode_prefix;
+ uint8_t opcode_primary;
+ uint8_t opcode_secondary;
+ struct emusgx_regs reg_status;
+ struct emusgx_full_regs *full_regs;
+ struct emusgx_handle_buffer *handle_buffer;
+ int err;
+ char debug_print_buffer[100];
+
+
+ get_user(opcode_prefix, rip);
+ get_user(opcode_primary, (uint8_t *)(rip + 1));
+ get_user(opcode_secondary, (uint8_t *)(rip + 2));
+ if (opcode_prefix == 0x0F &&
+ opcode_primary == 0x01) {
+ if (opcode_secondary == 0xD7) {
+ reg_status.rax = (uint32_t)regs->ax;
+ reg_status.rbx = regs->bx;
+ reg_status.rcx = regs->cx;
+ reg_status.rdx = regs->dx;
+ reg_status.eflags = regs->flags;
+ // pr_info("SGX: trapped. not bad instruction, continued\n");
+ emusgx_handle_enclu(®_status, regs);
+
+ // If EEXIT, restore regs to previous state
+ if ((uint32_t)(regs->ax) == EMUSGX_EEXIT) {
+ // Not enclave anymore
+ current->is_enclave_thread = 0;
+ // Restore reg status
+ memcpy(regs, current->backup_regs_before_eenter, sizeof(struct pt_regs));
+ // So when EEXIT, it's just like nothing happened
+ kfree(current->backup_regs_before_eenter);
+
+ // Restore FS/GS
+ //loadsegment(fs, current->backup_fs);
+ wrmsrl(MSR_FS_BASE, current->backup_fsbase);
+ //load_gs_index(current->backup_gs);
+ wrmsrl(MSR_KERNEL_GS_BASE, current->backup_gsbase);
+
+ // Restore thread_struct's FS/GS base
+ // This must be done when removing is_enclave_thread flag
+ // since these fields are not updated since then but will
+ // load when context switch
+ current->thread.fsbase = current->backup_fsbase;
+ current->thread.gsbase = current->backup_gsbase;
+ }
+ else {
+ regs->ax = reg_status.rax;
+ regs->bx = reg_status.rbx;
+ regs->cx = reg_status.rcx;
+ regs->dx = reg_status.rdx;
+ regs->flags = reg_status.eflags;
+ }
+ regs->ip += 3;
+ return;
+ }
+ if (opcode_secondary == 0xEB) { // esgxmgr: EmuSGX User Manager Handlers
+ if (regs->ax == EMUSGX_MGROPS_REG_SELF) {
+ current->manager_entry = emusgx_register_manager(current->pid);
+ if (current->manager_entry == NULL) {
+ regs->ax = -1;
+ }
+ else {
+ regs->ax = 0;
+ }
+ regs->ip += 3;
+ return;
+ }
+ else if (regs->ax == EMUSGX_MGROPS_INIT_SYS) {
+ // Only init once
+ regs->ax = 0;
+ if (atomic_xchg(&emusgx_cr_inited, 1) == 0) {
+ // Not inited, do the initialization
+
+ // Get dispatcher online
+ emusgx_dispatcher_task = kthread_run(emusgx_dispatcher, (void *)0, "emusgx_dispatcher_task");
+ if (IS_ERR(emusgx_dispatcher_task)) {
+ pr_err("EmuSGX: Failed to create enclave sender task\n");
+ regs->ax = -1;
+ }
+
+ // Initialize the receive page
+ // and IRQ
+ emusgx_init_shared_page();
+ err = request_irq(EMUSGX_IRQ, emusgx_irq_handler, 0, "emusgx_irq_response", NULL);
+ if (err < 0) {
+ pr_info("EmuSGX: Failed to register IRQ handler, err = %d\n", err);
+ regs->ax = -1;
+ }
+ }
+ regs->ip += 3;
+ return;
+ }
+ else if (regs->ax == EMUSGX_MGROPS_SET_EPC) {
+ // RBX: Start
+ // RCX: Size
+ if (regs->bx % 4096 != 0) {
+ regs->ax = -1;
+ return;
+ }
+ if (regs->cx % 4096 != 0 || regs->bx + regs->cx <= regs->bx) {
+ regs->ax = -1;
+ return;
+ }
+ emusgx_epc_start = regs->bx;
+ emusgx_epc_end = regs->bx + regs->cx;
+ emusgx_init_epcm(regs->cx);
+ regs->ip += 3;
+ regs->ax = 0;
+ return;
+ }
+
+ else if (regs->ax == EMUSGX_MGROPS_GET_EPC) {
+ regs->bx = emusgx_epc_start;
+ regs->cx = emusgx_epc_end;
+ regs->ip += 3;
+ return;
+ }
+
+ else if (regs->ax == EMUSGX_MGROPS_WAIT_FOR_ACTION) {
+ emusgx_debug_print("EmuSGX: action_semaphore@0x%016llX\n", (uint64_t)&(((struct emusgx_user_space_manager_entry *)(current->manager_entry))->action_semaphore));
+ if (down_interruptible(&(((struct emusgx_user_space_manager_entry *)(current->manager_entry))->action_semaphore))) {
+ regs->ax = -EINVAL;
+ regs->ip += 3;
+ return;
+ }
+ // Got the semaphore
+ // Currently the handle buffer can only go setup a thread
+ // Return the action and in-kernel handle buffer address
+ // regs->ax = ((struct emusgx_user_space_manager_entry *)(current->manager_entry))->handle_buffer->action;
+ regs->bx = (uint64_t)(((struct emusgx_user_space_manager_entry *)(current->manager_entry))->handle_buffer);
+ emusgx_debug_print("EmuSGX: Action handled\n");
+
+ // We have copied the handle buffer address, now the slot is available again
+ up(&(((struct emusgx_user_space_manager_entry *)(current->manager_entry))->action_avail_semaphore));
+ regs->ip += 3;
+ regs->ax = 0;
+ return;
+ }
+ /*
+ else if (regs->ax == EMUSGX_MGROPS_START_SENDER) {
+ regs->ax = emusgx_start_sender();
+ regs->ip += 3;
+ return;
+ }
+
+ else if (regs->ax == EMUSGX_MGROPS_STOP_SENDER) {
+ regs->ax = emusgx_stop_sender();
+ regs->ip += 3;
+ return;
+ }
+ */
+ else if (regs->ax == EMUSGX_MGROPS_CHECK_SENDER) {
+ if (emusgx_check_sender()) {
+ pr_info("EmuSGX: WARNING: No sender is found\n");
+ regs->ax = 1;
+ }
+ else {
+ regs->ax = 0;
+ }
+ regs->ip += 3;
+ return;
+ }
+
+ else if (regs->ax == EMUSGX_MGROPS_SETUP_THREAD) {
+ // RBX: handle buffer
+
+ handle_buffer = (struct emusgx_handle_buffer *)regs->bx;
+
+ emusgx_debug_print("EmuSGX: Now setting up thread\n");
+ // Setup FS/GS base
+ // o Save first
+ // o FS/GS selectors are set to 0x0B
+ // o Other attributes in the `hidden portion`
+ // are ignored in 64-bit mode
+ //savesegment(fs, current->backup_fs);
+ //savesegment(gs, current->backup_gs);
+ rdmsrl(MSR_FS_BASE, current->backup_fsbase);
+ rdmsrl(MSR_KERNEL_GS_BASE, current->backup_gsbase);
+
+ //loadsegment(fs, 0x0B);
+ wrmsrl(MSR_FS_BASE, handle_buffer->fsbase);
+ //load_gs_index(0x0B);
+ wrmsrl(MSR_KERNEL_GS_BASE, handle_buffer->gsbase);
+ emusgx_debug_print("EmuSGX: Done FS/GS\n");
+
+ // Setup SECS and set is_enclave_thread
+ current->secs = handle_buffer->secs;
+ current->secs_pa = handle_buffer->secs_pa;
+ current->tcs = handle_buffer->tcs;
+ current->gpr = handle_buffer->gpr;
+ current->is_enclave_thread = 1;
+ current->emusgx_pid = handle_buffer->pid;
+ current->backup_regs_before_eenter = kmalloc(sizeof(struct pt_regs), GFP_KERNEL);
+ // Backup regs, do not have to +3 because
+ memcpy(current->backup_regs_before_eenter, regs, sizeof(struct pt_regs));
+ full_regs = &(handle_buffer->regs);
+ emusgx_debug_print("EmuSGX: Done preprocessing\n");
+
+ // Setup registers
+ // o RAX and RCX have been setup in entrance
+ full_regs = &(handle_buffer->regs);
+ regs->ip = handle_buffer->rip;
+ regs->r15 = full_regs->r15;
+ regs->r14 = full_regs->r14;
+ regs->r13 = full_regs->r13;
+ regs->r12 = full_regs->r12;
+ regs->bp = full_regs->bp;
+ regs->bx = full_regs->bx;
+ regs->r11 = full_regs->r11;
+ regs->r10 = full_regs->r10;
+ regs->r9 = full_regs->r9;
+ regs->r8 = full_regs->r8;
+ regs->ax = full_regs->ax;
+ regs->cx = full_regs->cx;
+ regs->dx = full_regs->dx;
+ regs->si = full_regs->si;
+ regs->di = full_regs->di;
+ regs->flags = full_regs->flags;
+ regs->sp = full_regs->sp;
+ emusgx_debug_print("EmuSGX: Done setting up regs. IP = 0x%016lX\n", regs->ip);
+ emusgx_debug_print("EmuSGX: R9 = %ld\n", regs->r9);
+
+ // Now the handle buffer is useless
+ // Free it
+ kfree (handle_buffer);
+
+ // We are now at the state of enclave entrance
+ return;
+ }
+ else if (regs->ax == EMUSGX_MGROPS_DBGPRINT) {
+ // Copy message to buffer then print it
+ __uaccess_begin();
+ strncpy(debug_print_buffer, (void __user *)regs->bx, 99);
+ __uaccess_end();
+ debug_print_buffer[99] = 0;
+ vsgx_enclave_debug_print(debug_print_buffer);
+ regs->ip += 3;
+ return;
+ }
+ else {
+ pr_info("EmuSGX: Unknown manager operation\n");
+ regs->ax = -1;
+ regs->ip += 3;
+ return;
+ }
+ }
+ if (opcode_secondary == 0xEC) { // esgxsl: EmuSGX Switchless Page Syncing
+ // DOES NOT EXPECT TO RETURN
+
+ // The switchless page syncing process
+ emusgx_switchless_sync_worker();
+
+ regs->ax = -1;
+ regs->ip += 3;
+ return;
+ }
+ if (opcode_secondary == 0xED) { // esgxes: EmuSGX Dispatcher
+ // DOES NOT EXPECT TO RETURN
+
+ emusgx_local_dispatcher(current->manager_entry->manager_nr);
+
+ // Only possible to be here when SIGKILL is issued
+ regs->ax = -1;
+ regs->ip += 3;
+ return;
+ }
+ }
+
+
/*
* We use UD2 as a short encoding for 'CALL __WARN', as such
* handle it before exception entry to avoid recursive WARN
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 9c1545c37..a6aa3cd0e 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -19,6 +19,9 @@
#include <linux/efi.h> /* efi_recover_from_page_fault()*/
#include <linux/mm_types.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+
#include <asm/cpufeature.h> /* boot_cpu_has, ... */
#include <asm/traps.h> /* dotraplinkage, ... */
#include <asm/fixmap.h> /* VSYSCALL_ADDR */
@@ -34,6 +37,10 @@
#define CREATE_TRACE_POINTS
#include <asm/trace/exceptions.h>
+#include <emusgx/emusgx_mm.h>
+#include <emusgx/emusgx_internal.h>
+#include <emusgx/emusgx_debug.h>
+
/*
* Returns 0 if mmiotrace is disabled, or if the fault is not
* handled by mmiotrace:
@@ -1215,6 +1222,93 @@ do_kern_addr_fault(struct pt_regs *regs, unsigned long hw_error_code,
}
NOKPROBE_SYMBOL(do_kern_addr_fault);
+static int emusgx_handle_fault(struct mm_struct *mm, unsigned long address, struct pt_regs *regs) {
+ struct vm_area_struct *vma;
+ uint64_t page_addr = (address >> PAGE_SHIFT) << PAGE_SHIFT;
+ long mmap_error;
+ void *page_data;
+ uint8_t get_page_ret_val;
+ unsigned long mmap_populate;
+ int i;
+ uint64_t waiting_nr;
+ struct semaphore *other_waiting_semaphore;
+
+ // Check if the address is in ELRANGE
+ if (vsgx_check_in_elrange((void __user *)address)) {
+ pr_info("vSGX: PF within ELRANGE. AEX\n");
+ return -1;
+ }
+
+ // Try get the page from another VM
+ emusgx_debug_print("EmuSGX: Requesting data for page 0x%016lX\n", address);
+ get_page_ret_val = emusgx_get_guest_page(page_addr, &page_data, &other_waiting_semaphore, &waiting_nr);
+ if (get_page_ret_val) {
+ // The page is already set up
+ // We are good to return
+ mmap_read_unlock(mm);
+ return 0;
+ }
+ if (page_data != NULL) {
+ // Create mmap for such page
+ // We have mm locked so we could go all the way into do_mmap
+ mmap_read_unlock(mm);
+ // We have to WRITE
+ // pr_info("EmuSGX: Getting write lock\n");
+ if (mmap_write_lock_killable(mm)) {
+ pr_info("EmuSGX: mmap failed to get lock\n");
+ return -1;
+ }
+ // pr_info("EmuSGX: Doing mmap @ 0x%016llX\n", page_addr);
+ mmap_error = do_mmap(NULL, page_addr, 4096, PROT_READ | PROT_WRITE | PROT_EXEC,
+ MAP_FIXED_NOREPLACE | MAP_ANONYMOUS| MAP_PRIVATE, 0, &mmap_populate, NULL);
+ // pr_info("EmuSGX: mmap is done\n");
+ mmap_write_unlock(mm);
+ // Release the write semaphore and grab the read semaphore again
+ mmap_read_lock(mm);
+ if (mmap_error != page_addr) {
+ pr_info("EmuSGX: mmap failed at 0x%016llX. Error = 0x%016lX\n", page_addr, mmap_error); // Just let it fall to bad_area
+ return -1;
+ }
+ else {
+ // Good mmap
+ vma = find_vma(mm, address);
+ if (likely(vma)) {
+ // Write page
+ emusgx_clear_dirty((void *)page_addr);
+ if (copy_to_user((void *)page_addr, page_data, 4096)) {
+ pr_info("EmuSGX: Failed to copy to user\n");
+ }
+ // Clear the dirty bit
+ // page_data needs to be manually freed
+ // Create new slot for switchless syncing
+ mmap_read_unlock(mm);
+ // Here the create new slot will need to down_write mem_sem
+ // So we have to leave the semaphore open
+ if (emusgx_switchless_new_slot((void *)page_addr, page_data)) {
+ pr_info("EmuSGX: Failed to create slot\n");
+ // This is deadly
+ // Will fall to bad area
+ // So we will not be handling the do_unmmap
+ kfree(page_data);
+ mmap_read_lock(mm);
+ return -1;
+ }
+ kfree(page_data);
+
+ for (i = 0; i < waiting_nr; i++) {
+ // Wakeup other threads that are waiting for our thread to populate the data
+ up(other_waiting_semaphore);
+ }
+ // When return success, we do not need to re-grab the semaphore
+ return 0;
+ }
+ pr_info("EmuSGX: Why can't I find VMA?\n");
+ return -1;
+ }
+ }
+ return -1;
+}
+
/* Handle faults in the user portion of the address space */
static inline
void do_user_addr_fault(struct pt_regs *regs,
@@ -1339,16 +1433,46 @@ void do_user_addr_fault(struct pt_regs *regs,
vma = find_vma(mm, address);
if (unlikely(!vma)) {
+ if (current->is_enclave_thread) {
+ if (!emusgx_handle_fault(mm, address, regs)) {
+ return;
+ }
+ pr_err("vSGX: Failed to handle page fault at 0x%016llX\n", (uint64_t)address);
+ // AEX
+ vsgx_aex_on_current_thread(regs, 14, hw_error_code, address );
+ return;
+ }
bad_area(regs, hw_error_code, address);
return;
}
if (likely(vma->vm_start <= address))
goto good_area;
if (unlikely(!(vma->vm_flags & VM_GROWSDOWN))) {
+ if (current->is_enclave_thread) {
+ if (!emusgx_handle_fault(mm, address, regs)) {
+ return;
+ }
+ pr_err("vSGX: Failed to handle page fault at 0x%016llX\n", (uint64_t)address);
+ // AEX
+ vsgx_aex_on_current_thread(regs, 14, hw_error_code, address);
+ return;
+ }
bad_area(regs, hw_error_code, address);
return;
}
- if (unlikely(expand_stack(vma, address))) {
+ if (current->is_enclave_thread) {
+ if (!emusgx_handle_fault(mm, address, regs)) {
+ return;
+ }
+ pr_err("vSGX: Failed to handle page fault at 0x%016llX\n", (uint64_t)address);
+ // An enclave thread must not expand its stack anyway
+ // We do not allow doing that since the real payload
+ // is running on a trusted stack instead of this one
+ // AEX
+ vsgx_aex_on_current_thread(regs, 14, hw_error_code, address );
+ return;
+ }
+ else if (unlikely(expand_stack(vma, address))) {
bad_area(regs, hw_error_code, address);
return;
}
diff --git a/crypto/asymmetric_keys/public_key.c b/crypto/asymmetric_keys/public_key.c
index 788a4ba1e..9c4585651 100644
--- a/crypto/asymmetric_keys/public_key.c
+++ b/crypto/asymmetric_keys/public_key.c
@@ -14,11 +14,13 @@
#include <linux/slab.h>
#include <linux/seq_file.h>
#include <linux/scatterlist.h>
+#include <linux/mpi.h>
#include <keys/asymmetric-subtype.h>
#include <crypto/public_key.h>
#include <crypto/akcipher.h>
#include <crypto/sm2.h>
#include <crypto/sm3_base.h>
+#include <crypto/internal/akcipher.h>
MODULE_DESCRIPTION("In-software asymmetric public-key subtype");
MODULE_AUTHOR("Red Hat, Inc.");
@@ -387,6 +389,77 @@ int public_key_verify_signature(const struct public_key *pkey,
}
EXPORT_SYMBOL_GPL(public_key_verify_signature);
+int emusgx_rsa_public_key_verify_signature(uint8_t *n, uint64_t nsize,
+ uint8_t *e, uint64_t esize,
+ const struct public_key_signature *sig)
+{
+ struct crypto_wait cwait;
+ struct crypto_akcipher *tfm;
+ struct akcipher_request *req;
+ struct scatterlist src_sg[2];
+ char alg_name[CRYPTO_MAX_ALG_NAME];
+ int ret;
+ struct rsa_mpi_key {
+ MPI n;
+ MPI e;
+ MPI d;
+ } *mpi_key;
+
+ pr_devel("==>%s()\n", __func__);
+
+ BUG_ON(!n);
+ BUG_ON(!e);
+ BUG_ON(!sig);
+ BUG_ON(!sig->s);
+
+ snprintf(alg_name, CRYPTO_MAX_ALG_NAME, "pkcs1pad(rsa,sha1)");
+
+ tfm = crypto_alloc_akcipher(alg_name, 0, 0);
+ if (IS_ERR(tfm))
+ return PTR_ERR(tfm);
+
+ ret = -ENOMEM;
+ req = akcipher_request_alloc(tfm, GFP_KERNEL);
+ if (!req)
+ goto error_free_tfm;
+
+ // set key
+ mpi_key = akcipher_tfm_ctx(tfm);
+
+ mpi_key->e = mpi_read_raw_data(e, esize);
+ if (!mpi_key->e)
+ goto error_free_req;
+
+ mpi_key->n = mpi_read_raw_data(n, nsize);
+ if (!mpi_key->n)
+ goto error_free_req;
+
+ if (nsize != 384) {
+ ret = -EINVAL;
+ goto error_free_req;
+ }
+
+ sg_init_table(src_sg, 2);
+ sg_set_buf(&src_sg[0], sig->s, sig->s_size);
+ sg_set_buf(&src_sg[1], sig->digest, sig->digest_size);
+ akcipher_request_set_crypt(req, src_sg, NULL, sig->s_size,
+ sig->digest_size);
+ crypto_init_wait(&cwait);
+ akcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG |
+ CRYPTO_TFM_REQ_MAY_SLEEP,
+ crypto_req_done, &cwait);
+ ret = crypto_wait_req(crypto_akcipher_verify(req), &cwait);
+
+error_free_req:
+ akcipher_request_free(req);
+error_free_tfm:
+ crypto_free_akcipher(tfm);
+ pr_devel("<==%s() = %d\n", __func__, ret);
+ if (WARN_ON_ONCE(ret > 0))
+ ret = -EINVAL;
+ return ret;
+}
+
static int public_key_verify_signature_2(const struct key *key,
const struct public_key_signature *sig)
{
diff --git a/include/crypto/public_key.h b/include/crypto/public_key.h
index 948c5203c..e21647b0d 100644
--- a/include/crypto/public_key.h
+++ b/include/crypto/public_key.h
@@ -84,4 +84,8 @@ extern int verify_signature(const struct key *,
int public_key_verify_signature(const struct public_key *pkey,
const struct public_key_signature *sig);
+int emusgx_rsa_public_key_verify_signature(uint8_t *n, uint64_t nsize,
+ uint8_t *e, uint64_t esize,
+ const struct public_key_signature *sig);
+
#endif /* _LINUX_PUBLIC_KEY_H */
diff --git a/include/emusgx/emusgx.h b/include/emusgx/emusgx.h
new file mode 100644
index 000000000..328368f07
--- /dev/null
+++ b/include/emusgx/emusgx.h
@@ -0,0 +1,115 @@
+#ifndef EMUSGX_H
+#define EMUSGX_H
+
+#include <linux/kernel.h>
+#include <linux/ptrace.h>
+#include <emusgx/emusgx_arch.h>
+#include <emusgx/emusgx_internal.h>
+
+#define EMUSGX_ECREATE 0x00
+#define EMUSGX_EADD 0x01
+#define EMUSGX_EINIT 0x02
+#define EMUSGX_EREMOVE 0x03
+#define EMUSGX_EDBGRD 0x04
+#define EMUSGX_EDBGWR 0x05
+#define EMUSGX_EEXTEND 0x06
+#define EMUSGX_ELDB 0x07
+#define EMUSGX_ELDU 0x08
+#define EMUSGX_EBLOCK 0x09
+#define EMUSGX_EPA 0x0A
+#define EMUSGX_EWB 0x0B
+#define EMUSGX_ETRACK 0x0C
+#define EMUSGX_EAUG 0x0D
+#define EMUSGX_EMODPR 0x0E
+#define EMUSGX_EMODT 0x0F
+
+#define EMUSGX_EREPORT 0x00
+#define EMUSGX_EGETKEY 0x01
+#define EMUSGX_EENTER 0x02
+#define EMUSGX_ERESUME 0x03
+#define EMUSGX_EEXIT 0x04
+#define EMUSGX_EACCEPT 0x05
+#define EMUSGX_EMODPE 0x06
+#define EMUSGX_EACCEPTCOPY 0x07
+
+#define EMUSGX_SUCCESS 0
+#define EMUSGX_INVALID_SIG_STRUCT 1
+#define EMUSGX_INVALID_ATTRIBUTE 2
+#define EMUSGX_BLKSTATE 3
+#define EMUSGX_INVALID_MEASUREMENT 4
+#define EMUSGX_NOTBLOCKABLE 5
+#define EMUSGX_PG_INVLD 6
+#define EMUSGX_LOCKFAIL 7
+#define EMUSGX_INVALID_SIGNATURE 8
+#define EMUSGX_MAC_COMPARE_FAIL 9
+#define EMUSGX_PAGE_NOT_BLOCKED 10
+#define EMUSGX_NOT_TRACKED 11
+#define EMUSGX_VA_SLOT_OCCUPIED 12
+#define EMUSGX_CHILD_PRESENT 13
+#define EMUSGX_ENCLAVE_ACT 14
+#define EMUSGX_ENTRYEPOCH_LOCKED 15
+#define EMUSGX_INVALID_EINITTOKEN 16
+#define EMUSGX_PREV_TRK_INCMPL 17
+#define EMUSGX_PG_IS_SECS 18
+#define EMUSGX_PAGE_ATTRIBUTES_MISMATCH 19
+#define EMUSGX_PAGE_NOT_MODIFIABLE 20
+#define EMUSGX_INVALID_CPUSVN 32
+#define EMUSGX_INVALID_ISVSVN 64
+#define EMUSGX_UNMASKED_EVENT 128
+#define EMUSGX_INVALID_KEYNAME 256
+
+#define EMUSGX_PF_RBX 508
+#define EMUSGX_GP 509
+#define EMUSGX_PF_RCX 510
+#define EMUSGX_PF_RDX 511
+
+struct emusgx_regs {
+ uint64_t rax;
+ uint64_t rbx;
+ uint64_t rcx;
+ uint64_t rdx;
+ union {
+ unsigned long eflags;
+ struct {
+ uint8_t CF : 1;
+ uint8_t Reserved1 : 1; // always 1
+ uint8_t PF : 1;
+ uint8_t Reserved2 : 1; // always 0
+ uint8_t AF : 1;
+ uint8_t Reserved3 : 1; // always 0
+ uint8_t ZF : 1;
+ uint8_t SF : 1;
+ uint8_t TFIFDF : 3; // don't care
+ uint8_t OF : 1;
+ uint32_t DONOTCARE : 20;
+ uint32_t ZEROS : 32;
+ } __attribute__((__packed__)) flags;
+ };
+
+};
+
+struct emusgx_epcm {
+ uint8_t valid;
+ uint8_t R;
+ uint8_t W;
+ uint8_t X;
+ uint8_t page_type;
+ uint64_t enclave_secs;
+ void *enclave_address;
+ uint8_t blocked;
+ uint8_t pending;
+ uint8_t modified;
+ uint8_t secs_inited;
+ struct emusgx_user_space_manager_entry *manager_entry;
+};
+
+extern uint64_t emusgx_csr_owner_epoch[2];
+extern uint64_t emusgx_cr_seal_fuses[2];
+extern uint64_t emusgx_cr_cpusvn[2];
+extern uint64_t emusgx_cr_report_keyid[4];
+extern uint32_t emusgx_csr_intelpubkeyhash[8];
+extern uint8_t emusgx_cr_base_pk[16];
+
+void emusgx_handle_enclu(struct emusgx_regs *reg_status, struct pt_regs *ptrace_regs);
+
+#endif // EMUSGX_H
\ No newline at end of file
diff --git a/include/emusgx/emusgx_arch.h b/include/emusgx/emusgx_arch.h
new file mode 100644
index 000000000..f4748bb02
--- /dev/null
+++ b/include/emusgx/emusgx_arch.h
@@ -0,0 +1,242 @@
+#ifndef EMUSGX_ARCH_H
+#define EMUSGX_ARCH_H
+
+#include <linux/kernel.h>
+
+#define SGX_SECS_RESERVED1_SIZE 24
+#define SGX_SECS_RESERVED2_SIZE 32
+#define SGX_SECS_RESERVED3_SIZE 96
+#define SGX_SECS_RESERVED4_SIZE 3460
+
+extern const uint8_t HARDCODED_PKCS1_5_PADDING[352];
+
+struct sgx_secs {
+ uint64_t size;
+ uint64_t base;
+ uint32_t ssaframesize;
+ uint32_t miscselect;
+ uint8_t reserved1[SGX_SECS_RESERVED1_SIZE];
+ union {
+ uint64_t attributes;
+ struct {
+ uint8_t reserved1 : 1;
+ uint8_t debug : 1;
+ uint8_t mod64bit : 1;
+ uint8_t reserved2 : 1;
+ uint8_t provisionkey : 1;
+ uint8_t einittokenkey : 1;
+ uint64_t reserved3 : 58;
+ } __attribute__((__packed__)) attribute;
+ };
+ uint64_t xfrm;
+ uint32_t mrenclave[8];
+ uint8_t reserved2[SGX_SECS_RESERVED2_SIZE];
+ uint32_t mrsigner[8];
+ uint8_t reserved3[SGX_SECS_RESERVED3_SIZE];
+ uint16_t isvprodid;
+ uint16_t isvsvn;
+ uint64_t eid;
+ uint8_t padding[352];
+ uint64_t mrenclave_update_counter;
+ uint64_t manager_entry;
+ uint8_t reserved4[SGX_SECS_RESERVED4_SIZE];
+} __attribute__((__packed__));
+
+#define SGX_PT_SECS 0x00
+#define SGX_PT_TCS 0x01
+#define SGX_PT_REG 0x02
+#define SGX_PT_VA 0x03
+#define SGX_PT_TRIM 0x04
+
+struct sgx_secinfo {
+ struct {
+ uint8_t R : 1;
+ uint8_t W : 1;
+ uint8_t X : 1;
+ uint8_t pending : 1;
+ uint8_t modified : 1;
+ uint8_t reserved : 3;
+ uint8_t page_type : 8;
+ uint64_t reserved2 : 48;
+ } flags __attribute__((__packed__));
+ uint64_t reserved[7];
+} __attribute__((__packed__));
+
+#define SGX_LAUNCH_KEY 0
+#define SGX_PROVISION_KEY 1
+#define SGX_PROVISION_SEAL_KEY 2
+#define SGX_REPORT_KEY 3
+#define SGX_SEAL_KEY 4
+
+struct sgx_keyrequest {
+ uint16_t keyname;
+ union {
+ uint16_t keypolicy;
+ struct {
+ uint8_t mrenclave : 1;
+ uint8_t mrsigner : 1;
+ uint64_t reserved : 14;
+ } __attribute__((__packed__)) policy;
+ };
+ uint16_t isvsvn;
+ uint16_t reserved;
+ uint64_t cpusvn[2];
+ uint64_t attributemask[2];
+ uint64_t keyid[4];
+ uint32_t miscmask;
+ uint8_t reserved2[436];
+} __attribute__((__packed__));
+
+struct sgx_targetinfo {
+ uint32_t measurement[8];
+ uint64_t attributes[2];
+ uint32_t reserved1;
+ uint32_t miscselect;
+ uint8_t reserved2[456];
+} __attribute__((__packed__));
+
+struct sgx_report {
+ uint64_t cpusvn[2];
+ uint32_t miscselect;
+ uint8_t reserved1[28];
+ uint64_t attributes[2];
+ uint32_t mrenclave[8];
+ uint64_t reserved2[4];
+ uint32_t mrsigner[8];
+ uint8_t reserved3[96];
+ uint16_t isvprodid;
+ uint16_t isvsvn;
+ uint8_t reserved4[60];
+ uint8_t reportdata[64]; // 64 byte buffer
+ uint64_t keyid[4];
+ uint64_t mac[2];
+} __attribute__((__packed__));
+
+struct sgx_tcs {
+ uint64_t state;
+ struct {
+ uint8_t dbgoptin : 1;
+ uint64_t reserved : 63;
+ } __attribute__((__packed__)) flags;
+ uint64_t ossa;
+ uint32_t cssa;
+ uint32_t nssa;
+ uint64_t oentry;
+ uint64_t aep;
+ uint64_t ofsbasgx;
+ uint64_t ogsbasgx;
+ uint32_t fslimit;
+ uint32_t gslimit;
+ uint64_t pid;
+ uint8_t reserved4[4016]; // We use first 8 bytes of reserved field to store PID in the guest VM
+} __attribute__((__packed__));
+
+struct sgx_pageinfo {
+ uint64_t linaddr;
+ uint64_t srcpage;
+ union {
+ uint64_t secinfo;
+ uint64_t pcmd;
+ };
+ uint64_t secs;
+} __attribute__((__packed__));
+
+struct sgx_sigstruct {
+ uint64_t header[2];
+ uint32_t vendor;
+ uint32_t date;
+ uint8_t header2[16];
+ uint32_t swdefined;
+ uint8_t reserved1[84];
+ uint8_t modulus[384];
+ uint32_t exponent;
+ uint8_t signature[384];
+ uint32_t miscselect;
+ uint32_t miscmask;
+ uint8_t reserved2[20];
+ uint64_t attributes[2];
+ uint64_t attributemask[2];
+ uint32_t enclavehash[8];
+ uint8_t reserved3[32];
+ uint16_t isvprodid;
+ uint16_t isvsvn;