There are following RTL refactorings that should be done:
- Remove endian_swapper
- Rename top level generics to follow all-caps and
G_ prefix to be consistent with other namings. This will lead to backwards incompatibility in HW integration.
- Rename all processes to follow pattern
p_ prefix instead of _proc suffix.
- Rename all instance to follow pattern
i_ prefix instead of _inst suffix.
- Move all "loose" logic in TX Arbitrator to sth like
tx_arbitrator_datapath.
- Rename can_core to medium_access_control + all sub-blocks
- Rename prescaler to bit timing logic + all subblocks
- Rename bus sampling to bus management + all subblocks
- Rename
res_n to rst_n -> This is more inline with industry terminology
- Remove
G_ERR_VALID_PIPELINE
- Rename
scan_enable to scan_mode
There are following RTL refactorings that should be done:
G_prefix to be consistent with other namings. This will lead to backwards incompatibility in HW integration.p_prefix instead of_procsuffix.i_prefix instead of_instsuffix.tx_arbitrator_datapath.res_ntorst_n-> This is more inline with industry terminologyG_ERR_VALID_PIPELINEscan_enabletoscan_mode