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nishant-sachdevanishant-sachdeva
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removed array returns, and array params. replaced with pointers
1 parent 34da01c commit 28b8c8a

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2 files changed

+53
-69
lines changed

2 files changed

+53
-69
lines changed

‎src/FlowAware.cpp

Lines changed: 46 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -94,21 +94,11 @@ void IR2Vec_FA::collectWriteDefsMap(Module &M) {
9494
}
9595
}
9696

97-
// Vector IR2Vec_FA::getValue(std::string key) {
98-
// Vector vec(DIM, 0);
99-
// if (opcMap.find(key) == opcMap.end()) {
100-
// IR2VEC_DEBUG(errs() << "cannot find key in map : " << key << "\n");
101-
// dataMissCounter++;
102-
// } else
103-
// vec = opcMap[key];
104-
// return vec;
105-
// }
106-
10797
inline void IR2Vec_FA::getValue(IR2Vec::Vector &vec, std::string key) {
10898
auto it = opcMap.find(key);
10999
if (it == opcMap.end()) {
110-
dataMissCounter++;
111100
IR2VEC_DEBUG(errs() << "cannot find key in map : " << key << "\n");
101+
dataMissCounter++;
112102
} else
113103
vec = it->second;
114104
return;
@@ -139,7 +129,7 @@ void IR2Vec_FA::generateFlowAwareEncodings(std::ostream *o,
139129
std::ostream *cyclicCount) {
140130

141131
int noOfFunc = 0;
142-
#pragma omp for
132+
#pragma omp parallel for
143133
for (auto &f : M) {
144134
if (!f.isDeclaration()) {
145135
SmallVector<Function *, 15> funcStack;
@@ -150,7 +140,7 @@ void IR2Vec_FA::generateFlowAwareEncodings(std::ostream *o,
150140
}
151141
}
152142

153-
#pragma omp for
143+
#pragma omp parallel for
154144
for (auto funcit : funcVecMap) {
155145
updateFuncVecMapWithCallee(funcit.first);
156146
}
@@ -237,7 +227,7 @@ void IR2Vec_FA::generateFlowAwareEncodingsForFunction(
237227
}
238228
// iterating over all functions in module instead of funcVecMap to preserve
239229
// order
240-
#pragma omp for
230+
#pragma omp parallel for
241231
for (auto &f : M) {
242232
if (funcVecMap.find(&f) != funcVecMap.end()) {
243233
auto *function = const_cast<const Function *>(&f);
@@ -288,17 +278,16 @@ void IR2Vec_FA::topoDFS(int vertex, std::vector<bool> &Visited,
288278
visitStack.push_back(vertex);
289279
}
290280

291-
std::vector<int> IR2Vec_FA::topoOrder(int size) {
281+
void IR2Vec_FA::topoOrder(std::vector<int> &visitStack, int size) {
292282
std::vector<bool> Visited(size, false);
293-
std::vector<int> visitStack;
294283

295284
for (auto &nodes : SCCAdjList) {
296285
if (Visited[nodes.first] == false) {
297286
topoDFS(nodes.first, Visited, visitStack);
298287
}
299288
}
300289

301-
return visitStack;
290+
return;
302291
}
303292

304293
void IR2Vec_FA::TransitiveReads(SmallVector<Instruction *, 16> &Killlist,
@@ -317,10 +306,9 @@ void IR2Vec_FA::TransitiveReads(SmallVector<Instruction *, 16> &Killlist,
317306
TransitiveReads(Killlist, parentI, ParentBB);
318307
}
319308

320-
SmallVector<Instruction *, 16>
321-
IR2Vec_FA::createKilllist(Instruction *Arg, Instruction *writeInst) {
309+
void IR2Vec_FA::createKilllist(SmallVector<Instruction *, 16> &KillList,
310+
Instruction *Arg, Instruction *writeInst) {
322311

323-
SmallVector<Instruction *, 16> KillList;
324312
SmallVector<Instruction *, 16> tempList;
325313
BasicBlock *ParentBB = writeInst->getParent();
326314

@@ -343,7 +331,7 @@ IR2Vec_FA::createKilllist(Instruction *Arg, Instruction *writeInst) {
343331
KillList.push_back(*I);
344332
}
345333

346-
return KillList;
334+
return;
347335
}
348336

349337
Vector IR2Vec_FA::func2Vec(Function &F,
@@ -364,20 +352,20 @@ Vector IR2Vec_FA::func2Vec(Function &F,
364352

365353
ReversePostOrderTraversal<Function *> RPOT(&F);
366354

367-
#pragma omp for
355+
#pragma omp parallel for
368356
for (auto *b : RPOT) {
369357
for (auto &I : *b) {
370358
unsigned opnum;
371359
SmallVector<Instruction *, 16> lists;
372360
if (isMemOp(I.getOpcodeName(), opnum, memWriteOps) &&
373361
dyn_cast<Instruction>(I.getOperand(opnum))) {
374362
Instruction *argI = cast<Instruction>(I.getOperand(opnum));
375-
lists = createKilllist(argI, &I);
363+
createKilllist(lists, argI, &I);
376364
TransitiveReads(lists, argI, I.getParent());
377365
if (argI->getParent() == I.getParent())
378366
lists.push_back(argI);
379367

380-
#pragma openmp critical
368+
#pragma omp critical
381369
{ killMap[&I] = lists; }
382370
}
383371
}
@@ -387,7 +375,8 @@ Vector IR2Vec_FA::func2Vec(Function &F,
387375
for (auto &I : *b) {
388376
for (int i = 0; i < I.getNumOperands(); i++) {
389377
if (isa<Instruction>(I.getOperand(i))) {
390-
auto RD = getReachingDefs(&I, i);
378+
SmallVector<const Instruction *, 10> RD;
379+
getReachingDefs(RD, &I, i);
391380
if (instReachingDefsMap.find(&I) == instReachingDefsMap.end()) {
392381
instReachingDefsMap[&I] = RD;
393382
} else {
@@ -488,7 +477,7 @@ Vector IR2Vec_FA::func2Vec(Function &F,
488477

489478
std::vector<int> stack;
490479

491-
stack = topoOrder(allSCCs.size());
480+
topoOrder(stack, allSCCs.size());
492481

493482
for (int i = 0; i < allSCCs.size(); i++) {
494483
if (std::find(stack.begin(), stack.end(), i) == stack.end()) {
@@ -714,24 +703,23 @@ bool isPotentiallyReachable(
714703
Worklist, const_cast<BasicBlock *>(B->getParent()), ExclusionSet, DT, LI);
715704
}
716705

717-
SmallVector<const Instruction *, 10>
718-
IR2Vec_FA::getReachingDefs(const Instruction *I, unsigned loc) {
706+
void IR2Vec_FA::getReachingDefs(llvm::SmallVector<const Instruction *, 10> &RD,
707+
const Instruction *I, unsigned loc) {
719708
IR2VEC_DEBUG(
720709
outs()
721710
<< "Call to getReachingDefs Started****************************\n");
722711

723712
auto parent = dyn_cast<Instruction>(I->getOperand(loc));
724713
if (!parent)
725-
return {};
714+
return;
726715

727-
SmallVector<const Instruction *, 10> RD;
728716
SmallVector<const Instruction *, 10> probableRD;
729717
IR2VEC_DEBUG(outs() << "Inside RD for : ");
730718
IR2VEC_DEBUG(I->print(outs()); outs() << "\n");
731719

732720
if (writeDefsMap[parent].empty()) {
733721
RD.push_back(parent);
734-
return RD;
722+
return;
735723
} else if (writeDefsMap[parent].size() >= 1) {
736724
SmallMapVector<const BasicBlock *, SmallVector<const Instruction *, 10>, 16>
737725
bbInstMap;
@@ -779,25 +767,16 @@ IR2Vec_FA::getReachingDefs(const Instruction *I, unsigned loc) {
779767
IR2VEC_DEBUG(outs() << "Returning: ");
780768
IR2VEC_DEBUG(probableRD->print(outs()); outs() << "\n");
781769
RD.push_back(probableRD);
782-
return RD;
770+
return;
783771
}
784772
}
785773

786-
IR2VEC_DEBUG(outs() << "--------Across BB--------\n");
787774
SmallVector<const Instruction *, 10> toDelete;
788-
for (auto it : bbInstMap) {
789-
IR2VEC_DEBUG(outs() << "--------INSTMAP BEGIN--------\n";
790-
it.first->print(outs()); outs() << "\n");
791-
bool first = true;
792-
for (auto it1 : bbInstMap[it.first]) {
793-
if (first) {
794-
first = false;
795-
continue;
796-
}
797-
toDelete.push_back(it1);
798-
IR2VEC_DEBUG(it1->print(outs()); outs() << "\n");
775+
for (auto &it : bbInstMap) {
776+
auto &vec = it.second;
777+
if (vec.size() > 1) { // Skip empty or single-element vectors
778+
toDelete.insert(toDelete.end(), vec.begin() + 1, vec.end());
799779
}
800-
IR2VEC_DEBUG(outs() << "--------INSTMAP END--------\n");
801780
}
802781
auto tmp = probableRD;
803782
probableRD = {};
@@ -838,11 +817,11 @@ IR2Vec_FA::getReachingDefs(const Instruction *I, unsigned loc) {
838817
outs() << "\n";
839818
outs()
840819
<< "Call to getReachingDefs Ended****************************\n");
841-
return RD;
820+
return;
842821
}
843822

844823
llvm_unreachable("unreachable");
845-
return {};
824+
return;
846825
}
847826

848827
bool IR2Vec_FA::isMemOp(StringRef opcode, unsigned &operand,
@@ -870,7 +849,7 @@ void IR2Vec_FA::getPartialVec(
870849
}
871850

872851
Vector instVector(DIM, 0);
873-
Vector vec;
852+
Vector vec(DIM, 0);
874853
StringRef opcodeName = I.getOpcodeName();
875854
getValue(vec, opcodeName.str());
876855
IR2VEC_DEBUG(I.print(outs()); outs() << "\n");
@@ -927,9 +906,9 @@ void IR2Vec_FA::getPartialVec(
927906
void IR2Vec_FA::solveInsts(
928907
llvm::SmallMapVector<const llvm::Instruction *, IR2Vec::Vector, 16>
929908
&partialInstValMap) {
930-
std::map<unsigned, const Instruction *> xI;
931-
std::map<const Instruction *, unsigned> Ix;
932-
std::vector<std::vector<double>> A, B;
909+
std::unordered_map<unsigned, const Instruction *> xI;
910+
std::unordered_map<const Instruction *, unsigned> Ix;
911+
std::vector<std::vector<double>> B;
933912
SmallMapVector<const Instruction *,
934913
SmallMapVector<const Instruction *, double, 16>, 16>
935914
RDValMap;
@@ -946,7 +925,7 @@ void IR2Vec_FA::solveInsts(
946925
B.push_back(tmp);
947926
for (unsigned i = 0; i < inst->getNumOperands(); i++) {
948927
if (isa<Function>(inst->getOperand(i))) {
949-
Vector f;
928+
Vector f(DIM, 0);
950929
getValue(f, "function");
951930
if (isa<CallInst>(inst)) {
952931
auto ci = dyn_cast<CallInst>(inst);
@@ -972,7 +951,7 @@ void IR2Vec_FA::solveInsts(
972951
B.push_back(vec);
973952
} else if (isa<Constant>(inst->getOperand(i)) &&
974953
!isa<PointerType>(inst->getOperand(i)->getType())) {
975-
Vector c;
954+
Vector c(DIM, 0);
976955
getValue(c, "constant");
977956
auto svtmp = c;
978957
scaleVector(svtmp, WA);
@@ -986,7 +965,7 @@ void IR2Vec_FA::solveInsts(
986965
IR2VEC_DEBUG(outs() << vec.back() << "\n");
987966
B.push_back(vec);
988967
} else if (isa<BasicBlock>(inst->getOperand(i))) {
989-
Vector l;
968+
Vector l(DIM, 0);
990969
getValue(l, "label");
991970
auto svtmp = l;
992971
scaleVector(svtmp, WA);
@@ -1001,7 +980,8 @@ void IR2Vec_FA::solveInsts(
1001980
B.push_back(vec);
1002981
} else {
1003982
if (isa<Instruction>(inst->getOperand(i))) {
1004-
auto RD = getReachingDefs(inst, i);
983+
SmallVector<const Instruction *, 10> RD;
984+
getReachingDefs(RD, inst, i);
1005985
for (auto i : RD) {
1006986
// Check if value of RD is precomputed
1007987
if (instVecMap.find(i) == instVecMap.end()) {
@@ -1031,7 +1011,7 @@ void IR2Vec_FA::solveInsts(
10311011
}
10321012
}
10331013
} else if (isa<PointerType>(inst->getOperand(i)->getType())) {
1034-
Vector l;
1014+
Vector l(DIM, 0);
10351015
getValue(l, "pointer");
10361016
auto svtmp = l;
10371017
scaleVector(svtmp, WA);
@@ -1045,7 +1025,7 @@ void IR2Vec_FA::solveInsts(
10451025
IR2VEC_DEBUG(outs() << vec.back() << "\n");
10461026
B.push_back(vec);
10471027
} else {
1048-
Vector l;
1028+
Vector l(DIM, 0);
10491029
getValue(l, "variable");
10501030
auto svtmp = l;
10511031
scaleVector(svtmp, WA);
@@ -1064,11 +1044,10 @@ void IR2Vec_FA::solveInsts(
10641044
}
10651045
}
10661046

1067-
for (unsigned i = 0; i < xI.size(); i++) {
1068-
std::vector<double> tmp(xI.size(), 0);
1069-
A.push_back(tmp);
1070-
}
1047+
std::vector<std::vector<double>> A(xI.size(),
1048+
std::vector<double>(xI.size(), 0));
10711049

1050+
#pragma omp parallel for
10721051
for (unsigned i = 0; i < xI.size(); i++) {
10731052
A[i][i] = 1;
10741053
auto tmp = A[i];
@@ -1078,6 +1057,7 @@ void IR2Vec_FA::solveInsts(
10781057
}
10791058
}
10801059

1060+
#pragma omp parallel for collapse(2)
10811061
for (unsigned i = 0; i < B.size(); i++) {
10821062
for (unsigned j = 0; j < B[i].size(); j++) {
10831063
B[i][j] = (int)(B[i][j] * 10) / 10.0;
@@ -1171,7 +1151,8 @@ void IR2Vec_FA::solveSingleComponent(
11711151
getValue(vecOp, "label");
11721152
} else {
11731153
if (isa<Instruction>(I.getOperand(i))) {
1174-
auto RD = getReachingDefs(&I, i);
1154+
SmallVector<const Instruction *, 10> RD;
1155+
getReachingDefs(RD, &I, i);
11751156
RDList.insert(RDList.end(), RD.begin(), RD.end());
11761157
} else if (isa<PointerType>(I.getOperand(i)->getType())) {
11771158
getValue(vecOp, "pointer");
@@ -1248,7 +1229,7 @@ void IR2Vec_FA::inst2Vec(
12481229
}
12491230

12501231
Vector instVector(DIM, 0);
1251-
Vector vec;
1232+
Vector vec(DIM, 0);
12521233
StringRef opcodeName = I.getOpcodeName();
12531234
getValue(vec, opcodeName.str());
12541235
IR2VEC_DEBUG(I.print(outs()); outs() << "\n");
@@ -1330,7 +1311,8 @@ void IR2Vec_FA::inst2Vec(
13301311
getValue(vecOp, "label");
13311312
} else {
13321313
if (isa<Instruction>(I.getOperand(i))) {
1333-
auto RD = getReachingDefs(&I, i);
1314+
SmallVector<const Instruction *, 10> RD;
1315+
getReachingDefs(RD, &I, i);
13341316
RDList.insert(RDList.end(), RD.begin(), RD.end());
13351317
} else if (isa<PointerType>(I.getOperand(i)->getType()))
13361318
getValue(vecOp, "pointer");

‎src/include/FlowAware.h

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -75,8 +75,9 @@ class IR2Vec_FA {
7575
void getTransitiveUse(
7676
const llvm::Instruction *root, const llvm::Instruction *def,
7777
llvm::SmallVector<const llvm::Instruction *, 100> &visitedList);
78-
llvm::SmallVector<const llvm::Instruction *, 10>
79-
getReachingDefs(const llvm::Instruction *, unsigned i);
78+
79+
void getReachingDefs(llvm::SmallVector<const llvm::Instruction *, 10> &RD,
80+
const llvm::Instruction *, unsigned i);
8081

8182
void solveSingleComponent(
8283
const llvm::Instruction &I,
@@ -88,7 +89,7 @@ class IR2Vec_FA {
8889

8990
void solveInsts(llvm::SmallMapVector<const llvm::Instruction *,
9091
IR2Vec::Vector, 16> &instValMap);
91-
std::vector<int> topoOrder(int size);
92+
void topoOrder(std::vector<int> &visitStack, int size);
9293

9394
void topoDFS(int vertex, std::vector<bool> &Visited,
9495
std::vector<int> &visitStack);
@@ -116,8 +117,9 @@ class IR2Vec_FA {
116117

117118
void TransitiveReads(llvm::SmallVector<llvm::Instruction *, 16> &Killlist,
118119
llvm::Instruction *Inst, llvm::BasicBlock *ParentBB);
119-
llvm::SmallVector<llvm::Instruction *, 16>
120-
createKilllist(llvm::Instruction *Arg, llvm::Instruction *writeInst);
120+
121+
void createKilllist(llvm::SmallVector<llvm::Instruction *, 16> &KillList,
122+
llvm::Instruction *Arg, llvm::Instruction *writeInst);
121123

122124
// For Debugging
123125
void print(IR2Vec::Vector t, unsigned pos) { llvm::outs() << t[pos]; }

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