tmp-macros-list

eFPGA_top_i.Inst_BlockRAM_0 BlockRAM_1KB
eFPGA_top_i.Inst_BlockRAM_1 BlockRAM_1KB
eFPGA_top_i.Inst_BlockRAM_2 BlockRAM_1KB
eFPGA_top_i.Inst_BlockRAM_3 BlockRAM_1KB
eFPGA_top_i.Inst_BlockRAM_4 BlockRAM_1KB
eFPGA_top_i.Inst_BlockRAM_5 BlockRAM_1KB
eFPGA_top_i.Inst_BlockRAM_6 BlockRAM_1KB
eFPGA_top_i.eFPGA_Config_inst eFPGA_Config
eFPGA_top_i.eFPGA_inst.Tile_X0Y10_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X0Y11_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X0Y12_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X0Y13_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X0Y14_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X0Y1_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X0Y2_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X0Y3_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X0Y4_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X0Y5_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X0Y6_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X0Y7_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X0Y8_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X0Y9_W_IO W_IO
eFPGA_top_i.eFPGA_inst.Tile_X1Y0_N_term_single N_term_single
eFPGA_top_i.eFPGA_inst.Tile_X1Y10_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X1Y11_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X1Y12_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X1Y13_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X1Y14_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X1Y15_S_term_single S_term_single
eFPGA_top_i.eFPGA_inst.Tile_X1Y1_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X1Y2_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X1Y3_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X1Y4_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X1Y5_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X1Y6_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X1Y7_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X1Y8_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X1Y9_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y0_N_term_single N_term_single
eFPGA_top_i.eFPGA_inst.Tile_X2Y10_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y11_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y12_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y13_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y14_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y15_S_term_single S_term_single
eFPGA_top_i.eFPGA_inst.Tile_X2Y1_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y2_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y3_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y4_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y5_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y6_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y7_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y8_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X2Y9_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X3Y0_N_term_single2 N_term_single2
eFPGA_top_i.eFPGA_inst.Tile_X3Y10_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X3Y11_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X3Y12_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X3Y13_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X3Y14_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X3Y15_S_term_single2 S_term_single2
eFPGA_top_i.eFPGA_inst.Tile_X3Y1_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X3Y2_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X3Y3_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X3Y4_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X3Y5_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X3Y6_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X3Y7_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X3Y8_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X3Y9_RegFile RegFile
eFPGA_top_i.eFPGA_inst.Tile_X4Y0_N_term_single N_term_single
eFPGA_top_i.eFPGA_inst.Tile_X4Y10_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X4Y11_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X4Y12_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X4Y13_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X4Y14_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X4Y15_S_term_single S_term_single
eFPGA_top_i.eFPGA_inst.Tile_X4Y1_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X4Y2_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X4Y3_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X4Y4_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X4Y5_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X4Y6_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X4Y7_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X4Y8_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X4Y9_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y0_N_term_single N_term_single
eFPGA_top_i.eFPGA_inst.Tile_X5Y10_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y11_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y12_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y13_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y14_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y15_S_term_single S_term_single
eFPGA_top_i.eFPGA_inst.Tile_X5Y1_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y2_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y3_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y4_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y5_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y6_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y7_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y8_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X5Y9_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X6Y0_N_term_DSP N_term_DSP
eFPGA_top_i.eFPGA_inst.Tile_X6Y11_DSP DSP
eFPGA_top_i.eFPGA_inst.Tile_X6Y13_DSP DSP
eFPGA_top_i.eFPGA_inst.Tile_X6Y15_S_term_DSP S_term_DSP
eFPGA_top_i.eFPGA_inst.Tile_X6Y1_DSP DSP
eFPGA_top_i.eFPGA_inst.Tile_X6Y3_DSP DSP
eFPGA_top_i.eFPGA_inst.Tile_X6Y5_DSP DSP
eFPGA_top_i.eFPGA_inst.Tile_X6Y7_DSP DSP
eFPGA_top_i.eFPGA_inst.Tile_X6Y9_DSP DSP
eFPGA_top_i.eFPGA_inst.Tile_X7Y0_N_term_single N_term_single
eFPGA_top_i.eFPGA_inst.Tile_X7Y10_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X7Y11_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X7Y12_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X7Y13_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X7Y14_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X7Y15_S_term_single S_term_single
eFPGA_top_i.eFPGA_inst.Tile_X7Y1_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X7Y2_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X7Y3_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X7Y4_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X7Y5_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X7Y6_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X7Y7_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X7Y8_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X7Y9_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y0_N_term_single N_term_single
eFPGA_top_i.eFPGA_inst.Tile_X8Y10_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y11_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y12_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y13_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y14_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y15_S_term_single S_term_single
eFPGA_top_i.eFPGA_inst.Tile_X8Y1_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y2_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y3_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y4_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y5_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y6_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y7_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y8_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X8Y9_LUT4AB LUT4AB
eFPGA_top_i.eFPGA_inst.Tile_X9Y0_N_term_RAM_IO N_term_RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y10_RAM_IO RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y11_RAM_IO RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y12_RAM_IO RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y13_RAM_IO RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y14_RAM_IO RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y15_S_term_RAM_IO S_term_RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y1_RAM_IO RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y2_RAM_IO RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y3_RAM_IO RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y4_RAM_IO RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y5_RAM_IO RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y6_RAM_IO RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y7_RAM_IO RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y8_RAM_IO RAM_IO
eFPGA_top_i.eFPGA_inst.Tile_X9Y9_RAM_IO RAM_IO