first commit

Author: Dcatna

.gitignore

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+/inputfile

assembler.py

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+#Dominic Catena
+# I Pledge My Honor That I Have Abided By The Stevens Honor System
+import os
+
+def convertInstruction(instructionName, imm_reg2, reg1, targetreg, alusrc):
+    #machinecode = '000000000000000' 15 bits op|immediate/reg2|reg1|targetreg|alusrc
+    opcodes = {'ADD' : '00', 'SUB' : '01', 'LOAD' : '10', 'STORE' : '11'}
+    return opcodes[instructionName] + imm_reg2 + reg1 + targetreg + alusrc
+   
+
+if(__name__ == "__main__"):
+    if(os.path.exists("inputfile")): #remove files if the already exist
+        os.remove("inputfile")
+    if(os.path.exists("datafile")):
+        os.remove('datafile')
+
+   
+    program = open('program.txt', 'r').readlines()
+    instructionfile=open("inputfile", 'w') #write to the instruction mem file
+    
+    instructionfile.write("v3.0 hex words addressed\n") #have to write the header
+
+    baseaddress = 0000 #line starts here in the instruction file, each line has 16 spots(0-15), next address is 0010
+   # print(program)
+    instlist = []
+    for line in program:
+    # Skip empty lines or lines with only a newline character
+        if(line.strip() == ""):
+            continue
+
+        # Remove comments and any leading/trailing whitespace
+        line_content = line.split("//")[0].strip()
+
+        # Only add non-empty content to the list
+        if line_content:
+            instlist.append(line_content)
+
+    print(instlist)
+     
+        
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program.txt

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+
+LOAD L0, 0x00 //loading the registers with values stored in the data memory
+LOAD L1, 0x01
+
+ADD L0, L0, 2 //adding with an immediate value
+ADD L0, L0, L1 //adding with a register value
+
+SUB L0, L0, 1 //subbing with an immediate value
+SUB L1, L1, L0 //subbing with a register value
+
+STORE L0, 0x02 //storing data in specified memory location
+STORE L1, 0x03
+
+
+.data
+    4, 0x00
+    6, 0x01
+