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cpcec-z8.h
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cpcec-z8.h
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// #### ###### #### ####### #### ------------------------- //
// ## ## ## ## ## ## ## # ## ## CPCEC, plain text Amstrad //
// ## ## ## ## ## # ## CPC emulator written in C //
// ## ##### ## #### ## as a postgraduate project //
// ## ## ## ## # ## by Cesar Nicolas-Gonzalez //
// ## ## ## ## ## ## # ## ## since 2018-12-01 till now //
// #### #### #### ####### #### ------------------------- //
// The ZILOG Z80A that runs inside the Amstrad CPC is very similar to
// other Z80 chips used in 8-bit and 16-bit computers and consoles from
// the 1980s and 1990s. Its timings are slightly different but making
// them fit other machines only requires new timing macros and tables.
// This module also includes a debugger with a graphical user interface
// based on a four-panel layout: code, registers, data and stack.
// BEGINNING OF Z80 EMULATION ======================================= //
WORD z80_wz; // internal register WZ/MEMPTR //,z80_wz2; // is there a WZ'?
#if Z80_XCF_BUG
BYTE z80_q; // internal register Q
#define Z80_Q_SET(x) (z80_q=z80_af.b.l=(x))
#define Z80_Q_RST() (z80_q=0)
#else
#define Z80_Q_SET(x) (z80_af.b.l=(x))
#define Z80_Q_RST()
#endif
BYTE z80_flags_inc[256],z80_flags_dec[256]; // INC,DEC
BYTE z80_flags_sgn[256],z80_flags_add[512],z80_flags_sub[512]; // ADD,ADC,SUB,SBC...
BYTE z80_flags_and[256],z80_flags_xor[256],z80_flags_bit[256]; // AND,XOR,OR,BIT...
WORD z80_debug_stack=0xFFFF;
BYTE z80_debug_peekpoke=0,z80_debug_edfftrap=0;
BYTE z80_breakpoints[1<<16]; // breakpoints + register logs
WORD z80_debug_volatile=0; // volatile breakpoint ("run to")
WORD z80_debug_pnl0_w=0; // code byte / shadow PC
char z80_debug_pnl0_x=0; // X position (word nibble)
WORD z80_debug_pnl3_w=0; // stack word / shadow SP
BYTE z80_debug_logtmp[1<<9];
WORD z80_debug_logpos;
FILE *z80_debug_logfile=NULL;
void z80_debug_reset(void)
{
z80_debug_pnl0_w=z80_pc.w;
z80_debug_pnl0_x&=1;
z80_debug_pnl3_w=z80_sp.w;
debug_buffer[0]=128; // =draw debug screen
}
void z80_debug_close(void)
{
if (z80_debug_logfile)
{
if (z80_debug_logpos)
fwrite1(z80_debug_logtmp,z80_debug_logpos,z80_debug_logfile);
fclose(z80_debug_logfile);
z80_debug_logfile=NULL;
}
}
#define z80_reset_breakpoints() MEMZERO(z80_breakpoints)
void z80_setup(void) // setup the Z80
{
z80_reset_breakpoints();
// flag bit reference:
// - 7, 0x80: S, Sign
// - 6, 0x40: Z, Zero
// - 5, 0x20: 5, undocumented
// - 4, 0x10: H, Half carry
// - 3, 0x08: 3, undocumented
// - 2, 0x04: V, Parity/oVerflow
// - 1, 0x02: N, add/substract
// - 0, 0x01: C, Carry
// 9-bit expression RESULT^OP1^OP2 : bit 8 = full Carry, bit 7 = Sign carry, bit 4 = Half carry
for (int i=0;i<256;++i) // build flags that depend on the 8-bit result: S, Z and sometimes H and V too
{
int p=i&1;
if (i&2)
++p;
if (i&4)
++p;
if (i&8)
++p;
if (i&16)
++p;
if (i&32)
++p;
if (i&64)
++p;
if (i&128)
++p;
p=(p&1)?0:4; // -----P--
int j=i?(i&0x80):0x40; // SZ------
int x=j+(i&0x28); // SZ5-3----
z80_flags_sgn[i]=x; // SZ5-3---
z80_flags_inc[i]=x+(i==128?4:0)+((i&15)== 0?0x10:0); // SZ5H3V0-
z80_flags_dec[i]=x+(i==127?4:0)+((i&15)==15?0x12:2); // SZ5H3V1-
z80_flags_and[i]=0x10+(z80_flags_xor[i]=(x+p)); // SZ513P--,SZ503P--
z80_flags_bit[i]=0x10+j+p; // SZ-1-P--
j=(i&0x10)+((i&128)>>5); // ---H-V--
z80_flags_sub[i]=2+(z80_flags_add[i]=j); // ---H-V!0
z80_flags_sub[256+i]=2+(z80_flags_add[256+i]=j^5); // ---H-V!1
}
}
// Z80 disassembler ------------------------------------------------- //
enum { // list of opcodes and parameters used by the dictionnaries (cfr. infra)
Z80_DASM_NULL , Z80_DASM_SKIP , Z80_DASM_BACK , Z80_DASM_ADC ,
Z80_DASM_ADD , Z80_DASM_AND , Z80_DASM_BIT , Z80_DASM_CALL ,
Z80_DASM_CCF , Z80_DASM_CP , Z80_DASM_CPD , Z80_DASM_CPDR ,
Z80_DASM_CPI , Z80_DASM_CPIR , Z80_DASM_CPL , Z80_DASM_DAA ,
Z80_DASM_DEC , Z80_DASM_DI , Z80_DASM_DJNZ , Z80_DASM_EI ,
Z80_DASM_EX , Z80_DASM_EXX , Z80_DASM_HALT , Z80_DASM_IM ,
Z80_DASM_IN , Z80_DASM_INC , Z80_DASM_IND , Z80_DASM_INDR ,
Z80_DASM_INI , Z80_DASM_INIR , Z80_DASM_JP , Z80_DASM_JR ,
Z80_DASM_LD , Z80_DASM_LDD , Z80_DASM_LDDR , Z80_DASM_LDI ,
Z80_DASM_LDIR , Z80_DASM_NEG , Z80_DASM_NOP , Z80_DASM_OR ,
Z80_DASM_OTDR , Z80_DASM_OTIR , Z80_DASM_OUT , Z80_DASM_OUTD ,
Z80_DASM_OUTI , Z80_DASM_POP , Z80_DASM_PUSH , Z80_DASM_RES ,
Z80_DASM_RET , Z80_DASM_RETI , Z80_DASM_RETN , Z80_DASM_RL ,
Z80_DASM_RLA , Z80_DASM_RLC , Z80_DASM_RLCA , Z80_DASM_RLD ,
Z80_DASM_RR , Z80_DASM_RRA , Z80_DASM_RRC , Z80_DASM_RRCA ,
Z80_DASM_RRD , Z80_DASM_RST , Z80_DASM_SBC , Z80_DASM_SCF ,
Z80_DASM_SET , Z80_DASM_SLA , Z80_DASM_SLL , Z80_DASM_SRA ,
Z80_DASM_SRL , Z80_DASM_SUB , Z80_DASM_XOR , Z80_DASM_BYTE ,
Z80_DASM_WORD , Z80_DASM_P_B_ , Z80_DASM_P_W_ , Z80_DASM_P_BC ,
Z80_DASM_P_C , Z80_DASM_P_DE , Z80_DASM_P_HL , Z80_DASM_P_IX ,
Z80_DASM_Q_IX , Z80_DASM_P_SP , Z80_DASM_A , Z80_DASM_AF ,
Z80_DASM_AF2 , Z80_DASM_B , Z80_DASM_BC , Z80_DASM_C ,
Z80_DASM_D , Z80_DASM_DE , Z80_DASM_E , Z80_DASM_H ,
Z80_DASM_HL , Z80_DASM_I , Z80_DASM_IX , Z80_DASM_L ,
Z80_DASM_NC , Z80_DASM_NS , Z80_DASM_NV , Z80_DASM_NZ ,
Z80_DASM_R , Z80_DASM_S , Z80_DASM_SP , Z80_DASM_V ,
Z80_DASM_XH , Z80_DASM_XL , Z80_DASM_Z , Z80_DASM_0 ,
Z80_DASM_1 , Z80_DASM_2 , Z80_DASM_DIV8 , Z80_DASM_R_PC ,
Z80_DASM_EDFF ,
};
const char z80_dasm_lex[][5]= // SAME ORDER AS ABOVE ENUM!!
{
"" , "*NOP" , "*NOP" , "ADC " ,
"ADD " , "AND " , "BIT " , "CALL" ,
"CCF " , "CP " , "CPD " , "CPDR" ,
"CPI " , "CPIR" , "CPL " , "DAA " ,
"DEC " , "DI " , "DJNZ" , "EI " ,
"EX " , "EXX " , "HALT" , "IM " ,
"IN " , "INC " , "IND " , "INDR" ,
"INI " , "INIR" , "JP " , "JR " ,
"LD " , "LDD " , "LDDR" , "LDI " ,
"LDIR" , "NEG " , "NOP " , "OR " ,
"OTDR" , "OTIR" , "OUT " , "OUTD" ,
"OUTI" , "POP " , "PUSH" , "RES " ,
"RET " , "RETI" , "RETN" , "RL " ,
"RLA " , "RLC " , "RLCA" , "RLD " ,
"RR " , "RRA " , "RRC " , "RRCA" ,
"RRD " , "RST " , "SBC " , "SCF " ,
"SET " , "SLA " , "SLL " , "SRA " ,
"SRL " , "SUB " , "XOR " , "\001" ,
"\002" , "\003" , "\004" , "(BC)" ,
"(C)" , "(DE)" , "(HL)" , "\005" ,
"\006" , "(SP)" , "A" , "AF" ,
"AF'" , "B" , "BC" , "C" ,
"D" , "DE" , "E" , "H" ,
"HL" , "I" , "I%" , "L" ,
"NC" , "NS" , "NV" , "NZ" ,
"R" , "S" , "SP" , "V" ,
"%H" , "%L" , "Z" , "0" ,
"1" , "2" , "\007" , "\010" ,
"*BRK" ,
};
typedef const char Z80_DASM_DICT[256][4]; // abridged dictionnaries made of the above lexical components
Z80_DASM_DICT z80_dasm_table= // unused slots contain zeroes (implicitly meaning Z80_DASM_NULL)
{
// 0x00-0x0F
{Z80_DASM_NOP },
{Z80_DASM_LD ,Z80_DASM_BC ,Z80_DASM_WORD },
{Z80_DASM_LD ,Z80_DASM_P_BC ,Z80_DASM_A },
{Z80_DASM_INC ,Z80_DASM_BC },
{Z80_DASM_INC ,Z80_DASM_B },
{Z80_DASM_DEC ,Z80_DASM_B },
{Z80_DASM_LD ,Z80_DASM_B ,Z80_DASM_BYTE },
{Z80_DASM_RLCA },
{Z80_DASM_EX ,Z80_DASM_AF ,Z80_DASM_AF2 },
{Z80_DASM_ADD ,Z80_DASM_HL ,Z80_DASM_BC },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_P_BC },
{Z80_DASM_DEC ,Z80_DASM_BC },
{Z80_DASM_INC ,Z80_DASM_C },
{Z80_DASM_DEC ,Z80_DASM_C },
{Z80_DASM_LD ,Z80_DASM_C ,Z80_DASM_BYTE },
{Z80_DASM_RRCA },
// 0x10-0x1F
{Z80_DASM_DJNZ ,Z80_DASM_R_PC },
{Z80_DASM_LD ,Z80_DASM_DE ,Z80_DASM_WORD },
{Z80_DASM_LD ,Z80_DASM_P_DE ,Z80_DASM_A },
{Z80_DASM_INC ,Z80_DASM_DE },
{Z80_DASM_INC ,Z80_DASM_D },
{Z80_DASM_DEC ,Z80_DASM_D },
{Z80_DASM_LD ,Z80_DASM_D ,Z80_DASM_BYTE },
{Z80_DASM_RLA },
{Z80_DASM_JR ,Z80_DASM_R_PC },
{Z80_DASM_ADD ,Z80_DASM_HL ,Z80_DASM_DE },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_P_DE },
{Z80_DASM_DEC ,Z80_DASM_DE },
{Z80_DASM_INC ,Z80_DASM_E },
{Z80_DASM_DEC ,Z80_DASM_E },
{Z80_DASM_LD ,Z80_DASM_E ,Z80_DASM_BYTE },
{Z80_DASM_RRA },
// 0x20-0x2F
{Z80_DASM_JR ,Z80_DASM_NZ ,Z80_DASM_R_PC },
{Z80_DASM_LD ,Z80_DASM_HL ,Z80_DASM_WORD },
{Z80_DASM_LD ,Z80_DASM_P_W_ ,Z80_DASM_HL },
{Z80_DASM_INC ,Z80_DASM_HL },
{Z80_DASM_INC ,Z80_DASM_H },
{Z80_DASM_DEC ,Z80_DASM_H },
{Z80_DASM_LD ,Z80_DASM_H ,Z80_DASM_BYTE },
{Z80_DASM_DAA },
{Z80_DASM_JR ,Z80_DASM_Z ,Z80_DASM_R_PC },
{Z80_DASM_ADD ,Z80_DASM_HL ,Z80_DASM_HL },
{Z80_DASM_LD ,Z80_DASM_HL ,Z80_DASM_P_W_ },
{Z80_DASM_DEC ,Z80_DASM_HL },
{Z80_DASM_INC ,Z80_DASM_L },
{Z80_DASM_DEC ,Z80_DASM_L },
{Z80_DASM_LD ,Z80_DASM_L ,Z80_DASM_BYTE },
{Z80_DASM_CPL },
// 0x30-0x3F
{Z80_DASM_JR ,Z80_DASM_NC ,Z80_DASM_R_PC },
{Z80_DASM_LD ,Z80_DASM_SP ,Z80_DASM_WORD },
{Z80_DASM_LD ,Z80_DASM_P_W_ ,Z80_DASM_A },
{Z80_DASM_INC ,Z80_DASM_SP },
{Z80_DASM_INC ,Z80_DASM_P_HL },
{Z80_DASM_DEC ,Z80_DASM_P_HL },
{Z80_DASM_LD ,Z80_DASM_P_HL ,Z80_DASM_BYTE },
{Z80_DASM_SCF },
{Z80_DASM_JR ,Z80_DASM_C ,Z80_DASM_R_PC },
{Z80_DASM_ADD ,Z80_DASM_HL ,Z80_DASM_SP },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_P_W_ },
{Z80_DASM_DEC ,Z80_DASM_SP },
{Z80_DASM_INC ,Z80_DASM_A },
{Z80_DASM_DEC ,Z80_DASM_A },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_BYTE },
{Z80_DASM_CCF },
// 0x40-0x4F
{Z80_DASM_LD ,Z80_DASM_B ,Z80_DASM_B },
{Z80_DASM_LD ,Z80_DASM_B ,Z80_DASM_C },
{Z80_DASM_LD ,Z80_DASM_B ,Z80_DASM_D },
{Z80_DASM_LD ,Z80_DASM_B ,Z80_DASM_E },
{Z80_DASM_LD ,Z80_DASM_B ,Z80_DASM_H },
{Z80_DASM_LD ,Z80_DASM_B ,Z80_DASM_L },
{Z80_DASM_LD ,Z80_DASM_B ,Z80_DASM_P_HL },
{Z80_DASM_LD ,Z80_DASM_B ,Z80_DASM_A },
{Z80_DASM_LD ,Z80_DASM_C ,Z80_DASM_B },
{Z80_DASM_LD ,Z80_DASM_C ,Z80_DASM_C },
{Z80_DASM_LD ,Z80_DASM_C ,Z80_DASM_D },
{Z80_DASM_LD ,Z80_DASM_C ,Z80_DASM_E },
{Z80_DASM_LD ,Z80_DASM_C ,Z80_DASM_H },
{Z80_DASM_LD ,Z80_DASM_C ,Z80_DASM_L },
{Z80_DASM_LD ,Z80_DASM_C ,Z80_DASM_P_HL },
{Z80_DASM_LD ,Z80_DASM_C ,Z80_DASM_A },
// 0x50-0x5F
{Z80_DASM_LD ,Z80_DASM_D ,Z80_DASM_B },
{Z80_DASM_LD ,Z80_DASM_D ,Z80_DASM_C },
{Z80_DASM_LD ,Z80_DASM_D ,Z80_DASM_D },
{Z80_DASM_LD ,Z80_DASM_D ,Z80_DASM_E },
{Z80_DASM_LD ,Z80_DASM_D ,Z80_DASM_H },
{Z80_DASM_LD ,Z80_DASM_D ,Z80_DASM_L },
{Z80_DASM_LD ,Z80_DASM_D ,Z80_DASM_P_HL },
{Z80_DASM_LD ,Z80_DASM_D ,Z80_DASM_A },
{Z80_DASM_LD ,Z80_DASM_E ,Z80_DASM_B },
{Z80_DASM_LD ,Z80_DASM_E ,Z80_DASM_C },
{Z80_DASM_LD ,Z80_DASM_E ,Z80_DASM_D },
{Z80_DASM_LD ,Z80_DASM_E ,Z80_DASM_E },
{Z80_DASM_LD ,Z80_DASM_E ,Z80_DASM_H },
{Z80_DASM_LD ,Z80_DASM_E ,Z80_DASM_L },
{Z80_DASM_LD ,Z80_DASM_E ,Z80_DASM_P_HL },
{Z80_DASM_LD ,Z80_DASM_E ,Z80_DASM_A },
// 0x60-0x6F
{Z80_DASM_LD ,Z80_DASM_H ,Z80_DASM_B },
{Z80_DASM_LD ,Z80_DASM_H ,Z80_DASM_C },
{Z80_DASM_LD ,Z80_DASM_H ,Z80_DASM_D },
{Z80_DASM_LD ,Z80_DASM_H ,Z80_DASM_E },
{Z80_DASM_LD ,Z80_DASM_H ,Z80_DASM_H },
{Z80_DASM_LD ,Z80_DASM_H ,Z80_DASM_L },
{Z80_DASM_LD ,Z80_DASM_H ,Z80_DASM_P_HL },
{Z80_DASM_LD ,Z80_DASM_H ,Z80_DASM_A },
{Z80_DASM_LD ,Z80_DASM_L ,Z80_DASM_B },
{Z80_DASM_LD ,Z80_DASM_L ,Z80_DASM_C },
{Z80_DASM_LD ,Z80_DASM_L ,Z80_DASM_D },
{Z80_DASM_LD ,Z80_DASM_L ,Z80_DASM_E },
{Z80_DASM_LD ,Z80_DASM_L ,Z80_DASM_H },
{Z80_DASM_LD ,Z80_DASM_L ,Z80_DASM_L },
{Z80_DASM_LD ,Z80_DASM_L ,Z80_DASM_P_HL },
{Z80_DASM_LD ,Z80_DASM_L ,Z80_DASM_A },
// 0x70-0x7F
{Z80_DASM_LD ,Z80_DASM_P_HL ,Z80_DASM_B },
{Z80_DASM_LD ,Z80_DASM_P_HL ,Z80_DASM_C },
{Z80_DASM_LD ,Z80_DASM_P_HL ,Z80_DASM_D },
{Z80_DASM_LD ,Z80_DASM_P_HL ,Z80_DASM_E },
{Z80_DASM_LD ,Z80_DASM_P_HL ,Z80_DASM_H },
{Z80_DASM_LD ,Z80_DASM_P_HL ,Z80_DASM_L },
{Z80_DASM_HALT },
{Z80_DASM_LD ,Z80_DASM_P_HL ,Z80_DASM_A },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_B },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_C },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_D },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_E },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_H },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_L },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_P_HL },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_A },
// 0x80-0x8F
{Z80_DASM_ADD ,Z80_DASM_B },
{Z80_DASM_ADD ,Z80_DASM_C },
{Z80_DASM_ADD ,Z80_DASM_D },
{Z80_DASM_ADD ,Z80_DASM_E },
{Z80_DASM_ADD ,Z80_DASM_H },
{Z80_DASM_ADD ,Z80_DASM_L },
{Z80_DASM_ADD ,Z80_DASM_P_HL },
{Z80_DASM_ADD ,Z80_DASM_A },
{Z80_DASM_ADC ,Z80_DASM_B },
{Z80_DASM_ADC ,Z80_DASM_C },
{Z80_DASM_ADC ,Z80_DASM_D },
{Z80_DASM_ADC ,Z80_DASM_E },
{Z80_DASM_ADC ,Z80_DASM_H },
{Z80_DASM_ADC ,Z80_DASM_L },
{Z80_DASM_ADC ,Z80_DASM_P_HL },
{Z80_DASM_ADC ,Z80_DASM_A },
// 0x90-0x9F
{Z80_DASM_SUB ,Z80_DASM_B },
{Z80_DASM_SUB ,Z80_DASM_C },
{Z80_DASM_SUB ,Z80_DASM_D },
{Z80_DASM_SUB ,Z80_DASM_E },
{Z80_DASM_SUB ,Z80_DASM_H },
{Z80_DASM_SUB ,Z80_DASM_L },
{Z80_DASM_SUB ,Z80_DASM_P_HL },
{Z80_DASM_SUB ,Z80_DASM_A },
{Z80_DASM_SBC ,Z80_DASM_B },
{Z80_DASM_SBC ,Z80_DASM_C },
{Z80_DASM_SBC ,Z80_DASM_D },
{Z80_DASM_SBC ,Z80_DASM_E },
{Z80_DASM_SBC ,Z80_DASM_H },
{Z80_DASM_SBC ,Z80_DASM_L },
{Z80_DASM_SBC ,Z80_DASM_P_HL },
{Z80_DASM_SBC ,Z80_DASM_A },
// 0xA0-0xAF
{Z80_DASM_AND ,Z80_DASM_B },
{Z80_DASM_AND ,Z80_DASM_C },
{Z80_DASM_AND ,Z80_DASM_D },
{Z80_DASM_AND ,Z80_DASM_E },
{Z80_DASM_AND ,Z80_DASM_H },
{Z80_DASM_AND ,Z80_DASM_L },
{Z80_DASM_AND ,Z80_DASM_P_HL },
{Z80_DASM_AND ,Z80_DASM_A },
{Z80_DASM_XOR ,Z80_DASM_B },
{Z80_DASM_XOR ,Z80_DASM_C },
{Z80_DASM_XOR ,Z80_DASM_D },
{Z80_DASM_XOR ,Z80_DASM_E },
{Z80_DASM_XOR ,Z80_DASM_H },
{Z80_DASM_XOR ,Z80_DASM_L },
{Z80_DASM_XOR ,Z80_DASM_P_HL },
{Z80_DASM_XOR ,Z80_DASM_A },
// 0xB0-0xBF
{Z80_DASM_OR ,Z80_DASM_B },
{Z80_DASM_OR ,Z80_DASM_C },
{Z80_DASM_OR ,Z80_DASM_D },
{Z80_DASM_OR ,Z80_DASM_E },
{Z80_DASM_OR ,Z80_DASM_H },
{Z80_DASM_OR ,Z80_DASM_L },
{Z80_DASM_OR ,Z80_DASM_P_HL },
{Z80_DASM_OR ,Z80_DASM_A },
{Z80_DASM_CP ,Z80_DASM_B },
{Z80_DASM_CP ,Z80_DASM_C },
{Z80_DASM_CP ,Z80_DASM_D },
{Z80_DASM_CP ,Z80_DASM_E },
{Z80_DASM_CP ,Z80_DASM_H },
{Z80_DASM_CP ,Z80_DASM_L },
{Z80_DASM_CP ,Z80_DASM_P_HL },
{Z80_DASM_CP ,Z80_DASM_A },
// 0xC0-0xCF
{Z80_DASM_RET ,Z80_DASM_NZ },
{Z80_DASM_POP ,Z80_DASM_BC },
{Z80_DASM_JP ,Z80_DASM_NZ ,Z80_DASM_WORD },
{Z80_DASM_JP ,Z80_DASM_WORD },
{Z80_DASM_CALL ,Z80_DASM_NZ ,Z80_DASM_WORD },
{Z80_DASM_PUSH ,Z80_DASM_BC },
{Z80_DASM_ADD ,Z80_DASM_BYTE },
{Z80_DASM_RST ,Z80_DASM_DIV8 },
{Z80_DASM_RET ,Z80_DASM_Z },
{Z80_DASM_RET },
{Z80_DASM_JP ,Z80_DASM_Z ,Z80_DASM_WORD },
{0}, // PREFIX CB
{Z80_DASM_CALL ,Z80_DASM_Z ,Z80_DASM_WORD },
{Z80_DASM_CALL ,Z80_DASM_WORD },
{Z80_DASM_ADC ,Z80_DASM_BYTE },
{Z80_DASM_RST ,Z80_DASM_DIV8 },
// 0xD0-0xDF
{Z80_DASM_RET ,Z80_DASM_NC },
{Z80_DASM_POP ,Z80_DASM_DE },
{Z80_DASM_JP ,Z80_DASM_NC ,Z80_DASM_WORD },
{Z80_DASM_OUT ,Z80_DASM_P_B_ ,Z80_DASM_A },
{Z80_DASM_CALL ,Z80_DASM_NC ,Z80_DASM_WORD },
{Z80_DASM_PUSH ,Z80_DASM_DE },
{Z80_DASM_SUB ,Z80_DASM_BYTE },
{Z80_DASM_RST ,Z80_DASM_DIV8 },
{Z80_DASM_RET ,Z80_DASM_C },
{Z80_DASM_EXX },
{Z80_DASM_JP ,Z80_DASM_C ,Z80_DASM_WORD },
{Z80_DASM_IN ,Z80_DASM_A ,Z80_DASM_P_B_ },
{Z80_DASM_CALL ,Z80_DASM_C ,Z80_DASM_WORD },
{0}, // PREFIX DD
{Z80_DASM_SBC ,Z80_DASM_BYTE },
{Z80_DASM_RST ,Z80_DASM_DIV8 },
// 0xE0-0xEF
{Z80_DASM_RET ,Z80_DASM_NV },
{Z80_DASM_POP ,Z80_DASM_HL },
{Z80_DASM_JP ,Z80_DASM_NV ,Z80_DASM_WORD },
{Z80_DASM_EX ,Z80_DASM_HL ,Z80_DASM_P_SP },
{Z80_DASM_CALL ,Z80_DASM_NV ,Z80_DASM_WORD },
{Z80_DASM_PUSH ,Z80_DASM_HL },
{Z80_DASM_AND ,Z80_DASM_BYTE },
{Z80_DASM_RST ,Z80_DASM_DIV8 },
{Z80_DASM_RET ,Z80_DASM_V },
{Z80_DASM_JP ,Z80_DASM_HL },
{Z80_DASM_JP ,Z80_DASM_V ,Z80_DASM_WORD },
{Z80_DASM_EX ,Z80_DASM_DE ,Z80_DASM_HL },
{Z80_DASM_CALL ,Z80_DASM_V ,Z80_DASM_WORD },
{0}, // PREFIX ED
{Z80_DASM_XOR ,Z80_DASM_BYTE },
{Z80_DASM_RST ,Z80_DASM_DIV8 },
// 0xF0-0xFF
{Z80_DASM_RET ,Z80_DASM_NS },
{Z80_DASM_POP ,Z80_DASM_AF },
{Z80_DASM_JP ,Z80_DASM_NS ,Z80_DASM_WORD },
{Z80_DASM_DI },
{Z80_DASM_CALL ,Z80_DASM_NS ,Z80_DASM_WORD },
{Z80_DASM_PUSH ,Z80_DASM_AF },
{Z80_DASM_OR ,Z80_DASM_BYTE },
{Z80_DASM_RST ,Z80_DASM_DIV8 },
{Z80_DASM_RET ,Z80_DASM_S },
{Z80_DASM_LD ,Z80_DASM_SP ,Z80_DASM_HL },
{Z80_DASM_JP ,Z80_DASM_S ,Z80_DASM_WORD },
{Z80_DASM_EI },
{Z80_DASM_CALL ,Z80_DASM_S ,Z80_DASM_WORD },
{0}, // PREFIX FD
{Z80_DASM_CP ,Z80_DASM_BYTE },
{Z80_DASM_RST ,Z80_DASM_DIV8 },
};
Z80_DASM_DICT z80_dasm_table_cb=
{
// 0xCB00-0xCB0F
{Z80_DASM_RLC ,Z80_DASM_B },
{Z80_DASM_RLC ,Z80_DASM_C },
{Z80_DASM_RLC ,Z80_DASM_D },
{Z80_DASM_RLC ,Z80_DASM_E },
{Z80_DASM_RLC ,Z80_DASM_H },
{Z80_DASM_RLC ,Z80_DASM_L },
{Z80_DASM_RLC ,Z80_DASM_P_HL },
{Z80_DASM_RLC ,Z80_DASM_A },
{Z80_DASM_RRC ,Z80_DASM_B },
{Z80_DASM_RRC ,Z80_DASM_C },
{Z80_DASM_RRC ,Z80_DASM_D },
{Z80_DASM_RRC ,Z80_DASM_E },
{Z80_DASM_RRC ,Z80_DASM_H },
{Z80_DASM_RRC ,Z80_DASM_L },
{Z80_DASM_RRC ,Z80_DASM_P_HL },
{Z80_DASM_RRC ,Z80_DASM_A },
// 0xCB10-0xCB1F
{Z80_DASM_RL ,Z80_DASM_B },
{Z80_DASM_RL ,Z80_DASM_C },
{Z80_DASM_RL ,Z80_DASM_D },
{Z80_DASM_RL ,Z80_DASM_E },
{Z80_DASM_RL ,Z80_DASM_H },
{Z80_DASM_RL ,Z80_DASM_L },
{Z80_DASM_RL ,Z80_DASM_P_HL },
{Z80_DASM_RL ,Z80_DASM_A },
{Z80_DASM_RR ,Z80_DASM_B },
{Z80_DASM_RR ,Z80_DASM_C },
{Z80_DASM_RR ,Z80_DASM_D },
{Z80_DASM_RR ,Z80_DASM_E },
{Z80_DASM_RR ,Z80_DASM_H },
{Z80_DASM_RR ,Z80_DASM_L },
{Z80_DASM_RR ,Z80_DASM_P_HL },
{Z80_DASM_RR ,Z80_DASM_A },
// 0xCB20-0xCB2F
{Z80_DASM_SLA ,Z80_DASM_B },
{Z80_DASM_SLA ,Z80_DASM_C },
{Z80_DASM_SLA ,Z80_DASM_D },
{Z80_DASM_SLA ,Z80_DASM_E },
{Z80_DASM_SLA ,Z80_DASM_H },
{Z80_DASM_SLA ,Z80_DASM_L },
{Z80_DASM_SLA ,Z80_DASM_P_HL },
{Z80_DASM_SLA ,Z80_DASM_A },
{Z80_DASM_SRA ,Z80_DASM_B },
{Z80_DASM_SRA ,Z80_DASM_C },
{Z80_DASM_SRA ,Z80_DASM_D },
{Z80_DASM_SRA ,Z80_DASM_E },
{Z80_DASM_SRA ,Z80_DASM_H },
{Z80_DASM_SRA ,Z80_DASM_L },
{Z80_DASM_SRA ,Z80_DASM_P_HL },
{Z80_DASM_SRA ,Z80_DASM_A },
// 0xCB30-0xCB3F
{Z80_DASM_SLL ,Z80_DASM_B },
{Z80_DASM_SLL ,Z80_DASM_C },
{Z80_DASM_SLL ,Z80_DASM_D },
{Z80_DASM_SLL ,Z80_DASM_E },
{Z80_DASM_SLL ,Z80_DASM_H },
{Z80_DASM_SLL ,Z80_DASM_L },
{Z80_DASM_SLL ,Z80_DASM_P_HL },
{Z80_DASM_SLL ,Z80_DASM_A },
{Z80_DASM_SRL ,Z80_DASM_B },
{Z80_DASM_SRL ,Z80_DASM_C },
{Z80_DASM_SRL ,Z80_DASM_D },
{Z80_DASM_SRL ,Z80_DASM_E },
{Z80_DASM_SRL ,Z80_DASM_H },
{Z80_DASM_SRL ,Z80_DASM_L },
{Z80_DASM_SRL ,Z80_DASM_P_HL },
{Z80_DASM_SRL ,Z80_DASM_A },
// 0xCB40-0xCB4F
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_A },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_A },
// 0xCB50-0xCB5F
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_A },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_A },
// 0xCB60-0xCB6F
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_A },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_A },
// 0xCB70-0xCB7F
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_A },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_BIT ,Z80_DASM_DIV8 ,Z80_DASM_A },
// 0xCB80-0xCB8F
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_A },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_A },
// 0xCB90-0xCB9F
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_A },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_A },
// 0xCBA0-0xCBAF
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_A },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_A },
// 0xCBB0-0xCBBF
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_A },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_RES ,Z80_DASM_DIV8 ,Z80_DASM_A },
// 0xCBC0-0xCBCF
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_A },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_A },
// 0xCBD0-0xCBDF
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_A },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_A },
// 0xCBE0-0xCBEF
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_A },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_A },
// 0xCBF0-0xCBFF
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_A },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_B },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_C },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_D },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_E },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_H },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_L },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_P_HL },
{Z80_DASM_SET ,Z80_DASM_DIV8 ,Z80_DASM_A },
};
Z80_DASM_DICT z80_dasm_table_ed=
{
// 0xED00-0xED0F
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
// 0xED10-0xED1F
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
// 0xED20-0xED2F
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
// 0xED30-0xED3F
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
// 0xED40-0xED4F
{Z80_DASM_IN ,Z80_DASM_B ,Z80_DASM_P_C },
{Z80_DASM_OUT ,Z80_DASM_P_C ,Z80_DASM_B },
{Z80_DASM_SBC ,Z80_DASM_HL ,Z80_DASM_BC },
{Z80_DASM_LD ,Z80_DASM_P_W_ ,Z80_DASM_BC },
{Z80_DASM_NEG },
{Z80_DASM_RETN },
{Z80_DASM_IM ,Z80_DASM_0 },
{Z80_DASM_LD ,Z80_DASM_I ,Z80_DASM_A },
{Z80_DASM_IN ,Z80_DASM_C ,Z80_DASM_P_C },
{Z80_DASM_OUT ,Z80_DASM_P_C ,Z80_DASM_C },
{Z80_DASM_ADC ,Z80_DASM_HL ,Z80_DASM_BC },
{Z80_DASM_LD ,Z80_DASM_BC ,Z80_DASM_P_W_ },
{Z80_DASM_NEG },
{Z80_DASM_RETI },
{Z80_DASM_IM ,Z80_DASM_0 },
{Z80_DASM_LD ,Z80_DASM_R ,Z80_DASM_A },
// 0xED50-0xED5F
{Z80_DASM_IN ,Z80_DASM_D ,Z80_DASM_P_C },
{Z80_DASM_OUT ,Z80_DASM_P_C ,Z80_DASM_D },
{Z80_DASM_SBC ,Z80_DASM_HL ,Z80_DASM_DE },
{Z80_DASM_LD ,Z80_DASM_P_W_ ,Z80_DASM_DE },
{Z80_DASM_NEG },
{Z80_DASM_RETN },
{Z80_DASM_IM ,Z80_DASM_1 },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_I },
{Z80_DASM_IN ,Z80_DASM_E ,Z80_DASM_P_C },
{Z80_DASM_OUT ,Z80_DASM_P_C ,Z80_DASM_E },
{Z80_DASM_ADC ,Z80_DASM_HL ,Z80_DASM_DE },
{Z80_DASM_LD ,Z80_DASM_DE ,Z80_DASM_P_W_ },
{Z80_DASM_NEG },
{Z80_DASM_RETI },
{Z80_DASM_IM ,Z80_DASM_2 },
{Z80_DASM_LD ,Z80_DASM_A ,Z80_DASM_R },
// 0xED60-0xED6F
{Z80_DASM_IN ,Z80_DASM_H ,Z80_DASM_P_C },
{Z80_DASM_OUT ,Z80_DASM_P_C ,Z80_DASM_H },
{Z80_DASM_SBC ,Z80_DASM_HL ,Z80_DASM_HL },
{Z80_DASM_LD ,Z80_DASM_P_W_ ,Z80_DASM_HL },
{Z80_DASM_NEG },
{Z80_DASM_RETN },
{Z80_DASM_IM ,Z80_DASM_0 },
{Z80_DASM_RRD },
{Z80_DASM_IN ,Z80_DASM_L ,Z80_DASM_P_C },
{Z80_DASM_OUT ,Z80_DASM_P_C ,Z80_DASM_L },
{Z80_DASM_ADC ,Z80_DASM_HL ,Z80_DASM_HL },
{Z80_DASM_LD ,Z80_DASM_HL ,Z80_DASM_P_W_ },
{Z80_DASM_NEG },
{Z80_DASM_RETI },
{Z80_DASM_IM ,Z80_DASM_0 },
{Z80_DASM_RLD },
// 0xED70-0xED7F
{Z80_DASM_IN ,Z80_DASM_P_C },
{Z80_DASM_OUT ,Z80_DASM_P_C },
{Z80_DASM_SBC ,Z80_DASM_HL ,Z80_DASM_SP },
{Z80_DASM_LD ,Z80_DASM_P_W_ ,Z80_DASM_SP },
{Z80_DASM_NEG },
{Z80_DASM_RETN },
{Z80_DASM_IM ,Z80_DASM_1 },
{Z80_DASM_LD ,Z80_DASM_I ,Z80_DASM_I },
{Z80_DASM_IN ,Z80_DASM_A ,Z80_DASM_P_C },
{Z80_DASM_OUT ,Z80_DASM_P_C ,Z80_DASM_A },
{Z80_DASM_ADC ,Z80_DASM_HL ,Z80_DASM_SP },
{Z80_DASM_LD ,Z80_DASM_SP ,Z80_DASM_P_W_ },
{Z80_DASM_NEG },
{Z80_DASM_RETI },
{Z80_DASM_IM ,Z80_DASM_2 },
{Z80_DASM_LD ,Z80_DASM_R ,Z80_DASM_R },
// 0xED80-0xED8F
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
// 0xED90-0xED9F
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
// 0xEDA0-0xEDAF
{Z80_DASM_LDI },
{Z80_DASM_CPI },
{Z80_DASM_INI },
{Z80_DASM_OUTI },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_LDD },
{Z80_DASM_CPD },
{Z80_DASM_IND },
{Z80_DASM_OUTD },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
// 0xEDB0-0xEDBF
{Z80_DASM_LDIR },
{Z80_DASM_CPIR },
{Z80_DASM_INIR },
{Z80_DASM_OTIR },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_LDDR },
{Z80_DASM_CPDR },
{Z80_DASM_INDR },
{Z80_DASM_OTDR },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
// 0xEDC0-0xEDCF
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
// 0xEDD0-0xEDDF
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
// 0xEDE0-0xEDEF
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
// 0xEDF0-0xEDFF
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_SKIP },
{Z80_DASM_EDFF },
};
Z80_DASM_DICT z80_dasm_table_xy= // IX and IY are handled together
{
// 0xDD00-0xDD0F